857eb0316c7156bfb428896c8ca33d16b07ccbba
[mesa.git] / src / gallium / drivers / nouveau / nvc0 / nvc0_screen.h
1 #ifndef __NVC0_SCREEN_H__
2 #define __NVC0_SCREEN_H__
3
4 #include "nouveau_screen.h"
5 #include "nouveau_mm.h"
6 #include "nouveau_fence.h"
7 #include "nouveau_heap.h"
8
9 #include "nv_object.xml.h"
10
11 #include "nvc0/nvc0_winsys.h"
12 #include "nvc0/nvc0_stateobj.h"
13
14 #define NVC0_TIC_MAX_ENTRIES 2048
15 #define NVC0_TSC_MAX_ENTRIES 2048
16
17 /* doesn't count reserved slots (for auxiliary constants, immediates, etc.) */
18 #define NVC0_MAX_PIPE_CONSTBUFS 14
19 #define NVE4_MAX_PIPE_CONSTBUFS_COMPUTE 7
20
21 #define NVC0_MAX_SURFACE_SLOTS 16
22
23 #define NVC0_MAX_VIEWPORTS 16
24
25
26 struct nvc0_context;
27
28 struct nvc0_blitter;
29
30 struct nvc0_graph_state {
31 bool flushed;
32 bool rasterizer_discard;
33 bool early_z_forced;
34 bool prim_restart;
35 uint32_t instance_elts; /* bitmask of per-instance elements */
36 uint32_t instance_base;
37 uint32_t constant_vbos;
38 uint32_t constant_elts;
39 int32_t index_bias;
40 uint16_t scissor;
41 uint8_t patch_vertices;
42 uint8_t vbo_mode; /* 0 = normal, 1 = translate, 3 = translate, forced */
43 uint8_t num_vtxbufs;
44 uint8_t num_vtxelts;
45 uint8_t num_textures[6];
46 uint8_t num_samplers[6];
47 uint8_t tls_required; /* bitmask of shader types using l[] */
48 uint8_t c14_bound; /* whether immediate array constbuf is bound */
49 uint8_t clip_enable;
50 uint32_t clip_mode;
51 uint32_t uniform_buffer_bound[5];
52 struct nvc0_transform_feedback_state *tfb;
53 };
54
55 struct nvc0_screen {
56 struct nouveau_screen base;
57
58 struct nvc0_context *cur_ctx;
59 struct nvc0_graph_state save_state;
60
61 int num_occlusion_queries_active;
62
63 struct nouveau_bo *text;
64 struct nouveau_bo *parm; /* for COMPUTE */
65 struct nouveau_bo *uniform_bo; /* for 3D */
66 struct nouveau_bo *tls;
67 struct nouveau_bo *txc; /* TIC (offset 0) and TSC (65536) */
68 struct nouveau_bo *poly_cache;
69
70 uint8_t gpc_count;
71 uint16_t mp_count;
72 uint16_t mp_count_compute; /* magic reg can make compute use fewer MPs */
73
74 struct nouveau_heap *text_heap;
75 struct nouveau_heap *lib_code; /* allocated from text_heap */
76
77 struct nvc0_blitter *blitter;
78
79 struct {
80 void **entries;
81 int next;
82 uint32_t lock[NVC0_TIC_MAX_ENTRIES / 32];
83 } tic;
84
85 struct {
86 void **entries;
87 int next;
88 uint32_t lock[NVC0_TSC_MAX_ENTRIES / 32];
89 } tsc;
90
91 struct {
92 struct nouveau_bo *bo;
93 uint32_t *map;
94 } fence;
95
96 struct {
97 struct nvc0_program *prog; /* compute state object to read MP counters */
98 struct nvc0_hw_sm_query *mp_counter[8]; /* counter to query allocation */
99 uint8_t num_hw_sm_active[2];
100 bool mp_counters_enabled;
101 } pm;
102
103 struct nouveau_object *eng3d; /* sqrt(1/2)|kepler> + sqrt(1/2)|fermi> */
104 struct nouveau_object *eng2d;
105 struct nouveau_object *m2mf;
106 struct nouveau_object *compute;
107 struct nouveau_object *nvsw;
108 };
109
110 static inline struct nvc0_screen *
111 nvc0_screen(struct pipe_screen *screen)
112 {
113 return (struct nvc0_screen *)screen;
114 }
115
116 int nvc0_screen_get_driver_query_info(struct pipe_screen *, unsigned,
117 struct pipe_driver_query_info *);
118
119 int nvc0_screen_get_driver_query_group_info(struct pipe_screen *, unsigned,
120 struct pipe_driver_query_group_info *);
121
122 bool nvc0_blitter_create(struct nvc0_screen *);
123 void nvc0_blitter_destroy(struct nvc0_screen *);
124
125 void nvc0_screen_make_buffers_resident(struct nvc0_screen *);
126
127 int nvc0_screen_tic_alloc(struct nvc0_screen *, void *);
128 int nvc0_screen_tsc_alloc(struct nvc0_screen *, void *);
129
130 int nve4_screen_compute_setup(struct nvc0_screen *, struct nouveau_pushbuf *);
131 int nvc0_screen_compute_setup(struct nvc0_screen *, struct nouveau_pushbuf *);
132
133 bool nvc0_screen_resize_tls_area(struct nvc0_screen *, uint32_t lpos,
134 uint32_t lneg, uint32_t cstack);
135
136 static inline void
137 nvc0_resource_fence(struct nv04_resource *res, uint32_t flags)
138 {
139 struct nvc0_screen *screen = nvc0_screen(res->base.screen);
140
141 if (res->mm) {
142 nouveau_fence_ref(screen->base.fence.current, &res->fence);
143 if (flags & NOUVEAU_BO_WR)
144 nouveau_fence_ref(screen->base.fence.current, &res->fence_wr);
145 }
146 }
147
148 static inline void
149 nvc0_resource_validate(struct nv04_resource *res, uint32_t flags)
150 {
151 if (likely(res->bo)) {
152 if (flags & NOUVEAU_BO_WR)
153 res->status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING |
154 NOUVEAU_BUFFER_STATUS_DIRTY;
155 if (flags & NOUVEAU_BO_RD)
156 res->status |= NOUVEAU_BUFFER_STATUS_GPU_READING;
157
158 nvc0_resource_fence(res, flags);
159 }
160 }
161
162 struct nvc0_format {
163 uint32_t rt;
164 uint32_t tic;
165 uint32_t vtx;
166 uint32_t usage;
167 };
168
169 extern const struct nvc0_format nvc0_format_table[];
170
171 static inline void
172 nvc0_screen_tic_unlock(struct nvc0_screen *screen, struct nv50_tic_entry *tic)
173 {
174 if (tic->id >= 0)
175 screen->tic.lock[tic->id / 32] &= ~(1 << (tic->id % 32));
176 }
177
178 static inline void
179 nvc0_screen_tsc_unlock(struct nvc0_screen *screen, struct nv50_tsc_entry *tsc)
180 {
181 if (tsc->id >= 0)
182 screen->tsc.lock[tsc->id / 32] &= ~(1 << (tsc->id % 32));
183 }
184
185 static inline void
186 nvc0_screen_tic_free(struct nvc0_screen *screen, struct nv50_tic_entry *tic)
187 {
188 if (tic->id >= 0) {
189 screen->tic.entries[tic->id] = NULL;
190 screen->tic.lock[tic->id / 32] &= ~(1 << (tic->id % 32));
191 }
192 }
193
194 static inline void
195 nvc0_screen_tsc_free(struct nvc0_screen *screen, struct nv50_tsc_entry *tsc)
196 {
197 if (tsc->id >= 0) {
198 screen->tsc.entries[tsc->id] = NULL;
199 screen->tsc.lock[tsc->id / 32] &= ~(1 << (tsc->id % 32));
200 }
201 }
202
203 #endif