nvc0: increase number of ubo binding points
[mesa.git] / src / gallium / drivers / nouveau / nvc0 / nvc0_screen.h
1 #ifndef __NVC0_SCREEN_H__
2 #define __NVC0_SCREEN_H__
3
4 #include "nouveau_screen.h"
5 #include "nouveau_mm.h"
6 #include "nouveau_fence.h"
7 #include "nouveau_heap.h"
8
9 #include "nv_object.xml.h"
10
11 #include "nvc0/nvc0_winsys.h"
12 #include "nvc0/nvc0_stateobj.h"
13
14 #define NVC0_TIC_MAX_ENTRIES 2048
15 #define NVC0_TSC_MAX_ENTRIES 2048
16
17 /* doesn't count driver-reserved slot */
18 #define NVC0_MAX_PIPE_CONSTBUFS 15
19
20 #define NVC0_MAX_SURFACE_SLOTS 16
21
22 #define NVC0_MAX_VIEWPORTS 16
23
24 #define NVC0_MAX_BUFFERS 32
25
26 #define NVC0_MAX_IMAGES 8
27
28 #define NVC0_MAX_WINDOW_RECTANGLES 8
29
30 struct nvc0_context;
31
32 struct nvc0_blitter;
33
34 struct nvc0_graph_state {
35 bool flushed;
36 bool rasterizer_discard;
37 bool early_z_forced;
38 bool prim_restart;
39 uint32_t instance_elts; /* bitmask of per-instance elements */
40 uint32_t instance_base;
41 uint32_t constant_vbos;
42 uint32_t constant_elts;
43 int32_t index_bias;
44 uint16_t scissor;
45 bool flatshade;
46 uint8_t patch_vertices;
47 uint8_t vbo_mode; /* 0 = normal, 1 = translate, 3 = translate, forced */
48 uint8_t num_vtxbufs;
49 uint8_t num_vtxelts;
50 uint8_t num_textures[6];
51 uint8_t num_samplers[6];
52 uint8_t tls_required; /* bitmask of shader types using l[] */
53 uint8_t clip_enable;
54 uint32_t clip_mode;
55 uint32_t uniform_buffer_bound[6];
56 struct nvc0_transform_feedback_state *tfb;
57 bool seamless_cube_map;
58 };
59
60 struct nvc0_screen {
61 struct nouveau_screen base;
62
63 struct nvc0_context *cur_ctx;
64 struct nvc0_graph_state save_state;
65
66 int num_occlusion_queries_active;
67
68 struct nouveau_bo *text;
69 struct nouveau_bo *uniform_bo;
70 struct nouveau_bo *tls;
71 struct nouveau_bo *txc; /* TIC (offset 0) and TSC (65536) */
72 struct nouveau_bo *poly_cache;
73
74 uint8_t gpc_count;
75 uint16_t mp_count;
76 uint16_t mp_count_compute; /* magic reg can make compute use fewer MPs */
77
78 struct nouveau_heap *text_heap;
79 struct nouveau_heap *lib_code; /* allocated from text_heap */
80
81 struct nvc0_blitter *blitter;
82
83 struct nv50_tsc_entry *default_tsc;
84
85 struct {
86 void **entries;
87 int next;
88 uint32_t lock[NVC0_TIC_MAX_ENTRIES / 32];
89 bool maxwell;
90 } tic;
91
92 struct {
93 void **entries;
94 int next;
95 uint32_t lock[NVC0_TSC_MAX_ENTRIES / 32];
96 } tsc;
97
98 struct {
99 struct nouveau_bo *bo;
100 uint32_t *map;
101 } fence;
102
103 struct {
104 struct nvc0_program *prog; /* compute state object to read MP counters */
105 struct nvc0_hw_sm_query *mp_counter[8]; /* counter to query allocation */
106 uint8_t num_hw_sm_active[2];
107 bool mp_counters_enabled;
108 } pm;
109
110 struct nouveau_object *eng3d; /* sqrt(1/2)|kepler> + sqrt(1/2)|fermi> */
111 struct nouveau_object *eng2d;
112 struct nouveau_object *m2mf;
113 struct nouveau_object *compute;
114 struct nouveau_object *nvsw;
115 };
116
117 static inline struct nvc0_screen *
118 nvc0_screen(struct pipe_screen *screen)
119 {
120 return (struct nvc0_screen *)screen;
121 }
122
123 int nvc0_screen_get_driver_query_info(struct pipe_screen *, unsigned,
124 struct pipe_driver_query_info *);
125
126 int nvc0_screen_get_driver_query_group_info(struct pipe_screen *, unsigned,
127 struct pipe_driver_query_group_info *);
128
129 bool nvc0_blitter_create(struct nvc0_screen *);
130 void nvc0_blitter_destroy(struct nvc0_screen *);
131
132 void nvc0_screen_make_buffers_resident(struct nvc0_screen *);
133
134 int nvc0_screen_tic_alloc(struct nvc0_screen *, void *);
135 int nvc0_screen_tsc_alloc(struct nvc0_screen *, void *);
136
137 int nve4_screen_compute_setup(struct nvc0_screen *, struct nouveau_pushbuf *);
138 int nvc0_screen_compute_setup(struct nvc0_screen *, struct nouveau_pushbuf *);
139
140 int nvc0_screen_resize_text_area(struct nvc0_screen *, uint64_t);
141
142 static inline void
143 nvc0_resource_fence(struct nv04_resource *res, uint32_t flags)
144 {
145 struct nvc0_screen *screen = nvc0_screen(res->base.screen);
146
147 if (res->mm) {
148 nouveau_fence_ref(screen->base.fence.current, &res->fence);
149 if (flags & NOUVEAU_BO_WR)
150 nouveau_fence_ref(screen->base.fence.current, &res->fence_wr);
151 }
152 }
153
154 static inline void
155 nvc0_resource_validate(struct nv04_resource *res, uint32_t flags)
156 {
157 if (likely(res->bo)) {
158 if (flags & NOUVEAU_BO_WR)
159 res->status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING |
160 NOUVEAU_BUFFER_STATUS_DIRTY;
161 if (flags & NOUVEAU_BO_RD)
162 res->status |= NOUVEAU_BUFFER_STATUS_GPU_READING;
163
164 nvc0_resource_fence(res, flags);
165 }
166 }
167
168 struct nvc0_format {
169 uint32_t rt;
170 struct {
171 unsigned format:7;
172 unsigned type_r:3;
173 unsigned type_g:3;
174 unsigned type_b:3;
175 unsigned type_a:3;
176 unsigned src_x:3;
177 unsigned src_y:3;
178 unsigned src_z:3;
179 unsigned src_w:3;
180 } tic;
181 uint32_t usage;
182 };
183
184 struct nvc0_vertex_format {
185 uint32_t vtx;
186 uint32_t usage;
187 };
188
189 extern const struct nvc0_format nvc0_format_table[];
190 extern const struct nvc0_vertex_format nvc0_vertex_format[];
191
192 static inline void
193 nvc0_screen_tic_unlock(struct nvc0_screen *screen, struct nv50_tic_entry *tic)
194 {
195 if (tic->id >= 0)
196 screen->tic.lock[tic->id / 32] &= ~(1 << (tic->id % 32));
197 }
198
199 static inline void
200 nvc0_screen_tsc_unlock(struct nvc0_screen *screen, struct nv50_tsc_entry *tsc)
201 {
202 if (tsc->id >= 0)
203 screen->tsc.lock[tsc->id / 32] &= ~(1 << (tsc->id % 32));
204 }
205
206 static inline void
207 nvc0_screen_tic_free(struct nvc0_screen *screen, struct nv50_tic_entry *tic)
208 {
209 if (tic->id >= 0) {
210 screen->tic.entries[tic->id] = NULL;
211 screen->tic.lock[tic->id / 32] &= ~(1 << (tic->id % 32));
212 }
213 }
214
215 static inline void
216 nvc0_screen_tsc_free(struct nvc0_screen *screen, struct nv50_tsc_entry *tsc)
217 {
218 if (tsc->id >= 0) {
219 screen->tsc.entries[tsc->id] = NULL;
220 screen->tsc.lock[tsc->id / 32] &= ~(1 << (tsc->id % 32));
221 }
222 }
223
224 #endif