src/gallium/drivers/nouveau/nvc0/nvc0_screen.h

   1 #ifndef __NVC0_SCREEN_H__
   2 #define __NVC0_SCREEN_H__
   3
   4 #include "nouveau_screen.h"
   5 #include "nouveau_mm.h"
   6 #include "nouveau_fence.h"
   7 #include "nouveau_heap.h"
   8
   9 #include "nv_object.xml.h"
  10
  11 #include "nvc0/nvc0_winsys.h"
  12 #include "nvc0/nvc0_stateobj.h"
  13
  14 #define NVC0_TIC_MAX_ENTRIES 2048
  15 #define NVC0_TSC_MAX_ENTRIES 2048
  16
  17 /* doesn't count driver-reserved slot */
  18 #define NVC0_MAX_PIPE_CONSTBUFS         15
  19
  20 #define NVC0_MAX_SURFACE_SLOTS 16
  21
  22 #define NVC0_MAX_VIEWPORTS 16
  23
  24 #define NVC0_MAX_BUFFERS 32
  25
  26 #define NVC0_MAX_IMAGES 8
  27
  28 #define NVC0_MAX_WINDOW_RECTANGLES 8
  29
  30 struct nvc0_context;
  31
  32 struct nvc0_blitter;
  33
  34 struct nvc0_graph_state {
  35    bool flushed;
  36    bool rasterizer_discard;
  37    bool early_z_forced;
  38    bool prim_restart;
  39    uint32_t instance_elts; /* bitmask of per-instance elements */
  40    uint32_t instance_base;
  41    uint32_t constant_vbos;
  42    uint32_t constant_elts;
  43    int32_t index_bias;
  44    uint16_t scissor;
  45    bool flatshade;
  46    uint8_t patch_vertices;
  47    uint8_t vbo_mode; /* 0 = normal, 1 = translate, 3 = translate, forced */
  48    uint8_t num_vtxbufs;
  49    uint8_t num_vtxelts;
  50    uint8_t num_textures[6];
  51    uint8_t num_samplers[6];
  52    uint8_t tls_required; /* bitmask of shader types using l[] */
  53    uint8_t clip_enable;
  54    uint32_t clip_mode;
  55    uint32_t uniform_buffer_bound[6];
  56    struct nvc0_transform_feedback_state *tfb;
  57    bool seamless_cube_map;
  58    bool post_depth_coverage;
  59 };
  60
  61 struct nvc0_screen {
  62    struct nouveau_screen base;
  63
  64    struct nvc0_context *cur_ctx;
  65    struct nvc0_graph_state save_state;
  66
  67    int num_occlusion_queries_active;
  68
  69    struct nouveau_bo *text;
  70    struct nouveau_bo *uniform_bo;
  71    struct nouveau_bo *tls;
  72    struct nouveau_bo *txc; /* TIC (offset 0) and TSC (65536) */
  73    struct nouveau_bo *poly_cache;
  74
  75    uint8_t gpc_count;
  76    uint16_t mp_count;
  77    uint16_t mp_count_compute; /* magic reg can make compute use fewer MPs */
  78
  79    struct nouveau_heap *text_heap;
  80    struct nouveau_heap *lib_code; /* allocated from text_heap */
  81
  82    struct nvc0_blitter *blitter;
  83
  84    struct nv50_tsc_entry *default_tsc;
  85
  86    struct {
  87       void **entries;
  88       int next;
  89       uint32_t lock[NVC0_TIC_MAX_ENTRIES / 32];
  90       bool maxwell;
  91    } tic;
  92
  93    struct {
  94       void **entries;
  95       int next;
  96       uint32_t lock[NVC0_TSC_MAX_ENTRIES / 32];
  97    } tsc;
  98
  99    struct {
 100       struct nouveau_bo *bo;
 101       uint32_t *map;
 102    } fence;
 103
 104    struct {
 105       struct nvc0_program *prog; /* compute state object to read MP counters */
 106       struct nvc0_hw_sm_query *mp_counter[8]; /* counter to query allocation */
 107       uint8_t num_hw_sm_active[2];
 108       bool mp_counters_enabled;
 109    } pm;
 110
 111    struct nouveau_object *eng3d; /* sqrt(1/2)|kepler> + sqrt(1/2)|fermi> */
 112    struct nouveau_object *eng2d;
 113    struct nouveau_object *m2mf;
 114    struct nouveau_object *compute;
 115    struct nouveau_object *nvsw;
 116 };
 117
 118 static inline struct nvc0_screen *
 119 nvc0_screen(struct pipe_screen *screen)
 120 {
 121    return (struct nvc0_screen *)screen;
 122 }
 123
 124 int nvc0_screen_get_driver_query_info(struct pipe_screen *, unsigned,
 125                                       struct pipe_driver_query_info *);
 126
 127 int nvc0_screen_get_driver_query_group_info(struct pipe_screen *, unsigned,
 128                                             struct pipe_driver_query_group_info *);
 129
 130 bool nvc0_blitter_create(struct nvc0_screen *);
 131 void nvc0_blitter_destroy(struct nvc0_screen *);
 132
 133 void nvc0_screen_make_buffers_resident(struct nvc0_screen *);
 134
 135 int nvc0_screen_tic_alloc(struct nvc0_screen *, void *);
 136 int nvc0_screen_tsc_alloc(struct nvc0_screen *, void *);
 137
 138 int nve4_screen_compute_setup(struct nvc0_screen *, struct nouveau_pushbuf *);
 139 int nvc0_screen_compute_setup(struct nvc0_screen *, struct nouveau_pushbuf *);
 140
 141 int nvc0_screen_resize_text_area(struct nvc0_screen *, uint64_t);
 142
 143 static inline void
 144 nvc0_resource_fence(struct nv04_resource *res, uint32_t flags)
 145 {
 146    struct nvc0_screen *screen = nvc0_screen(res->base.screen);
 147
 148    if (res->mm) {
 149       nouveau_fence_ref(screen->base.fence.current, &res->fence);
 150       if (flags & NOUVEAU_BO_WR)
 151          nouveau_fence_ref(screen->base.fence.current, &res->fence_wr);
 152    }
 153 }
 154
 155 static inline void
 156 nvc0_resource_validate(struct nv04_resource *res, uint32_t flags)
 157 {
 158    if (likely(res->bo)) {
 159       if (flags & NOUVEAU_BO_WR)
 160          res->status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING |
 161             NOUVEAU_BUFFER_STATUS_DIRTY;
 162       if (flags & NOUVEAU_BO_RD)
 163          res->status |= NOUVEAU_BUFFER_STATUS_GPU_READING;
 164
 165       nvc0_resource_fence(res, flags);
 166    }
 167 }
 168
 169 struct nvc0_format {
 170    uint32_t rt;
 171    struct {
 172       unsigned format:7;
 173       unsigned type_r:3;
 174       unsigned type_g:3;
 175       unsigned type_b:3;
 176       unsigned type_a:3;
 177       unsigned src_x:3;
 178       unsigned src_y:3;
 179       unsigned src_z:3;
 180       unsigned src_w:3;
 181    } tic;
 182    uint32_t usage;
 183 };
 184
 185 struct nvc0_vertex_format {
 186    uint32_t vtx;
 187    uint32_t usage;
 188 };
 189
 190 extern const struct nvc0_format nvc0_format_table[];
 191 extern const struct nvc0_vertex_format nvc0_vertex_format[];
 192
 193 static inline void
 194 nvc0_screen_tic_unlock(struct nvc0_screen *screen, struct nv50_tic_entry *tic)
 195 {
 196    if (tic->id >= 0)
 197       screen->tic.lock[tic->id / 32] &= ~(1 << (tic->id % 32));
 198 }
 199
 200 static inline void
 201 nvc0_screen_tsc_unlock(struct nvc0_screen *screen, struct nv50_tsc_entry *tsc)
 202 {
 203    if (tsc->id >= 0)
 204       screen->tsc.lock[tsc->id / 32] &= ~(1 << (tsc->id % 32));
 205 }
 206
 207 static inline void
 208 nvc0_screen_tic_free(struct nvc0_screen *screen, struct nv50_tic_entry *tic)
 209 {
 210    if (tic->id >= 0) {
 211       screen->tic.entries[tic->id] = NULL;
 212       screen->tic.lock[tic->id / 32] &= ~(1 << (tic->id % 32));
 213    }
 214 }
 215
 216 static inline void
 217 nvc0_screen_tsc_free(struct nvc0_screen *screen, struct nv50_tsc_entry *tsc)
 218 {
 219    if (tsc->id >= 0) {
 220       screen->tsc.entries[tsc->id] = NULL;
 221       screen->tsc.lock[tsc->id / 32] &= ~(1 << (tsc->id % 32));
 222    }
 223 }
 224
 225 #endif