2 * Copyright 2010 Christoph Bumiller
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
23 #include "pipe/p_context.h"
24 #include "pipe/p_defines.h"
25 #include "pipe/p_state.h"
26 #include "util/u_inlines.h"
28 #include "nvc0/nvc0_context.h"
31 nvc0_program_update_context_state(struct nvc0_context
*nvc0
,
32 struct nvc0_program
*prog
, int stage
)
34 struct nouveau_pushbuf
*push
= nvc0
->base
.pushbuf
;
36 if (prog
&& prog
->need_tls
) {
37 const uint32_t flags
= NV_VRAM_DOMAIN(&nvc0
->screen
->base
) | NOUVEAU_BO_RDWR
;
38 if (!nvc0
->state
.tls_required
)
39 BCTX_REFN_bo(nvc0
->bufctx_3d
, TLS
, flags
, nvc0
->screen
->tls
);
40 nvc0
->state
.tls_required
|= 1 << stage
;
42 if (nvc0
->state
.tls_required
== (1 << stage
))
43 nouveau_bufctx_reset(nvc0
->bufctx_3d
, NVC0_BIND_TLS
);
44 nvc0
->state
.tls_required
&= ~(1 << stage
);
47 if (prog
&& prog
->immd_size
) {
48 BEGIN_NVC0(push
, NVC0_3D(CB_SIZE
), 3);
49 /* NOTE: may overlap code of a different shader */
50 PUSH_DATA (push
, align(prog
->immd_size
, 0x100));
51 PUSH_DATAh(push
, nvc0
->screen
->text
->offset
+ prog
->immd_base
);
52 PUSH_DATA (push
, nvc0
->screen
->text
->offset
+ prog
->immd_base
);
53 BEGIN_NVC0(push
, NVC0_3D(CB_BIND(stage
)), 1);
54 PUSH_DATA (push
, (14 << 4) | 1);
56 nvc0
->state
.c14_bound
|= 1 << stage
;
58 if (nvc0
->state
.c14_bound
& (1 << stage
)) {
59 BEGIN_NVC0(push
, NVC0_3D(CB_BIND(stage
)), 1);
60 PUSH_DATA (push
, (14 << 4) | 0);
62 nvc0
->state
.c14_bound
&= ~(1 << stage
);
67 nvc0_program_validate(struct nvc0_context
*nvc0
, struct nvc0_program
*prog
)
72 if (!prog
->translated
) {
73 prog
->translated
= nvc0_program_translate(
74 prog
, nvc0
->screen
->base
.device
->chipset
);
75 if (!prog
->translated
)
79 if (likely(prog
->code_size
))
80 return nvc0_program_upload_code(nvc0
, prog
);
81 return true; /* stream output info only */
85 nvc0_vertprog_validate(struct nvc0_context
*nvc0
)
87 struct nouveau_pushbuf
*push
= nvc0
->base
.pushbuf
;
88 struct nvc0_program
*vp
= nvc0
->vertprog
;
90 if (!nvc0_program_validate(nvc0
, vp
))
92 nvc0_program_update_context_state(nvc0
, vp
, 0);
94 BEGIN_NVC0(push
, NVC0_3D(SP_SELECT(1)), 2);
95 PUSH_DATA (push
, 0x11);
96 PUSH_DATA (push
, vp
->code_base
);
97 BEGIN_NVC0(push
, NVC0_3D(SP_GPR_ALLOC(1)), 1);
98 PUSH_DATA (push
, vp
->num_gprs
);
100 // BEGIN_NVC0(push, NVC0_3D_(0x163c), 1);
101 // PUSH_DATA (push, 0);
105 nvc0_fragprog_validate(struct nvc0_context
*nvc0
)
107 struct nouveau_pushbuf
*push
= nvc0
->base
.pushbuf
;
108 struct nvc0_program
*fp
= nvc0
->fragprog
;
110 fp
->fp
.sample_interp
= nvc0
->min_samples
> 1;
112 if (!nvc0_program_validate(nvc0
, fp
))
114 nvc0_program_update_context_state(nvc0
, fp
, 4);
116 if (fp
->fp
.early_z
!= nvc0
->state
.early_z_forced
) {
117 nvc0
->state
.early_z_forced
= fp
->fp
.early_z
;
118 IMMED_NVC0(push
, NVC0_3D(FORCE_EARLY_FRAGMENT_TESTS
), fp
->fp
.early_z
);
121 BEGIN_NVC0(push
, NVC0_3D(SP_SELECT(5)), 2);
122 PUSH_DATA (push
, 0x51);
123 PUSH_DATA (push
, fp
->code_base
);
124 BEGIN_NVC0(push
, NVC0_3D(SP_GPR_ALLOC(5)), 1);
125 PUSH_DATA (push
, fp
->num_gprs
);
127 BEGIN_NVC0(push
, SUBC_3D(0x0360), 2);
128 PUSH_DATA (push
, 0x20164010);
129 PUSH_DATA (push
, 0x20);
130 BEGIN_NVC0(push
, NVC0_3D(ZCULL_TEST_MASK
), 1);
131 PUSH_DATA (push
, fp
->flags
[0]);
135 nvc0_tctlprog_validate(struct nvc0_context
*nvc0
)
137 struct nouveau_pushbuf
*push
= nvc0
->base
.pushbuf
;
138 struct nvc0_program
*tp
= nvc0
->tctlprog
;
140 if (tp
&& nvc0_program_validate(nvc0
, tp
)) {
141 if (tp
->tp
.tess_mode
!= ~0) {
142 BEGIN_NVC0(push
, NVC0_3D(TESS_MODE
), 1);
143 PUSH_DATA (push
, tp
->tp
.tess_mode
);
145 BEGIN_NVC0(push
, NVC0_3D(SP_SELECT(2)), 2);
146 PUSH_DATA (push
, 0x21);
147 PUSH_DATA (push
, tp
->code_base
);
148 BEGIN_NVC0(push
, NVC0_3D(SP_GPR_ALLOC(2)), 1);
149 PUSH_DATA (push
, tp
->num_gprs
);
151 tp
= nvc0
->tcp_empty
;
152 /* not a whole lot we can do to handle this failure */
153 if (!nvc0_program_validate(nvc0
, tp
))
154 assert(!"unable to validate empty tcp");
155 BEGIN_NVC0(push
, NVC0_3D(SP_SELECT(2)), 2);
156 PUSH_DATA (push
, 0x20);
157 PUSH_DATA (push
, tp
->code_base
);
159 nvc0_program_update_context_state(nvc0
, tp
, 1);
163 nvc0_tevlprog_validate(struct nvc0_context
*nvc0
)
165 struct nouveau_pushbuf
*push
= nvc0
->base
.pushbuf
;
166 struct nvc0_program
*tp
= nvc0
->tevlprog
;
168 if (tp
&& nvc0_program_validate(nvc0
, tp
)) {
169 if (tp
->tp
.tess_mode
!= ~0) {
170 BEGIN_NVC0(push
, NVC0_3D(TESS_MODE
), 1);
171 PUSH_DATA (push
, tp
->tp
.tess_mode
);
173 BEGIN_NVC0(push
, NVC0_3D(MACRO_TEP_SELECT
), 1);
174 PUSH_DATA (push
, 0x31);
175 BEGIN_NVC0(push
, NVC0_3D(SP_START_ID(3)), 1);
176 PUSH_DATA (push
, tp
->code_base
);
177 BEGIN_NVC0(push
, NVC0_3D(SP_GPR_ALLOC(3)), 1);
178 PUSH_DATA (push
, tp
->num_gprs
);
180 BEGIN_NVC0(push
, NVC0_3D(MACRO_TEP_SELECT
), 1);
181 PUSH_DATA (push
, 0x30);
183 nvc0_program_update_context_state(nvc0
, tp
, 2);
187 nvc0_gmtyprog_validate(struct nvc0_context
*nvc0
)
189 struct nouveau_pushbuf
*push
= nvc0
->base
.pushbuf
;
190 struct nvc0_program
*gp
= nvc0
->gmtyprog
;
193 nvc0_program_validate(nvc0
, gp
);
195 /* we allow GPs with no code for specifying stream output state only */
196 if (gp
&& gp
->code_size
) {
197 const bool gp_selects_layer
= !!(gp
->hdr
[13] & (1 << 9));
199 BEGIN_NVC0(push
, NVC0_3D(MACRO_GP_SELECT
), 1);
200 PUSH_DATA (push
, 0x41);
201 BEGIN_NVC0(push
, NVC0_3D(SP_START_ID(4)), 1);
202 PUSH_DATA (push
, gp
->code_base
);
203 BEGIN_NVC0(push
, NVC0_3D(SP_GPR_ALLOC(4)), 1);
204 PUSH_DATA (push
, gp
->num_gprs
);
205 BEGIN_NVC0(push
, NVC0_3D(LAYER
), 1);
206 PUSH_DATA (push
, gp_selects_layer
? NVC0_3D_LAYER_USE_GP
: 0);
208 IMMED_NVC0(push
, NVC0_3D(LAYER
), 0);
209 BEGIN_NVC0(push
, NVC0_3D(MACRO_GP_SELECT
), 1);
210 PUSH_DATA (push
, 0x40);
212 nvc0_program_update_context_state(nvc0
, gp
, 3);
216 nvc0_tfb_validate(struct nvc0_context
*nvc0
)
218 struct nouveau_pushbuf
*push
= nvc0
->base
.pushbuf
;
219 struct nvc0_transform_feedback_state
*tfb
;
222 if (nvc0
->gmtyprog
) tfb
= nvc0
->gmtyprog
->tfb
;
224 if (nvc0
->tevlprog
) tfb
= nvc0
->tevlprog
->tfb
;
226 tfb
= nvc0
->vertprog
->tfb
;
228 IMMED_NVC0(push
, NVC0_3D(TFB_ENABLE
), (tfb
&& nvc0
->num_tfbbufs
) ? 1 : 0);
230 if (tfb
&& tfb
!= nvc0
->state
.tfb
) {
231 for (b
= 0; b
< 4; ++b
) {
232 if (tfb
->varying_count
[b
]) {
233 unsigned n
= (tfb
->varying_count
[b
] + 3) / 4;
235 BEGIN_NVC0(push
, NVC0_3D(TFB_STREAM(b
)), 3);
236 PUSH_DATA (push
, tfb
->stream
[b
]);
237 PUSH_DATA (push
, tfb
->varying_count
[b
]);
238 PUSH_DATA (push
, tfb
->stride
[b
]);
239 BEGIN_NVC0(push
, NVC0_3D(TFB_VARYING_LOCS(b
, 0)), n
);
240 PUSH_DATAp(push
, tfb
->varying_index
[b
], n
);
243 nvc0_so_target(nvc0
->tfbbuf
[b
])->stride
= tfb
->stride
[b
];
245 IMMED_NVC0(push
, NVC0_3D(TFB_VARYING_COUNT(b
)), 0);
249 nvc0
->state
.tfb
= tfb
;
251 if (!(nvc0
->dirty
& NVC0_NEW_TFB_TARGETS
))
253 nouveau_bufctx_reset(nvc0
->bufctx_3d
, NVC0_BIND_TFB
);
255 for (b
= 0; b
< nvc0
->num_tfbbufs
; ++b
) {
256 struct nvc0_so_target
*targ
= nvc0_so_target(nvc0
->tfbbuf
[b
]);
257 struct nv04_resource
*buf
;
260 IMMED_NVC0(push
, NVC0_3D(TFB_BUFFER_ENABLE(b
)), 0);
265 targ
->stride
= tfb
->stride
[b
];
267 buf
= nv04_resource(targ
->pipe
.buffer
);
269 BCTX_REFN(nvc0
->bufctx_3d
, TFB
, buf
, WR
);
271 if (!(nvc0
->tfbbuf_dirty
& (1 << b
)))
275 nvc0_query_fifo_wait(push
, targ
->pq
);
276 BEGIN_NVC0(push
, NVC0_3D(TFB_BUFFER_ENABLE(b
)), 5);
278 PUSH_DATAh(push
, buf
->address
+ targ
->pipe
.buffer_offset
);
279 PUSH_DATA (push
, buf
->address
+ targ
->pipe
.buffer_offset
);
280 PUSH_DATA (push
, targ
->pipe
.buffer_size
);
282 nvc0_query_pushbuf_submit(push
, targ
->pq
, 0x4);
284 PUSH_DATA(push
, 0); /* TFB_BUFFER_OFFSET */
289 IMMED_NVC0(push
, NVC0_3D(TFB_BUFFER_ENABLE(b
)), 0);