2 * Copyright 2010 Christoph Bumiller
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
23 #include "pipe/p_defines.h"
24 #include "util/u_helpers.h"
25 #include "util/u_inlines.h"
26 #include "util/u_transfer.h"
28 #include "tgsi/tgsi_parse.h"
30 #include "nvc0/nvc0_stateobj.h"
31 #include "nvc0/nvc0_context.h"
33 #include "nvc0/nvc0_3d.xml.h"
34 #include "nv50/nv50_texture.xml.h"
36 #include "nouveau_gldefs.h"
38 static inline uint32_t
39 nvc0_colormask(unsigned mask
)
43 if (mask
& PIPE_MASK_R
)
45 if (mask
& PIPE_MASK_G
)
47 if (mask
& PIPE_MASK_B
)
49 if (mask
& PIPE_MASK_A
)
55 #define NVC0_BLEND_FACTOR_CASE(a, b) \
56 case PIPE_BLENDFACTOR_##a: return NV50_BLEND_FACTOR_##b
58 static inline uint32_t
59 nvc0_blend_fac(unsigned factor
)
62 NVC0_BLEND_FACTOR_CASE(ONE
, ONE
);
63 NVC0_BLEND_FACTOR_CASE(SRC_COLOR
, SRC_COLOR
);
64 NVC0_BLEND_FACTOR_CASE(SRC_ALPHA
, SRC_ALPHA
);
65 NVC0_BLEND_FACTOR_CASE(DST_ALPHA
, DST_ALPHA
);
66 NVC0_BLEND_FACTOR_CASE(DST_COLOR
, DST_COLOR
);
67 NVC0_BLEND_FACTOR_CASE(SRC_ALPHA_SATURATE
, SRC_ALPHA_SATURATE
);
68 NVC0_BLEND_FACTOR_CASE(CONST_COLOR
, CONSTANT_COLOR
);
69 NVC0_BLEND_FACTOR_CASE(CONST_ALPHA
, CONSTANT_ALPHA
);
70 NVC0_BLEND_FACTOR_CASE(SRC1_COLOR
, SRC1_COLOR
);
71 NVC0_BLEND_FACTOR_CASE(SRC1_ALPHA
, SRC1_ALPHA
);
72 NVC0_BLEND_FACTOR_CASE(ZERO
, ZERO
);
73 NVC0_BLEND_FACTOR_CASE(INV_SRC_COLOR
, ONE_MINUS_SRC_COLOR
);
74 NVC0_BLEND_FACTOR_CASE(INV_SRC_ALPHA
, ONE_MINUS_SRC_ALPHA
);
75 NVC0_BLEND_FACTOR_CASE(INV_DST_ALPHA
, ONE_MINUS_DST_ALPHA
);
76 NVC0_BLEND_FACTOR_CASE(INV_DST_COLOR
, ONE_MINUS_DST_COLOR
);
77 NVC0_BLEND_FACTOR_CASE(INV_CONST_COLOR
, ONE_MINUS_CONSTANT_COLOR
);
78 NVC0_BLEND_FACTOR_CASE(INV_CONST_ALPHA
, ONE_MINUS_CONSTANT_ALPHA
);
79 NVC0_BLEND_FACTOR_CASE(INV_SRC1_COLOR
, ONE_MINUS_SRC1_COLOR
);
80 NVC0_BLEND_FACTOR_CASE(INV_SRC1_ALPHA
, ONE_MINUS_SRC1_ALPHA
);
82 return NV50_BLEND_FACTOR_ZERO
;
87 nvc0_blend_state_create(struct pipe_context
*pipe
,
88 const struct pipe_blend_state
*cso
)
90 struct nvc0_blend_stateobj
*so
= CALLOC_STRUCT(nvc0_blend_stateobj
);
92 int r
; /* reference */
94 bool indep_masks
= false;
95 bool indep_funcs
= false;
99 /* check which states actually have differing values */
100 if (cso
->independent_blend_enable
) {
101 for (r
= 0; r
< 8 && !cso
->rt
[r
].blend_enable
; ++r
);
103 for (i
= r
+ 1; i
< 8; ++i
) {
104 if (!cso
->rt
[i
].blend_enable
)
107 if (cso
->rt
[i
].rgb_func
!= cso
->rt
[r
].rgb_func
||
108 cso
->rt
[i
].rgb_src_factor
!= cso
->rt
[r
].rgb_src_factor
||
109 cso
->rt
[i
].rgb_dst_factor
!= cso
->rt
[r
].rgb_dst_factor
||
110 cso
->rt
[i
].alpha_func
!= cso
->rt
[r
].alpha_func
||
111 cso
->rt
[i
].alpha_src_factor
!= cso
->rt
[r
].alpha_src_factor
||
112 cso
->rt
[i
].alpha_dst_factor
!= cso
->rt
[r
].alpha_dst_factor
) {
118 blend_en
|= (cso
->rt
[i
].blend_enable
? 1 : 0) << i
;
120 for (i
= 1; i
< 8; ++i
) {
121 if (cso
->rt
[i
].colormask
!= cso
->rt
[0].colormask
) {
128 if (cso
->rt
[0].blend_enable
)
132 if (cso
->logicop_enable
) {
133 SB_BEGIN_3D(so
, LOGIC_OP_ENABLE
, 2);
135 SB_DATA (so
, nvgl_logicop_func(cso
->logicop_func
));
137 SB_IMMED_3D(so
, MACRO_BLEND_ENABLES
, 0);
139 SB_IMMED_3D(so
, LOGIC_OP_ENABLE
, 0);
141 SB_IMMED_3D(so
, BLEND_INDEPENDENT
, indep_funcs
);
142 SB_IMMED_3D(so
, MACRO_BLEND_ENABLES
, blend_en
);
144 for (i
= 0; i
< 8; ++i
) {
145 if (cso
->rt
[i
].blend_enable
) {
146 SB_BEGIN_3D(so
, IBLEND_EQUATION_RGB(i
), 6);
147 SB_DATA (so
, nvgl_blend_eqn(cso
->rt
[i
].rgb_func
));
148 SB_DATA (so
, nvc0_blend_fac(cso
->rt
[i
].rgb_src_factor
));
149 SB_DATA (so
, nvc0_blend_fac(cso
->rt
[i
].rgb_dst_factor
));
150 SB_DATA (so
, nvgl_blend_eqn(cso
->rt
[i
].alpha_func
));
151 SB_DATA (so
, nvc0_blend_fac(cso
->rt
[i
].alpha_src_factor
));
152 SB_DATA (so
, nvc0_blend_fac(cso
->rt
[i
].alpha_dst_factor
));
157 SB_BEGIN_3D(so
, BLEND_EQUATION_RGB
, 5);
158 SB_DATA (so
, nvgl_blend_eqn(cso
->rt
[r
].rgb_func
));
159 SB_DATA (so
, nvc0_blend_fac(cso
->rt
[r
].rgb_src_factor
));
160 SB_DATA (so
, nvc0_blend_fac(cso
->rt
[r
].rgb_dst_factor
));
161 SB_DATA (so
, nvgl_blend_eqn(cso
->rt
[r
].alpha_func
));
162 SB_DATA (so
, nvc0_blend_fac(cso
->rt
[r
].alpha_src_factor
));
163 SB_BEGIN_3D(so
, BLEND_FUNC_DST_ALPHA
, 1);
164 SB_DATA (so
, nvc0_blend_fac(cso
->rt
[r
].alpha_dst_factor
));
167 SB_IMMED_3D(so
, COLOR_MASK_COMMON
, !indep_masks
);
169 SB_BEGIN_3D(so
, COLOR_MASK(0), 8);
170 for (i
= 0; i
< 8; ++i
)
171 SB_DATA(so
, nvc0_colormask(cso
->rt
[i
].colormask
));
173 SB_BEGIN_3D(so
, COLOR_MASK(0), 1);
174 SB_DATA (so
, nvc0_colormask(cso
->rt
[0].colormask
));
178 assert(so
->size
<= (sizeof(so
->state
) / sizeof(so
->state
[0])));
183 nvc0_blend_state_bind(struct pipe_context
*pipe
, void *hwcso
)
185 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
188 nvc0
->dirty
|= NVC0_NEW_BLEND
;
192 nvc0_blend_state_delete(struct pipe_context
*pipe
, void *hwcso
)
197 /* NOTE: ignoring line_last_pixel */
199 nvc0_rasterizer_state_create(struct pipe_context
*pipe
,
200 const struct pipe_rasterizer_state
*cso
)
202 struct nvc0_rasterizer_stateobj
*so
;
205 so
= CALLOC_STRUCT(nvc0_rasterizer_stateobj
);
210 /* Scissor enables are handled in scissor state, we will not want to
211 * always emit 16 commands, one for each scissor rectangle, here.
214 SB_BEGIN_3D(so
, SHADE_MODEL
, 1);
215 SB_DATA (so
, cso
->flatshade
? NVC0_3D_SHADE_MODEL_FLAT
:
216 NVC0_3D_SHADE_MODEL_SMOOTH
);
217 SB_IMMED_3D(so
, PROVOKING_VERTEX_LAST
, !cso
->flatshade_first
);
218 SB_IMMED_3D(so
, VERTEX_TWO_SIDE_ENABLE
, cso
->light_twoside
);
220 SB_IMMED_3D(so
, VERT_COLOR_CLAMP_EN
, cso
->clamp_vertex_color
);
221 SB_BEGIN_3D(so
, FRAG_COLOR_CLAMP_EN
, 1);
222 SB_DATA (so
, cso
->clamp_fragment_color
? 0x11111111 : 0x00000000);
224 SB_IMMED_3D(so
, MULTISAMPLE_ENABLE
, cso
->multisample
);
226 SB_IMMED_3D(so
, LINE_SMOOTH_ENABLE
, cso
->line_smooth
);
227 if (cso
->line_smooth
|| cso
->multisample
)
228 SB_BEGIN_3D(so
, LINE_WIDTH_SMOOTH
, 1);
230 SB_BEGIN_3D(so
, LINE_WIDTH_ALIASED
, 1);
231 SB_DATA (so
, fui(cso
->line_width
));
233 SB_IMMED_3D(so
, LINE_STIPPLE_ENABLE
, cso
->line_stipple_enable
);
234 if (cso
->line_stipple_enable
) {
235 SB_BEGIN_3D(so
, LINE_STIPPLE_PATTERN
, 1);
236 SB_DATA (so
, (cso
->line_stipple_pattern
<< 8) |
237 cso
->line_stipple_factor
);
241 SB_IMMED_3D(so
, VP_POINT_SIZE
, cso
->point_size_per_vertex
);
242 if (!cso
->point_size_per_vertex
) {
243 SB_BEGIN_3D(so
, POINT_SIZE
, 1);
244 SB_DATA (so
, fui(cso
->point_size
));
247 reg
= (cso
->sprite_coord_mode
== PIPE_SPRITE_COORD_UPPER_LEFT
) ?
248 NVC0_3D_POINT_COORD_REPLACE_COORD_ORIGIN_UPPER_LEFT
:
249 NVC0_3D_POINT_COORD_REPLACE_COORD_ORIGIN_LOWER_LEFT
;
251 SB_BEGIN_3D(so
, POINT_COORD_REPLACE
, 1);
252 SB_DATA (so
, ((cso
->sprite_coord_enable
& 0xff) << 3) | reg
);
253 SB_IMMED_3D(so
, POINT_SPRITE_ENABLE
, cso
->point_quad_rasterization
);
254 SB_IMMED_3D(so
, POINT_SMOOTH_ENABLE
, cso
->point_smooth
);
256 SB_BEGIN_3D(so
, MACRO_POLYGON_MODE_FRONT
, 1);
257 SB_DATA (so
, nvgl_polygon_mode(cso
->fill_front
));
258 SB_BEGIN_3D(so
, MACRO_POLYGON_MODE_BACK
, 1);
259 SB_DATA (so
, nvgl_polygon_mode(cso
->fill_back
));
260 SB_IMMED_3D(so
, POLYGON_SMOOTH_ENABLE
, cso
->poly_smooth
);
262 SB_BEGIN_3D(so
, CULL_FACE_ENABLE
, 3);
263 SB_DATA (so
, cso
->cull_face
!= PIPE_FACE_NONE
);
264 SB_DATA (so
, cso
->front_ccw
? NVC0_3D_FRONT_FACE_CCW
:
265 NVC0_3D_FRONT_FACE_CW
);
266 switch (cso
->cull_face
) {
267 case PIPE_FACE_FRONT_AND_BACK
:
268 SB_DATA(so
, NVC0_3D_CULL_FACE_FRONT_AND_BACK
);
270 case PIPE_FACE_FRONT
:
271 SB_DATA(so
, NVC0_3D_CULL_FACE_FRONT
);
275 SB_DATA(so
, NVC0_3D_CULL_FACE_BACK
);
279 SB_IMMED_3D(so
, POLYGON_STIPPLE_ENABLE
, cso
->poly_stipple_enable
);
280 SB_BEGIN_3D(so
, POLYGON_OFFSET_POINT_ENABLE
, 3);
281 SB_DATA (so
, cso
->offset_point
);
282 SB_DATA (so
, cso
->offset_line
);
283 SB_DATA (so
, cso
->offset_tri
);
285 if (cso
->offset_point
|| cso
->offset_line
|| cso
->offset_tri
) {
286 SB_BEGIN_3D(so
, POLYGON_OFFSET_FACTOR
, 1);
287 SB_DATA (so
, fui(cso
->offset_scale
));
288 SB_BEGIN_3D(so
, POLYGON_OFFSET_UNITS
, 1);
289 SB_DATA (so
, fui(cso
->offset_units
* 2.0f
));
290 SB_BEGIN_3D(so
, POLYGON_OFFSET_CLAMP
, 1);
291 SB_DATA (so
, fui(cso
->offset_clamp
));
295 reg
= NVC0_3D_VIEW_VOLUME_CLIP_CTRL_UNK1_UNK1
;
298 NVC0_3D_VIEW_VOLUME_CLIP_CTRL_UNK1_UNK1
|
299 NVC0_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_CLAMP_NEAR
|
300 NVC0_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_CLAMP_FAR
|
301 NVC0_3D_VIEW_VOLUME_CLIP_CTRL_UNK12_UNK2
;
303 SB_BEGIN_3D(so
, VIEW_VOLUME_CLIP_CTRL
, 1);
306 SB_IMMED_3D(so
, DEPTH_CLIP_NEGATIVE_Z
, cso
->clip_halfz
);
308 SB_IMMED_3D(so
, PIXEL_CENTER_INTEGER
, !cso
->half_pixel_center
);
310 assert(so
->size
<= (sizeof(so
->state
) / sizeof(so
->state
[0])));
315 nvc0_rasterizer_state_bind(struct pipe_context
*pipe
, void *hwcso
)
317 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
320 nvc0
->dirty
|= NVC0_NEW_RASTERIZER
;
324 nvc0_rasterizer_state_delete(struct pipe_context
*pipe
, void *hwcso
)
330 nvc0_zsa_state_create(struct pipe_context
*pipe
,
331 const struct pipe_depth_stencil_alpha_state
*cso
)
333 struct nvc0_zsa_stateobj
*so
= CALLOC_STRUCT(nvc0_zsa_stateobj
);
337 SB_IMMED_3D(so
, DEPTH_TEST_ENABLE
, cso
->depth
.enabled
);
338 if (cso
->depth
.enabled
) {
339 SB_IMMED_3D(so
, DEPTH_WRITE_ENABLE
, cso
->depth
.writemask
);
340 SB_BEGIN_3D(so
, DEPTH_TEST_FUNC
, 1);
341 SB_DATA (so
, nvgl_comparison_op(cso
->depth
.func
));
344 SB_IMMED_3D(so
, DEPTH_BOUNDS_EN
, cso
->depth
.bounds_test
);
345 if (cso
->depth
.bounds_test
) {
346 SB_BEGIN_3D(so
, DEPTH_BOUNDS(0), 2);
347 SB_DATA (so
, fui(cso
->depth
.bounds_min
));
348 SB_DATA (so
, fui(cso
->depth
.bounds_max
));
351 if (cso
->stencil
[0].enabled
) {
352 SB_BEGIN_3D(so
, STENCIL_ENABLE
, 5);
354 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[0].fail_op
));
355 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[0].zfail_op
));
356 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[0].zpass_op
));
357 SB_DATA (so
, nvgl_comparison_op(cso
->stencil
[0].func
));
358 SB_BEGIN_3D(so
, STENCIL_FRONT_FUNC_MASK
, 2);
359 SB_DATA (so
, cso
->stencil
[0].valuemask
);
360 SB_DATA (so
, cso
->stencil
[0].writemask
);
362 SB_IMMED_3D(so
, STENCIL_ENABLE
, 0);
365 if (cso
->stencil
[1].enabled
) {
366 assert(cso
->stencil
[0].enabled
);
367 SB_BEGIN_3D(so
, STENCIL_TWO_SIDE_ENABLE
, 5);
369 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[1].fail_op
));
370 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[1].zfail_op
));
371 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[1].zpass_op
));
372 SB_DATA (so
, nvgl_comparison_op(cso
->stencil
[1].func
));
373 SB_BEGIN_3D(so
, STENCIL_BACK_MASK
, 2);
374 SB_DATA (so
, cso
->stencil
[1].writemask
);
375 SB_DATA (so
, cso
->stencil
[1].valuemask
);
377 if (cso
->stencil
[0].enabled
) {
378 SB_IMMED_3D(so
, STENCIL_TWO_SIDE_ENABLE
, 0);
381 SB_IMMED_3D(so
, ALPHA_TEST_ENABLE
, cso
->alpha
.enabled
);
382 if (cso
->alpha
.enabled
) {
383 SB_BEGIN_3D(so
, ALPHA_TEST_REF
, 2);
384 SB_DATA (so
, fui(cso
->alpha
.ref_value
));
385 SB_DATA (so
, nvgl_comparison_op(cso
->alpha
.func
));
388 assert(so
->size
<= (sizeof(so
->state
) / sizeof(so
->state
[0])));
393 nvc0_zsa_state_bind(struct pipe_context
*pipe
, void *hwcso
)
395 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
398 nvc0
->dirty
|= NVC0_NEW_ZSA
;
402 nvc0_zsa_state_delete(struct pipe_context
*pipe
, void *hwcso
)
407 /* ====================== SAMPLERS AND TEXTURES ================================
410 #define NV50_TSC_WRAP_CASE(n) \
411 case PIPE_TEX_WRAP_##n: return NV50_TSC_WRAP_##n
414 nvc0_sampler_state_delete(struct pipe_context
*pipe
, void *hwcso
)
418 for (s
= 0; s
< 5; ++s
)
419 for (i
= 0; i
< nvc0_context(pipe
)->num_samplers
[s
]; ++i
)
420 if (nvc0_context(pipe
)->samplers
[s
][i
] == hwcso
)
421 nvc0_context(pipe
)->samplers
[s
][i
] = NULL
;
423 nvc0_screen_tsc_free(nvc0_context(pipe
)->screen
, nv50_tsc_entry(hwcso
));
429 nvc0_stage_sampler_states_bind(struct nvc0_context
*nvc0
, int s
,
430 unsigned nr
, void **hwcso
)
434 for (i
= 0; i
< nr
; ++i
) {
435 struct nv50_tsc_entry
*old
= nvc0
->samplers
[s
][i
];
439 nvc0
->samplers_dirty
[s
] |= 1 << i
;
441 nvc0
->samplers
[s
][i
] = nv50_tsc_entry(hwcso
[i
]);
443 nvc0_screen_tsc_unlock(nvc0
->screen
, old
);
445 for (; i
< nvc0
->num_samplers
[s
]; ++i
) {
446 if (nvc0
->samplers
[s
][i
]) {
447 nvc0_screen_tsc_unlock(nvc0
->screen
, nvc0
->samplers
[s
][i
]);
448 nvc0
->samplers
[s
][i
] = NULL
;
452 nvc0
->num_samplers
[s
] = nr
;
454 nvc0
->dirty
|= NVC0_NEW_SAMPLERS
;
458 nvc0_stage_sampler_states_bind_range(struct nvc0_context
*nvc0
,
460 unsigned start
, unsigned nr
, void **cso
)
462 const unsigned end
= start
+ nr
;
467 for (i
= start
; i
< end
; ++i
) {
468 const unsigned p
= i
- start
;
471 if (cso
[p
] == nvc0
->samplers
[s
][i
])
473 nvc0
->samplers_dirty
[s
] |= 1 << i
;
475 if (nvc0
->samplers
[s
][i
])
476 nvc0_screen_tsc_unlock(nvc0
->screen
, nvc0
->samplers
[s
][i
]);
477 nvc0
->samplers
[s
][i
] = cso
[p
];
480 for (i
= start
; i
< end
; ++i
) {
481 if (nvc0
->samplers
[s
][i
]) {
482 nvc0_screen_tsc_unlock(nvc0
->screen
, nvc0
->samplers
[s
][i
]);
483 nvc0
->samplers
[s
][i
] = NULL
;
484 nvc0
->samplers_dirty
[s
] |= 1 << i
;
489 if (nvc0
->num_samplers
[s
] <= end
) {
490 if (last_valid
< 0) {
491 for (i
= start
; i
&& !nvc0
->samplers
[s
][i
- 1]; --i
);
492 nvc0
->num_samplers
[s
] = i
;
494 nvc0
->num_samplers
[s
] = last_valid
+ 1;
500 nvc0_bind_sampler_states(struct pipe_context
*pipe
, unsigned shader
,
501 unsigned start
, unsigned nr
, void **s
)
504 case PIPE_SHADER_VERTEX
:
506 nvc0_stage_sampler_states_bind(nvc0_context(pipe
), 0, nr
, s
);
508 case PIPE_SHADER_TESS_CTRL
:
510 nvc0_stage_sampler_states_bind(nvc0_context(pipe
), 1, nr
, s
);
512 case PIPE_SHADER_TESS_EVAL
:
514 nvc0_stage_sampler_states_bind(nvc0_context(pipe
), 2, nr
, s
);
516 case PIPE_SHADER_GEOMETRY
:
518 nvc0_stage_sampler_states_bind(nvc0_context(pipe
), 3, nr
, s
);
520 case PIPE_SHADER_FRAGMENT
:
522 nvc0_stage_sampler_states_bind(nvc0_context(pipe
), 4, nr
, s
);
524 case PIPE_SHADER_COMPUTE
:
525 nvc0_stage_sampler_states_bind_range(nvc0_context(pipe
), 5,
527 nvc0_context(pipe
)->dirty_cp
|= NVC0_NEW_CP_SAMPLERS
;
533 /* NOTE: only called when not referenced anywhere, won't be bound */
535 nvc0_sampler_view_destroy(struct pipe_context
*pipe
,
536 struct pipe_sampler_view
*view
)
538 pipe_resource_reference(&view
->texture
, NULL
);
540 nvc0_screen_tic_free(nvc0_context(pipe
)->screen
, nv50_tic_entry(view
));
542 FREE(nv50_tic_entry(view
));
546 nvc0_stage_set_sampler_views(struct nvc0_context
*nvc0
, int s
,
548 struct pipe_sampler_view
**views
)
552 for (i
= 0; i
< nr
; ++i
) {
553 struct nv50_tic_entry
*old
= nv50_tic_entry(nvc0
->textures
[s
][i
]);
555 if (views
[i
] == nvc0
->textures
[s
][i
])
557 nvc0
->textures_dirty
[s
] |= 1 << i
;
560 nouveau_bufctx_reset(nvc0
->bufctx_3d
, NVC0_BIND_TEX(s
, i
));
561 nvc0_screen_tic_unlock(nvc0
->screen
, old
);
564 pipe_sampler_view_reference(&nvc0
->textures
[s
][i
], views
[i
]);
567 for (i
= nr
; i
< nvc0
->num_textures
[s
]; ++i
) {
568 struct nv50_tic_entry
*old
= nv50_tic_entry(nvc0
->textures
[s
][i
]);
570 nouveau_bufctx_reset(nvc0
->bufctx_3d
, NVC0_BIND_TEX(s
, i
));
571 nvc0_screen_tic_unlock(nvc0
->screen
, old
);
572 pipe_sampler_view_reference(&nvc0
->textures
[s
][i
], NULL
);
576 nvc0
->num_textures
[s
] = nr
;
578 nvc0
->dirty
|= NVC0_NEW_TEXTURES
;
582 nvc0_stage_set_sampler_views_range(struct nvc0_context
*nvc0
, const unsigned s
,
583 unsigned start
, unsigned nr
,
584 struct pipe_sampler_view
**views
)
586 struct nouveau_bufctx
*bctx
= (s
== 5) ? nvc0
->bufctx_cp
: nvc0
->bufctx_3d
;
587 const unsigned end
= start
+ nr
;
588 const unsigned bin
= (s
== 5) ? NVC0_BIND_CP_TEX(0) : NVC0_BIND_TEX(s
, 0);
593 for (i
= start
; i
< end
; ++i
) {
594 const unsigned p
= i
- start
;
597 if (views
[p
] == nvc0
->textures
[s
][i
])
599 nvc0
->textures_dirty
[s
] |= 1 << i
;
601 if (nvc0
->textures
[s
][i
]) {
602 struct nv50_tic_entry
*old
= nv50_tic_entry(nvc0
->textures
[s
][i
]);
603 nouveau_bufctx_reset(bctx
, bin
+ i
);
604 nvc0_screen_tic_unlock(nvc0
->screen
, old
);
606 pipe_sampler_view_reference(&nvc0
->textures
[s
][i
], views
[p
]);
609 for (i
= start
; i
< end
; ++i
) {
610 struct nv50_tic_entry
*old
= nv50_tic_entry(nvc0
->textures
[s
][i
]);
613 nvc0
->textures_dirty
[s
] |= 1 << i
;
615 nvc0_screen_tic_unlock(nvc0
->screen
, old
);
616 pipe_sampler_view_reference(&nvc0
->textures
[s
][i
], NULL
);
617 nouveau_bufctx_reset(bctx
, bin
+ i
);
621 if (nvc0
->num_textures
[s
] <= end
) {
622 if (last_valid
< 0) {
623 for (i
= start
; i
&& !nvc0
->textures
[s
][i
- 1]; --i
);
624 nvc0
->num_textures
[s
] = i
;
626 nvc0
->num_textures
[s
] = last_valid
+ 1;
632 nvc0_set_sampler_views(struct pipe_context
*pipe
, unsigned shader
,
633 unsigned start
, unsigned nr
,
634 struct pipe_sampler_view
**views
)
638 case PIPE_SHADER_VERTEX
:
639 nvc0_stage_set_sampler_views(nvc0_context(pipe
), 0, nr
, views
);
641 case PIPE_SHADER_TESS_CTRL
:
642 nvc0_stage_set_sampler_views(nvc0_context(pipe
), 1, nr
, views
);
644 case PIPE_SHADER_TESS_EVAL
:
645 nvc0_stage_set_sampler_views(nvc0_context(pipe
), 2, nr
, views
);
647 case PIPE_SHADER_GEOMETRY
:
648 nvc0_stage_set_sampler_views(nvc0_context(pipe
), 3, nr
, views
);
650 case PIPE_SHADER_FRAGMENT
:
651 nvc0_stage_set_sampler_views(nvc0_context(pipe
), 4, nr
, views
);
653 case PIPE_SHADER_COMPUTE
:
654 nvc0_stage_set_sampler_views_range(nvc0_context(pipe
), 5,
656 nvc0_context(pipe
)->dirty_cp
|= NVC0_NEW_CP_TEXTURES
;
664 /* ============================= SHADERS =======================================
668 nvc0_sp_state_create(struct pipe_context
*pipe
,
669 const struct pipe_shader_state
*cso
, unsigned type
)
671 struct nvc0_program
*prog
;
673 prog
= CALLOC_STRUCT(nvc0_program
);
680 prog
->pipe
.tokens
= tgsi_dup_tokens(cso
->tokens
);
682 if (cso
->stream_output
.num_outputs
)
683 prog
->pipe
.stream_output
= cso
->stream_output
;
689 nvc0_sp_state_delete(struct pipe_context
*pipe
, void *hwcso
)
691 struct nvc0_program
*prog
= (struct nvc0_program
*)hwcso
;
693 nvc0_program_destroy(nvc0_context(pipe
), prog
);
695 FREE((void *)prog
->pipe
.tokens
);
700 nvc0_vp_state_create(struct pipe_context
*pipe
,
701 const struct pipe_shader_state
*cso
)
703 return nvc0_sp_state_create(pipe
, cso
, PIPE_SHADER_VERTEX
);
707 nvc0_vp_state_bind(struct pipe_context
*pipe
, void *hwcso
)
709 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
711 nvc0
->vertprog
= hwcso
;
712 nvc0
->dirty
|= NVC0_NEW_VERTPROG
;
716 nvc0_fp_state_create(struct pipe_context
*pipe
,
717 const struct pipe_shader_state
*cso
)
719 return nvc0_sp_state_create(pipe
, cso
, PIPE_SHADER_FRAGMENT
);
723 nvc0_fp_state_bind(struct pipe_context
*pipe
, void *hwcso
)
725 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
727 nvc0
->fragprog
= hwcso
;
728 nvc0
->dirty
|= NVC0_NEW_FRAGPROG
;
732 nvc0_gp_state_create(struct pipe_context
*pipe
,
733 const struct pipe_shader_state
*cso
)
735 return nvc0_sp_state_create(pipe
, cso
, PIPE_SHADER_GEOMETRY
);
739 nvc0_gp_state_bind(struct pipe_context
*pipe
, void *hwcso
)
741 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
743 nvc0
->gmtyprog
= hwcso
;
744 nvc0
->dirty
|= NVC0_NEW_GMTYPROG
;
748 nvc0_tcp_state_create(struct pipe_context
*pipe
,
749 const struct pipe_shader_state
*cso
)
751 return nvc0_sp_state_create(pipe
, cso
, PIPE_SHADER_TESS_CTRL
);
755 nvc0_tcp_state_bind(struct pipe_context
*pipe
, void *hwcso
)
757 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
759 nvc0
->tctlprog
= hwcso
;
760 nvc0
->dirty
|= NVC0_NEW_TCTLPROG
;
764 nvc0_tep_state_create(struct pipe_context
*pipe
,
765 const struct pipe_shader_state
*cso
)
767 return nvc0_sp_state_create(pipe
, cso
, PIPE_SHADER_TESS_EVAL
);
771 nvc0_tep_state_bind(struct pipe_context
*pipe
, void *hwcso
)
773 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
775 nvc0
->tevlprog
= hwcso
;
776 nvc0
->dirty
|= NVC0_NEW_TEVLPROG
;
780 nvc0_cp_state_create(struct pipe_context
*pipe
,
781 const struct pipe_compute_state
*cso
)
783 struct nvc0_program
*prog
;
785 prog
= CALLOC_STRUCT(nvc0_program
);
788 prog
->type
= PIPE_SHADER_COMPUTE
;
790 prog
->cp
.smem_size
= cso
->req_local_mem
;
791 prog
->cp
.lmem_size
= cso
->req_private_mem
;
792 prog
->parm_size
= cso
->req_input_mem
;
794 prog
->pipe
.tokens
= tgsi_dup_tokens((const struct tgsi_token
*)cso
->prog
);
800 nvc0_cp_state_bind(struct pipe_context
*pipe
, void *hwcso
)
802 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
804 nvc0
->compprog
= hwcso
;
805 nvc0
->dirty_cp
|= NVC0_NEW_CP_PROGRAM
;
809 nvc0_set_constant_buffer(struct pipe_context
*pipe
, uint shader
, uint index
,
810 struct pipe_constant_buffer
*cb
)
812 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
813 struct pipe_resource
*res
= cb
? cb
->buffer
: NULL
;
814 const unsigned s
= nvc0_shader_stage(shader
);
815 const unsigned i
= index
;
817 if (unlikely(shader
== PIPE_SHADER_COMPUTE
)) {
818 assert(!cb
|| !cb
->user_buffer
);
819 if (nvc0
->constbuf
[s
][i
].u
.buf
)
820 nouveau_bufctx_reset(nvc0
->bufctx_cp
, NVC0_BIND_CP_CB(i
));
822 nvc0
->dirty_cp
|= NVC0_NEW_CP_CONSTBUF
;
824 if (nvc0
->constbuf
[s
][i
].user
)
825 nvc0
->constbuf
[s
][i
].u
.buf
= NULL
;
827 if (nvc0
->constbuf
[s
][i
].u
.buf
)
828 nouveau_bufctx_reset(nvc0
->bufctx_3d
, NVC0_BIND_CB(s
, i
));
830 nvc0
->dirty
|= NVC0_NEW_CONSTBUF
;
832 nvc0
->constbuf_dirty
[s
] |= 1 << i
;
834 if (nvc0
->constbuf
[s
][i
].u
.buf
)
835 nv04_resource(nvc0
->constbuf
[s
][i
].u
.buf
)->cb_bindings
[s
] &= ~(1 << i
);
836 pipe_resource_reference(&nvc0
->constbuf
[s
][i
].u
.buf
, res
);
838 nvc0
->constbuf
[s
][i
].user
= (cb
&& cb
->user_buffer
) ? true : false;
839 if (nvc0
->constbuf
[s
][i
].user
) {
840 nvc0
->constbuf
[s
][i
].u
.data
= cb
->user_buffer
;
841 nvc0
->constbuf
[s
][i
].size
= MIN2(cb
->buffer_size
, 0x10000);
842 nvc0
->constbuf_valid
[s
] |= 1 << i
;
845 nvc0
->constbuf
[s
][i
].offset
= cb
->buffer_offset
;
846 nvc0
->constbuf
[s
][i
].size
= MIN2(align(cb
->buffer_size
, 0x100), 0x10000);
847 nvc0
->constbuf_valid
[s
] |= 1 << i
;
850 nvc0
->constbuf_valid
[s
] &= ~(1 << i
);
854 /* =============================================================================
858 nvc0_set_blend_color(struct pipe_context
*pipe
,
859 const struct pipe_blend_color
*bcol
)
861 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
863 nvc0
->blend_colour
= *bcol
;
864 nvc0
->dirty
|= NVC0_NEW_BLEND_COLOUR
;
868 nvc0_set_stencil_ref(struct pipe_context
*pipe
,
869 const struct pipe_stencil_ref
*sr
)
871 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
873 nvc0
->stencil_ref
= *sr
;
874 nvc0
->dirty
|= NVC0_NEW_STENCIL_REF
;
878 nvc0_set_clip_state(struct pipe_context
*pipe
,
879 const struct pipe_clip_state
*clip
)
881 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
883 memcpy(nvc0
->clip
.ucp
, clip
->ucp
, sizeof(clip
->ucp
));
885 nvc0
->dirty
|= NVC0_NEW_CLIP
;
889 nvc0_set_sample_mask(struct pipe_context
*pipe
, unsigned sample_mask
)
891 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
893 nvc0
->sample_mask
= sample_mask
;
894 nvc0
->dirty
|= NVC0_NEW_SAMPLE_MASK
;
898 nvc0_set_min_samples(struct pipe_context
*pipe
, unsigned min_samples
)
900 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
902 if (nvc0
->min_samples
!= min_samples
) {
903 nvc0
->min_samples
= min_samples
;
904 nvc0
->dirty
|= NVC0_NEW_MIN_SAMPLES
;
909 nvc0_set_framebuffer_state(struct pipe_context
*pipe
,
910 const struct pipe_framebuffer_state
*fb
)
912 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
915 nouveau_bufctx_reset(nvc0
->bufctx_3d
, NVC0_BIND_FB
);
917 for (i
= 0; i
< fb
->nr_cbufs
; ++i
)
918 pipe_surface_reference(&nvc0
->framebuffer
.cbufs
[i
], fb
->cbufs
[i
]);
919 for (; i
< nvc0
->framebuffer
.nr_cbufs
; ++i
)
920 pipe_surface_reference(&nvc0
->framebuffer
.cbufs
[i
], NULL
);
922 nvc0
->framebuffer
.nr_cbufs
= fb
->nr_cbufs
;
924 nvc0
->framebuffer
.width
= fb
->width
;
925 nvc0
->framebuffer
.height
= fb
->height
;
927 pipe_surface_reference(&nvc0
->framebuffer
.zsbuf
, fb
->zsbuf
);
929 nvc0
->dirty
|= NVC0_NEW_FRAMEBUFFER
;
933 nvc0_set_polygon_stipple(struct pipe_context
*pipe
,
934 const struct pipe_poly_stipple
*stipple
)
936 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
938 nvc0
->stipple
= *stipple
;
939 nvc0
->dirty
|= NVC0_NEW_STIPPLE
;
943 nvc0_set_scissor_states(struct pipe_context
*pipe
,
945 unsigned num_scissors
,
946 const struct pipe_scissor_state
*scissor
)
948 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
951 assert(start_slot
+ num_scissors
<= NVC0_MAX_VIEWPORTS
);
952 for (i
= 0; i
< num_scissors
; i
++) {
953 if (!memcmp(&nvc0
->scissors
[start_slot
+ i
], &scissor
[i
], sizeof(*scissor
)))
955 nvc0
->scissors
[start_slot
+ i
] = scissor
[i
];
956 nvc0
->scissors_dirty
|= 1 << (start_slot
+ i
);
957 nvc0
->dirty
|= NVC0_NEW_SCISSOR
;
962 nvc0_set_viewport_states(struct pipe_context
*pipe
,
964 unsigned num_viewports
,
965 const struct pipe_viewport_state
*vpt
)
967 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
970 assert(start_slot
+ num_viewports
<= NVC0_MAX_VIEWPORTS
);
971 for (i
= 0; i
< num_viewports
; i
++) {
972 if (!memcmp(&nvc0
->viewports
[start_slot
+ i
], &vpt
[i
], sizeof(*vpt
)))
974 nvc0
->viewports
[start_slot
+ i
] = vpt
[i
];
975 nvc0
->viewports_dirty
|= 1 << (start_slot
+ i
);
976 nvc0
->dirty
|= NVC0_NEW_VIEWPORT
;
982 nvc0_set_tess_state(struct pipe_context
*pipe
,
983 const float default_tess_outer
[4],
984 const float default_tess_inner
[2])
986 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
988 memcpy(nvc0
->default_tess_outer
, default_tess_outer
, 4 * sizeof(float));
989 memcpy(nvc0
->default_tess_inner
, default_tess_inner
, 2 * sizeof(float));
990 nvc0
->dirty
|= NVC0_NEW_TESSFACTOR
;
994 nvc0_set_vertex_buffers(struct pipe_context
*pipe
,
995 unsigned start_slot
, unsigned count
,
996 const struct pipe_vertex_buffer
*vb
)
998 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
1001 util_set_vertex_buffers_count(nvc0
->vtxbuf
, &nvc0
->num_vtxbufs
, vb
,
1005 nvc0
->vbo_user
&= ~(((1ull << count
) - 1) << start_slot
);
1006 nvc0
->constant_vbos
&= ~(((1ull << count
) - 1) << start_slot
);
1010 for (i
= 0; i
< count
; ++i
) {
1011 unsigned dst_index
= start_slot
+ i
;
1013 if (vb
[i
].user_buffer
) {
1014 nvc0
->vbo_user
|= 1 << dst_index
;
1015 if (!vb
[i
].stride
&& nvc0
->screen
->eng3d
->oclass
< GM107_3D_CLASS
)
1016 nvc0
->constant_vbos
|= 1 << dst_index
;
1018 nvc0
->constant_vbos
&= ~(1 << dst_index
);
1020 nvc0
->vbo_user
&= ~(1 << dst_index
);
1021 nvc0
->constant_vbos
&= ~(1 << dst_index
);
1025 nvc0
->dirty
|= NVC0_NEW_ARRAYS
;
1026 nouveau_bufctx_reset(nvc0
->bufctx_3d
, NVC0_BIND_VTX
);
1030 nvc0_set_index_buffer(struct pipe_context
*pipe
,
1031 const struct pipe_index_buffer
*ib
)
1033 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
1035 if (nvc0
->idxbuf
.buffer
)
1036 nouveau_bufctx_reset(nvc0
->bufctx_3d
, NVC0_BIND_IDX
);
1039 pipe_resource_reference(&nvc0
->idxbuf
.buffer
, ib
->buffer
);
1040 nvc0
->idxbuf
.index_size
= ib
->index_size
;
1042 nvc0
->idxbuf
.offset
= ib
->offset
;
1043 nvc0
->dirty
|= NVC0_NEW_IDXBUF
;
1045 nvc0
->idxbuf
.user_buffer
= ib
->user_buffer
;
1046 nvc0
->dirty
&= ~NVC0_NEW_IDXBUF
;
1049 nvc0
->dirty
&= ~NVC0_NEW_IDXBUF
;
1050 pipe_resource_reference(&nvc0
->idxbuf
.buffer
, NULL
);
1055 nvc0_vertex_state_bind(struct pipe_context
*pipe
, void *hwcso
)
1057 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
1059 nvc0
->vertex
= hwcso
;
1060 nvc0
->dirty
|= NVC0_NEW_VERTEX
;
1063 static struct pipe_stream_output_target
*
1064 nvc0_so_target_create(struct pipe_context
*pipe
,
1065 struct pipe_resource
*res
,
1066 unsigned offset
, unsigned size
)
1068 struct nv04_resource
*buf
= (struct nv04_resource
*)res
;
1069 struct nvc0_so_target
*targ
= MALLOC_STRUCT(nvc0_so_target
);
1073 targ
->pq
= pipe
->create_query(pipe
, NVC0_QUERY_TFB_BUFFER_OFFSET
, 0);
1080 targ
->pipe
.buffer_size
= size
;
1081 targ
->pipe
.buffer_offset
= offset
;
1082 targ
->pipe
.context
= pipe
;
1083 targ
->pipe
.buffer
= NULL
;
1084 pipe_resource_reference(&targ
->pipe
.buffer
, res
);
1085 pipe_reference_init(&targ
->pipe
.reference
, 1);
1087 assert(buf
->base
.target
== PIPE_BUFFER
);
1088 util_range_add(&buf
->valid_buffer_range
, offset
, offset
+ size
);
1094 nvc0_so_target_destroy(struct pipe_context
*pipe
,
1095 struct pipe_stream_output_target
*ptarg
)
1097 struct nvc0_so_target
*targ
= nvc0_so_target(ptarg
);
1098 pipe
->destroy_query(pipe
, targ
->pq
);
1099 pipe_resource_reference(&targ
->pipe
.buffer
, NULL
);
1104 nvc0_set_transform_feedback_targets(struct pipe_context
*pipe
,
1105 unsigned num_targets
,
1106 struct pipe_stream_output_target
**targets
,
1107 const unsigned *offsets
)
1109 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
1111 bool serialize
= true;
1113 assert(num_targets
<= 4);
1115 for (i
= 0; i
< num_targets
; ++i
) {
1116 const bool changed
= nvc0
->tfbbuf
[i
] != targets
[i
];
1117 const bool append
= (offsets
[i
] == ((unsigned)-1));
1118 if (!changed
&& append
)
1120 nvc0
->tfbbuf_dirty
|= 1 << i
;
1122 if (nvc0
->tfbbuf
[i
] && changed
)
1123 nvc0_so_target_save_offset(pipe
, nvc0
->tfbbuf
[i
], i
, &serialize
);
1125 if (targets
[i
] && !append
)
1126 nvc0_so_target(targets
[i
])->clean
= true;
1128 pipe_so_target_reference(&nvc0
->tfbbuf
[i
], targets
[i
]);
1130 for (; i
< nvc0
->num_tfbbufs
; ++i
) {
1131 if (nvc0
->tfbbuf
[i
]) {
1132 nvc0
->tfbbuf_dirty
|= 1 << i
;
1133 nvc0_so_target_save_offset(pipe
, nvc0
->tfbbuf
[i
], i
, &serialize
);
1134 pipe_so_target_reference(&nvc0
->tfbbuf
[i
], NULL
);
1137 nvc0
->num_tfbbufs
= num_targets
;
1139 if (nvc0
->tfbbuf_dirty
)
1140 nvc0
->dirty
|= NVC0_NEW_TFB_TARGETS
;
1144 nvc0_bind_surfaces_range(struct nvc0_context
*nvc0
, const unsigned t
,
1145 unsigned start
, unsigned nr
,
1146 struct pipe_surface
**psurfaces
)
1148 const unsigned end
= start
+ nr
;
1149 const unsigned mask
= ((1 << nr
) - 1) << start
;
1153 for (i
= start
; i
< end
; ++i
) {
1154 const unsigned p
= i
- start
;
1156 nvc0
->surfaces_valid
[t
] |= (1 << i
);
1158 nvc0
->surfaces_valid
[t
] &= ~(1 << i
);
1159 pipe_surface_reference(&nvc0
->surfaces
[t
][i
], psurfaces
[p
]);
1162 for (i
= start
; i
< end
; ++i
)
1163 pipe_surface_reference(&nvc0
->surfaces
[t
][i
], NULL
);
1164 nvc0
->surfaces_valid
[t
] &= ~mask
;
1166 nvc0
->surfaces_dirty
[t
] |= mask
;
1169 nouveau_bufctx_reset(nvc0
->bufctx_3d
, NVC0_BIND_SUF
);
1171 nouveau_bufctx_reset(nvc0
->bufctx_cp
, NVC0_BIND_CP_SUF
);
1175 nvc0_set_compute_resources(struct pipe_context
*pipe
,
1176 unsigned start
, unsigned nr
,
1177 struct pipe_surface
**resources
)
1179 nvc0_bind_surfaces_range(nvc0_context(pipe
), 1, start
, nr
, resources
);
1181 nvc0_context(pipe
)->dirty_cp
|= NVC0_NEW_CP_SURFACES
;
1185 nvc0_set_shader_images(struct pipe_context
*pipe
, unsigned shader
,
1186 unsigned start_slot
, unsigned count
,
1187 struct pipe_image_view
**views
)
1190 nvc0_bind_surfaces_range(nvc0_context(pipe
), 0, start
, nr
, views
);
1192 nvc0_context(pipe
)->dirty
|= NVC0_NEW_SURFACES
;
1197 nvc0_set_global_handle(uint32_t *phandle
, struct pipe_resource
*res
)
1199 struct nv04_resource
*buf
= nv04_resource(res
);
1201 uint64_t limit
= (buf
->address
+ buf
->base
.width0
) - 1;
1202 if (limit
< (1ULL << 32)) {
1203 *phandle
= (uint32_t)buf
->address
;
1205 NOUVEAU_ERR("Cannot map into TGSI_RESOURCE_GLOBAL: "
1206 "resource not contained within 32-bit address space !\n");
1215 nvc0_set_global_bindings(struct pipe_context
*pipe
,
1216 unsigned start
, unsigned nr
,
1217 struct pipe_resource
**resources
,
1220 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
1221 struct pipe_resource
**ptr
;
1223 const unsigned end
= start
+ nr
;
1225 if (nvc0
->global_residents
.size
<= (end
* sizeof(struct pipe_resource
*))) {
1226 const unsigned old_size
= nvc0
->global_residents
.size
;
1227 const unsigned req_size
= end
* sizeof(struct pipe_resource
*);
1228 util_dynarray_resize(&nvc0
->global_residents
, req_size
);
1229 memset((uint8_t *)nvc0
->global_residents
.data
+ old_size
, 0,
1230 req_size
- old_size
);
1234 ptr
= util_dynarray_element(
1235 &nvc0
->global_residents
, struct pipe_resource
*, start
);
1236 for (i
= 0; i
< nr
; ++i
) {
1237 pipe_resource_reference(&ptr
[i
], resources
[i
]);
1238 nvc0_set_global_handle(handles
[i
], resources
[i
]);
1241 ptr
= util_dynarray_element(
1242 &nvc0
->global_residents
, struct pipe_resource
*, start
);
1243 for (i
= 0; i
< nr
; ++i
)
1244 pipe_resource_reference(&ptr
[i
], NULL
);
1247 nouveau_bufctx_reset(nvc0
->bufctx_cp
, NVC0_BIND_CP_GLOBAL
);
1249 nvc0
->dirty_cp
= NVC0_NEW_CP_GLOBALS
;
1253 nvc0_init_state_functions(struct nvc0_context
*nvc0
)
1255 struct pipe_context
*pipe
= &nvc0
->base
.pipe
;
1257 pipe
->create_blend_state
= nvc0_blend_state_create
;
1258 pipe
->bind_blend_state
= nvc0_blend_state_bind
;
1259 pipe
->delete_blend_state
= nvc0_blend_state_delete
;
1261 pipe
->create_rasterizer_state
= nvc0_rasterizer_state_create
;
1262 pipe
->bind_rasterizer_state
= nvc0_rasterizer_state_bind
;
1263 pipe
->delete_rasterizer_state
= nvc0_rasterizer_state_delete
;
1265 pipe
->create_depth_stencil_alpha_state
= nvc0_zsa_state_create
;
1266 pipe
->bind_depth_stencil_alpha_state
= nvc0_zsa_state_bind
;
1267 pipe
->delete_depth_stencil_alpha_state
= nvc0_zsa_state_delete
;
1269 pipe
->create_sampler_state
= nv50_sampler_state_create
;
1270 pipe
->delete_sampler_state
= nvc0_sampler_state_delete
;
1271 pipe
->bind_sampler_states
= nvc0_bind_sampler_states
;
1273 pipe
->create_sampler_view
= nvc0_create_sampler_view
;
1274 pipe
->sampler_view_destroy
= nvc0_sampler_view_destroy
;
1275 pipe
->set_sampler_views
= nvc0_set_sampler_views
;
1277 pipe
->create_vs_state
= nvc0_vp_state_create
;
1278 pipe
->create_fs_state
= nvc0_fp_state_create
;
1279 pipe
->create_gs_state
= nvc0_gp_state_create
;
1280 pipe
->create_tcs_state
= nvc0_tcp_state_create
;
1281 pipe
->create_tes_state
= nvc0_tep_state_create
;
1282 pipe
->bind_vs_state
= nvc0_vp_state_bind
;
1283 pipe
->bind_fs_state
= nvc0_fp_state_bind
;
1284 pipe
->bind_gs_state
= nvc0_gp_state_bind
;
1285 pipe
->bind_tcs_state
= nvc0_tcp_state_bind
;
1286 pipe
->bind_tes_state
= nvc0_tep_state_bind
;
1287 pipe
->delete_vs_state
= nvc0_sp_state_delete
;
1288 pipe
->delete_fs_state
= nvc0_sp_state_delete
;
1289 pipe
->delete_gs_state
= nvc0_sp_state_delete
;
1290 pipe
->delete_tcs_state
= nvc0_sp_state_delete
;
1291 pipe
->delete_tes_state
= nvc0_sp_state_delete
;
1293 pipe
->create_compute_state
= nvc0_cp_state_create
;
1294 pipe
->bind_compute_state
= nvc0_cp_state_bind
;
1295 pipe
->delete_compute_state
= nvc0_sp_state_delete
;
1297 pipe
->set_blend_color
= nvc0_set_blend_color
;
1298 pipe
->set_stencil_ref
= nvc0_set_stencil_ref
;
1299 pipe
->set_clip_state
= nvc0_set_clip_state
;
1300 pipe
->set_sample_mask
= nvc0_set_sample_mask
;
1301 pipe
->set_min_samples
= nvc0_set_min_samples
;
1302 pipe
->set_constant_buffer
= nvc0_set_constant_buffer
;
1303 pipe
->set_framebuffer_state
= nvc0_set_framebuffer_state
;
1304 pipe
->set_polygon_stipple
= nvc0_set_polygon_stipple
;
1305 pipe
->set_scissor_states
= nvc0_set_scissor_states
;
1306 pipe
->set_viewport_states
= nvc0_set_viewport_states
;
1307 pipe
->set_tess_state
= nvc0_set_tess_state
;
1309 pipe
->create_vertex_elements_state
= nvc0_vertex_state_create
;
1310 pipe
->delete_vertex_elements_state
= nvc0_vertex_state_delete
;
1311 pipe
->bind_vertex_elements_state
= nvc0_vertex_state_bind
;
1313 pipe
->set_vertex_buffers
= nvc0_set_vertex_buffers
;
1314 pipe
->set_index_buffer
= nvc0_set_index_buffer
;
1316 pipe
->create_stream_output_target
= nvc0_so_target_create
;
1317 pipe
->stream_output_target_destroy
= nvc0_so_target_destroy
;
1318 pipe
->set_stream_output_targets
= nvc0_set_transform_feedback_targets
;
1320 pipe
->set_global_binding
= nvc0_set_global_bindings
;
1321 pipe
->set_compute_resources
= nvc0_set_compute_resources
;
1322 pipe
->set_shader_images
= nvc0_set_shader_images
;
1324 nvc0
->sample_mask
= ~0;
1325 nvc0
->min_samples
= 1;
1326 nvc0
->default_tess_outer
[0] =
1327 nvc0
->default_tess_outer
[1] =
1328 nvc0
->default_tess_outer
[2] =
1329 nvc0
->default_tess_outer
[3] = 1.0;
1330 nvc0
->default_tess_inner
[0] =
1331 nvc0
->default_tess_inner
[1] = 1.0;