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4a550b0bb401fb1582866e9f157555fdfa5c6613
[mesa.git] / src / gallium / drivers / nouveau / nvc0 / nvc0_surface.c
1 /*
2 * Copyright 2008 Ben Skeggs
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 #include <stdint.h>
24
25 #include "pipe/p_defines.h"
26
27 #include "util/u_inlines.h"
28 #include "util/u_pack_color.h"
29 #include "util/u_format.h"
30 #include "util/u_surface.h"
31
32 #include "os/os_thread.h"
33
34 #include "nvc0/nvc0_context.h"
35 #include "nvc0/nvc0_resource.h"
36
37 #include "nv50/nv50_defs.xml.h"
38 #include "nv50/nv50_texture.xml.h"
39
40 /* these are used in nv50_blit.h */
41 #define NV50_ENG2D_SUPPORTED_FORMATS 0xff9ccfe1cce3ccc9ULL
42 #define NV50_ENG2D_NOCONVERT_FORMATS 0x009cc02000000000ULL
43 #define NV50_ENG2D_LUMINANCE_FORMATS 0x001cc02000000000ULL
44 #define NV50_ENG2D_INTENSITY_FORMATS 0x0080000000000000ULL
45 #define NV50_ENG2D_OPERATION_FORMATS 0x060001c000638000ULL
46
47 #define NOUVEAU_DRIVER 0xc0
48 #include "nv50/nv50_blit.h"
49
50 static INLINE uint8_t
51 nvc0_2d_format(enum pipe_format format, boolean dst, boolean dst_src_equal)
52 {
53 uint8_t id = nvc0_format_table[format].rt;
54
55 /* A8_UNORM is treated as I8_UNORM as far as the 2D engine is concerned. */
56 if (!dst && unlikely(format == PIPE_FORMAT_I8_UNORM) && !dst_src_equal)
57 return NV50_SURFACE_FORMAT_A8_UNORM;
58
59 /* Hardware values for color formats range from 0xc0 to 0xff,
60 * but the 2D engine doesn't support all of them.
61 */
62 if (nv50_2d_format_supported(format))
63 return id;
64 assert(dst_src_equal);
65
66 switch (util_format_get_blocksize(format)) {
67 case 1:
68 return NV50_SURFACE_FORMAT_R8_UNORM;
69 case 2:
70 return NV50_SURFACE_FORMAT_R16_UNORM;
71 case 4:
72 return NV50_SURFACE_FORMAT_BGRA8_UNORM;
73 case 8:
74 return NV50_SURFACE_FORMAT_RGBA16_UNORM;
75 case 16:
76 return NV50_SURFACE_FORMAT_RGBA32_FLOAT;
77 default:
78 assert(0);
79 return 0;
80 }
81 }
82
83 static int
84 nvc0_2d_texture_set(struct nouveau_pushbuf *push, boolean dst,
85 struct nv50_miptree *mt, unsigned level, unsigned layer,
86 enum pipe_format pformat, boolean dst_src_pformat_equal)
87 {
88 struct nouveau_bo *bo = mt->base.bo;
89 uint32_t width, height, depth;
90 uint32_t format;
91 uint32_t mthd = dst ? NVC0_2D_DST_FORMAT : NVC0_2D_SRC_FORMAT;
92 uint32_t offset = mt->level[level].offset;
93
94 format = nvc0_2d_format(pformat, dst, dst_src_pformat_equal);
95 if (!format) {
96 NOUVEAU_ERR("invalid/unsupported surface format: %s\n",
97 util_format_name(pformat));
98 return 1;
99 }
100
101 width = u_minify(mt->base.base.width0, level) << mt->ms_x;
102 height = u_minify(mt->base.base.height0, level) << mt->ms_y;
103 depth = u_minify(mt->base.base.depth0, level);
104
105 /* layer has to be < depth, and depth > tile depth / 2 */
106
107 if (!mt->layout_3d) {
108 offset += mt->layer_stride * layer;
109 layer = 0;
110 depth = 1;
111 } else
112 if (!dst) {
113 offset += nvc0_mt_zslice_offset(mt, level, layer);
114 layer = 0;
115 }
116
117 if (!nouveau_bo_memtype(bo)) {
118 BEGIN_NVC0(push, SUBC_2D(mthd), 2);
119 PUSH_DATA (push, format);
120 PUSH_DATA (push, 1);
121 BEGIN_NVC0(push, SUBC_2D(mthd + 0x14), 5);
122 PUSH_DATA (push, mt->level[level].pitch);
123 PUSH_DATA (push, width);
124 PUSH_DATA (push, height);
125 PUSH_DATAh(push, bo->offset + offset);
126 PUSH_DATA (push, bo->offset + offset);
127 } else {
128 BEGIN_NVC0(push, SUBC_2D(mthd), 5);
129 PUSH_DATA (push, format);
130 PUSH_DATA (push, 0);
131 PUSH_DATA (push, mt->level[level].tile_mode);
132 PUSH_DATA (push, depth);
133 PUSH_DATA (push, layer);
134 BEGIN_NVC0(push, SUBC_2D(mthd + 0x18), 4);
135 PUSH_DATA (push, width);
136 PUSH_DATA (push, height);
137 PUSH_DATAh(push, bo->offset + offset);
138 PUSH_DATA (push, bo->offset + offset);
139 }
140
141 #if 0
142 if (dst) {
143 BEGIN_NVC0(push, SUBC_2D(NVC0_2D_CLIP_X), 4);
144 PUSH_DATA (push, 0);
145 PUSH_DATA (push, 0);
146 PUSH_DATA (push, width);
147 PUSH_DATA (push, height);
148 }
149 #endif
150 return 0;
151 }
152
153 static int
154 nvc0_2d_texture_do_copy(struct nouveau_pushbuf *push,
155 struct nv50_miptree *dst, unsigned dst_level,
156 unsigned dx, unsigned dy, unsigned dz,
157 struct nv50_miptree *src, unsigned src_level,
158 unsigned sx, unsigned sy, unsigned sz,
159 unsigned w, unsigned h)
160 {
161 const enum pipe_format dfmt = dst->base.base.format;
162 const enum pipe_format sfmt = src->base.base.format;
163 int ret;
164 boolean eqfmt = dfmt == sfmt;
165
166 if (!PUSH_SPACE(push, 2 * 16 + 32))
167 return PIPE_ERROR;
168
169 ret = nvc0_2d_texture_set(push, TRUE, dst, dst_level, dz, dfmt, eqfmt);
170 if (ret)
171 return ret;
172
173 ret = nvc0_2d_texture_set(push, FALSE, src, src_level, sz, sfmt, eqfmt);
174 if (ret)
175 return ret;
176
177 IMMED_NVC0(push, NVC0_2D(BLIT_CONTROL), 0x00);
178 BEGIN_NVC0(push, NVC0_2D(BLIT_DST_X), 4);
179 PUSH_DATA (push, dx << dst->ms_x);
180 PUSH_DATA (push, dy << dst->ms_y);
181 PUSH_DATA (push, w << dst->ms_x);
182 PUSH_DATA (push, h << dst->ms_y);
183 BEGIN_NVC0(push, NVC0_2D(BLIT_DU_DX_FRACT), 4);
184 PUSH_DATA (push, 0);
185 PUSH_DATA (push, 1);
186 PUSH_DATA (push, 0);
187 PUSH_DATA (push, 1);
188 BEGIN_NVC0(push, NVC0_2D(BLIT_SRC_X_FRACT), 4);
189 PUSH_DATA (push, 0);
190 PUSH_DATA (push, sx << src->ms_x);
191 PUSH_DATA (push, 0);
192 PUSH_DATA (push, sy << src->ms_x);
193
194 return 0;
195 }
196
197 static void
198 nvc0_resource_copy_region(struct pipe_context *pipe,
199 struct pipe_resource *dst, unsigned dst_level,
200 unsigned dstx, unsigned dsty, unsigned dstz,
201 struct pipe_resource *src, unsigned src_level,
202 const struct pipe_box *src_box)
203 {
204 struct nvc0_context *nvc0 = nvc0_context(pipe);
205 int ret;
206 boolean m2mf;
207 unsigned dst_layer = dstz, src_layer = src_box->z;
208
209 if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) {
210 nouveau_copy_buffer(&nvc0->base,
211 nv04_resource(dst), dstx,
212 nv04_resource(src), src_box->x, src_box->width);
213 NOUVEAU_DRV_STAT(&nvc0->screen->base, buf_copy_bytes, src_box->width);
214 return;
215 }
216 NOUVEAU_DRV_STAT(&nvc0->screen->base, tex_copy_count, 1);
217
218 /* 0 and 1 are equal, only supporting 0/1, 2, 4 and 8 */
219 assert((src->nr_samples | 1) == (dst->nr_samples | 1));
220
221 m2mf = (src->format == dst->format) ||
222 (util_format_get_blocksizebits(src->format) ==
223 util_format_get_blocksizebits(dst->format));
224
225 nv04_resource(dst)->status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING;
226
227 if (m2mf) {
228 struct nv50_m2mf_rect drect, srect;
229 unsigned i;
230 unsigned nx = util_format_get_nblocksx(src->format, src_box->width);
231 unsigned ny = util_format_get_nblocksy(src->format, src_box->height);
232
233 nv50_m2mf_rect_setup(&drect, dst, dst_level, dstx, dsty, dstz);
234 nv50_m2mf_rect_setup(&srect, src, src_level,
235 src_box->x, src_box->y, src_box->z);
236
237 for (i = 0; i < src_box->depth; ++i) {
238 nvc0->m2mf_copy_rect(nvc0, &drect, &srect, nx, ny);
239
240 if (nv50_miptree(dst)->layout_3d)
241 drect.z++;
242 else
243 drect.base += nv50_miptree(dst)->layer_stride;
244
245 if (nv50_miptree(src)->layout_3d)
246 srect.z++;
247 else
248 srect.base += nv50_miptree(src)->layer_stride;
249 }
250 return;
251 }
252
253 assert(nv50_2d_dst_format_faithful(dst->format));
254 assert(nv50_2d_src_format_faithful(src->format));
255
256 BCTX_REFN(nvc0->bufctx, 2D, nv04_resource(src), RD);
257 BCTX_REFN(nvc0->bufctx, 2D, nv04_resource(dst), WR);
258 nouveau_pushbuf_bufctx(nvc0->base.pushbuf, nvc0->bufctx);
259 nouveau_pushbuf_validate(nvc0->base.pushbuf);
260
261 for (; dst_layer < dstz + src_box->depth; ++dst_layer, ++src_layer) {
262 ret = nvc0_2d_texture_do_copy(nvc0->base.pushbuf,
263 nv50_miptree(dst), dst_level,
264 dstx, dsty, dst_layer,
265 nv50_miptree(src), src_level,
266 src_box->x, src_box->y, src_layer,
267 src_box->width, src_box->height);
268 if (ret)
269 break;
270 }
271 nouveau_bufctx_reset(nvc0->bufctx, 0);
272 }
273
274 static void
275 nvc0_clear_render_target(struct pipe_context *pipe,
276 struct pipe_surface *dst,
277 const union pipe_color_union *color,
278 unsigned dstx, unsigned dsty,
279 unsigned width, unsigned height)
280 {
281 struct nvc0_context *nvc0 = nvc0_context(pipe);
282 struct nouveau_pushbuf *push = nvc0->base.pushbuf;
283 struct nv50_surface *sf = nv50_surface(dst);
284 struct nv04_resource *res = nv04_resource(sf->base.texture);
285 unsigned z;
286
287 if (!PUSH_SPACE(push, 32 + sf->depth))
288 return;
289
290 PUSH_REFN (push, res->bo, res->domain | NOUVEAU_BO_WR);
291
292 BEGIN_NVC0(push, NVC0_3D(CLEAR_COLOR(0)), 4);
293 PUSH_DATAf(push, color->f[0]);
294 PUSH_DATAf(push, color->f[1]);
295 PUSH_DATAf(push, color->f[2]);
296 PUSH_DATAf(push, color->f[3]);
297
298 BEGIN_NVC0(push, NVC0_3D(SCREEN_SCISSOR_HORIZ), 2);
299 PUSH_DATA (push, ( width << 16) | dstx);
300 PUSH_DATA (push, (height << 16) | dsty);
301
302 BEGIN_NVC0(push, NVC0_3D(RT_CONTROL), 1);
303 PUSH_DATA (push, 1);
304 BEGIN_NVC0(push, NVC0_3D(RT_ADDRESS_HIGH(0)), 9);
305 PUSH_DATAh(push, res->address + sf->offset);
306 PUSH_DATA (push, res->address + sf->offset);
307 if (likely(nouveau_bo_memtype(res->bo))) {
308 struct nv50_miptree *mt = nv50_miptree(dst->texture);
309
310 PUSH_DATA(push, sf->width);
311 PUSH_DATA(push, sf->height);
312 PUSH_DATA(push, nvc0_format_table[dst->format].rt);
313 PUSH_DATA(push, (mt->layout_3d << 16) |
314 mt->level[sf->base.u.tex.level].tile_mode);
315 PUSH_DATA(push, dst->u.tex.first_layer + sf->depth);
316 PUSH_DATA(push, mt->layer_stride >> 2);
317 PUSH_DATA(push, dst->u.tex.first_layer);
318 } else {
319 if (res->base.target == PIPE_BUFFER) {
320 PUSH_DATA(push, 262144);
321 PUSH_DATA(push, 1);
322 } else {
323 PUSH_DATA(push, nv50_miptree(&res->base)->level[0].pitch);
324 PUSH_DATA(push, sf->height);
325 }
326 PUSH_DATA(push, nvc0_format_table[sf->base.format].rt);
327 PUSH_DATA(push, 1 << 12);
328 PUSH_DATA(push, 1);
329 PUSH_DATA(push, 0);
330 PUSH_DATA(push, 0);
331
332 IMMED_NVC0(push, NVC0_3D(ZETA_ENABLE), 0);
333
334 /* tiled textures don't have to be fenced, they're not mapped directly */
335 nvc0_resource_fence(res, NOUVEAU_BO_WR);
336 }
337
338 BEGIN_NIC0(push, NVC0_3D(CLEAR_BUFFERS), sf->depth);
339 for (z = 0; z < sf->depth; ++z) {
340 PUSH_DATA (push, 0x3c |
341 (z << NVC0_3D_CLEAR_BUFFERS_LAYER__SHIFT));
342 }
343
344 nvc0->dirty |= NVC0_NEW_FRAMEBUFFER;
345 }
346
347 static void
348 nvc0_clear_depth_stencil(struct pipe_context *pipe,
349 struct pipe_surface *dst,
350 unsigned clear_flags,
351 double depth,
352 unsigned stencil,
353 unsigned dstx, unsigned dsty,
354 unsigned width, unsigned height)
355 {
356 struct nvc0_context *nvc0 = nvc0_context(pipe);
357 struct nouveau_pushbuf *push = nvc0->base.pushbuf;
358 struct nv50_miptree *mt = nv50_miptree(dst->texture);
359 struct nv50_surface *sf = nv50_surface(dst);
360 uint32_t mode = 0;
361 int unk = mt->base.base.target == PIPE_TEXTURE_2D;
362 unsigned z;
363
364 if (!PUSH_SPACE(push, 32 + sf->depth))
365 return;
366
367 PUSH_REFN (push, mt->base.bo, mt->base.domain | NOUVEAU_BO_WR);
368
369 if (clear_flags & PIPE_CLEAR_DEPTH) {
370 BEGIN_NVC0(push, NVC0_3D(CLEAR_DEPTH), 1);
371 PUSH_DATAf(push, depth);
372 mode |= NVC0_3D_CLEAR_BUFFERS_Z;
373 }
374
375 if (clear_flags & PIPE_CLEAR_STENCIL) {
376 BEGIN_NVC0(push, NVC0_3D(CLEAR_STENCIL), 1);
377 PUSH_DATA (push, stencil & 0xff);
378 mode |= NVC0_3D_CLEAR_BUFFERS_S;
379 }
380
381 BEGIN_NVC0(push, NVC0_3D(SCREEN_SCISSOR_HORIZ), 2);
382 PUSH_DATA (push, ( width << 16) | dstx);
383 PUSH_DATA (push, (height << 16) | dsty);
384
385 BEGIN_NVC0(push, NVC0_3D(ZETA_ADDRESS_HIGH), 5);
386 PUSH_DATAh(push, mt->base.address + sf->offset);
387 PUSH_DATA (push, mt->base.address + sf->offset);
388 PUSH_DATA (push, nvc0_format_table[dst->format].rt);
389 PUSH_DATA (push, mt->level[sf->base.u.tex.level].tile_mode);
390 PUSH_DATA (push, mt->layer_stride >> 2);
391 BEGIN_NVC0(push, NVC0_3D(ZETA_ENABLE), 1);
392 PUSH_DATA (push, 1);
393 BEGIN_NVC0(push, NVC0_3D(ZETA_HORIZ), 3);
394 PUSH_DATA (push, sf->width);
395 PUSH_DATA (push, sf->height);
396 PUSH_DATA (push, (unk << 16) | (dst->u.tex.first_layer + sf->depth));
397 BEGIN_NVC0(push, NVC0_3D(ZETA_BASE_LAYER), 1);
398 PUSH_DATA (push, dst->u.tex.first_layer);
399
400 BEGIN_NIC0(push, NVC0_3D(CLEAR_BUFFERS), sf->depth);
401 for (z = 0; z < sf->depth; ++z) {
402 PUSH_DATA (push, mode |
403 (z << NVC0_3D_CLEAR_BUFFERS_LAYER__SHIFT));
404 }
405
406 nvc0->dirty |= NVC0_NEW_FRAMEBUFFER;
407 }
408
409 void
410 nvc0_clear(struct pipe_context *pipe, unsigned buffers,
411 const union pipe_color_union *color,
412 double depth, unsigned stencil)
413 {
414 struct nvc0_context *nvc0 = nvc0_context(pipe);
415 struct nouveau_pushbuf *push = nvc0->base.pushbuf;
416 struct pipe_framebuffer_state *fb = &nvc0->framebuffer;
417 unsigned i, j, k;
418 uint32_t mode = 0;
419
420 /* don't need NEW_BLEND, COLOR_MASK doesn't affect CLEAR_BUFFERS */
421 if (!nvc0_state_validate(nvc0, NVC0_NEW_FRAMEBUFFER, 9 + (fb->nr_cbufs * 2)))
422 return;
423
424 if (buffers & PIPE_CLEAR_COLOR && fb->nr_cbufs) {
425 BEGIN_NVC0(push, NVC0_3D(CLEAR_COLOR(0)), 4);
426 PUSH_DATAf(push, color->f[0]);
427 PUSH_DATAf(push, color->f[1]);
428 PUSH_DATAf(push, color->f[2]);
429 PUSH_DATAf(push, color->f[3]);
430 if (buffers & PIPE_CLEAR_COLOR0)
431 mode =
432 NVC0_3D_CLEAR_BUFFERS_R | NVC0_3D_CLEAR_BUFFERS_G |
433 NVC0_3D_CLEAR_BUFFERS_B | NVC0_3D_CLEAR_BUFFERS_A;
434 }
435
436 if (buffers & PIPE_CLEAR_DEPTH) {
437 BEGIN_NVC0(push, NVC0_3D(CLEAR_DEPTH), 1);
438 PUSH_DATA (push, fui(depth));
439 mode |= NVC0_3D_CLEAR_BUFFERS_Z;
440 }
441
442 if (buffers & PIPE_CLEAR_STENCIL) {
443 BEGIN_NVC0(push, NVC0_3D(CLEAR_STENCIL), 1);
444 PUSH_DATA (push, stencil & 0xff);
445 mode |= NVC0_3D_CLEAR_BUFFERS_S;
446 }
447
448 if (mode) {
449 int zs_layers = 0, color0_layers = 0;
450 if (fb->cbufs[0] && (mode & 0x3c))
451 color0_layers = fb->cbufs[0]->u.tex.last_layer -
452 fb->cbufs[0]->u.tex.first_layer + 1;
453 if (fb->zsbuf && (mode & ~0x3c))
454 zs_layers = fb->zsbuf->u.tex.last_layer -
455 fb->zsbuf->u.tex.first_layer + 1;
456
457 for (j = 0; j < MIN2(zs_layers, color0_layers); j++) {
458 BEGIN_NVC0(push, NVC0_3D(CLEAR_BUFFERS), 1);
459 PUSH_DATA(push, mode | (j << NVC0_3D_CLEAR_BUFFERS_LAYER__SHIFT));
460 }
461 for (k = j; k < zs_layers; k++) {
462 BEGIN_NVC0(push, NVC0_3D(CLEAR_BUFFERS), 1);
463 PUSH_DATA(push, (mode & ~0x3c) | (k << NVC0_3D_CLEAR_BUFFERS_LAYER__SHIFT));
464 }
465 for (k = j; k < color0_layers; k++) {
466 BEGIN_NVC0(push, NVC0_3D(CLEAR_BUFFERS), 1);
467 PUSH_DATA(push, (mode & 0x3c) | (k << NVC0_3D_CLEAR_BUFFERS_LAYER__SHIFT));
468 }
469 }
470
471 for (i = 1; i < fb->nr_cbufs; i++) {
472 struct pipe_surface *sf = fb->cbufs[i];
473 if (!sf || !(buffers & (PIPE_CLEAR_COLOR0 << i)))
474 continue;
475 for (j = 0; j <= sf->u.tex.last_layer - sf->u.tex.first_layer; j++) {
476 BEGIN_NVC0(push, NVC0_3D(CLEAR_BUFFERS), 1);
477 PUSH_DATA (push, (i << 6) | 0x3c |
478 (j << NVC0_3D_CLEAR_BUFFERS_LAYER__SHIFT));
479 }
480 }
481 }
482
483
484 /* =============================== BLIT CODE ===================================
485 */
486
487 struct nvc0_blitter
488 {
489 struct nvc0_program *fp[NV50_BLIT_MAX_TEXTURE_TYPES][NV50_BLIT_MODES];
490 struct nvc0_program vp;
491
492 struct nv50_tsc_entry sampler[2]; /* nearest, bilinear */
493
494 pipe_mutex mutex;
495
496 struct nvc0_screen *screen;
497 };
498
499 struct nvc0_blitctx
500 {
501 struct nvc0_context *nvc0;
502 struct nvc0_program *fp;
503 uint8_t mode;
504 uint16_t color_mask;
505 uint8_t filter;
506 enum pipe_texture_target target;
507 struct {
508 struct pipe_framebuffer_state fb;
509 struct nvc0_rasterizer_stateobj *rast;
510 struct nvc0_program *vp;
511 struct nvc0_program *tcp;
512 struct nvc0_program *tep;
513 struct nvc0_program *gp;
514 struct nvc0_program *fp;
515 unsigned num_textures[5];
516 unsigned num_samplers[5];
517 struct pipe_sampler_view *texture[2];
518 struct nv50_tsc_entry *sampler[2];
519 unsigned min_samples;
520 uint32_t dirty;
521 } saved;
522 struct nvc0_rasterizer_stateobj rast;
523 };
524
525 static void
526 nvc0_blitter_make_vp(struct nvc0_blitter *blit)
527 {
528 static const uint32_t code_nvc0[] =
529 {
530 0xfff11c26, 0x06000080, /* vfetch b64 $r4:$r5 a[0x80] */
531 0xfff01c46, 0x06000090, /* vfetch b96 $r0:$r1:$r2 a[0x90] */
532 0x13f01c26, 0x0a7e0070, /* export b64 o[0x70] $r4:$r5 */
533 0x03f01c46, 0x0a7e0080, /* export b96 o[0x80] $r0:$r1:$r2 */
534 0x00001de7, 0x80000000, /* exit */
535 };
536 static const uint32_t code_nve4[] =
537 {
538 0x00000007, 0x20000000, /* sched */
539 0xfff11c26, 0x06000080, /* vfetch b64 $r4:$r5 a[0x80] */
540 0xfff01c46, 0x06000090, /* vfetch b96 $r0:$r1:$r2 a[0x90] */
541 0x13f01c26, 0x0a7e0070, /* export b64 o[0x70] $r4:$r5 */
542 0x03f01c46, 0x0a7e0080, /* export b96 o[0x80] $r0:$r1:$r2 */
543 0x00001de7, 0x80000000, /* exit */
544 };
545
546 blit->vp.type = PIPE_SHADER_VERTEX;
547 blit->vp.translated = TRUE;
548 if (blit->screen->base.class_3d >= NVE4_3D_CLASS) {
549 blit->vp.code = (uint32_t *)code_nve4; /* const_cast */
550 blit->vp.code_size = sizeof(code_nve4);
551 } else {
552 blit->vp.code = (uint32_t *)code_nvc0; /* const_cast */
553 blit->vp.code_size = sizeof(code_nvc0);
554 }
555 blit->vp.num_gprs = 6;
556 blit->vp.vp.edgeflag = PIPE_MAX_ATTRIBS;
557
558 blit->vp.hdr[0] = 0x00020461; /* vertprog magic */
559 blit->vp.hdr[4] = 0x000ff000; /* no outputs read */
560 blit->vp.hdr[6] = 0x00000073; /* a[0x80].xy, a[0x90].xyz */
561 blit->vp.hdr[13] = 0x00073000; /* o[0x70].xy, o[0x80].xyz */
562 }
563
564 static void
565 nvc0_blitter_make_sampler(struct nvc0_blitter *blit)
566 {
567 /* clamp to edge, min/max lod = 0, nearest filtering */
568
569 blit->sampler[0].id = -1;
570
571 blit->sampler[0].tsc[0] = NV50_TSC_0_SRGB_CONVERSION_ALLOWED |
572 (NV50_TSC_WRAP_CLAMP_TO_EDGE << NV50_TSC_0_WRAPS__SHIFT) |
573 (NV50_TSC_WRAP_CLAMP_TO_EDGE << NV50_TSC_0_WRAPT__SHIFT) |
574 (NV50_TSC_WRAP_CLAMP_TO_EDGE << NV50_TSC_0_WRAPR__SHIFT);
575 blit->sampler[0].tsc[1] =
576 NV50_TSC_1_MAGF_NEAREST | NV50_TSC_1_MINF_NEAREST | NV50_TSC_1_MIPF_NONE;
577
578 /* clamp to edge, min/max lod = 0, bilinear filtering */
579
580 blit->sampler[1].id = -1;
581
582 blit->sampler[1].tsc[0] = blit->sampler[0].tsc[0];
583 blit->sampler[1].tsc[1] =
584 NV50_TSC_1_MAGF_LINEAR | NV50_TSC_1_MINF_LINEAR | NV50_TSC_1_MIPF_NONE;
585 }
586
587 static void
588 nvc0_blit_select_fp(struct nvc0_blitctx *ctx, const struct pipe_blit_info *info)
589 {
590 struct nvc0_blitter *blitter = ctx->nvc0->screen->blitter;
591
592 const enum pipe_texture_target ptarg =
593 nv50_blit_reinterpret_pipe_texture_target(info->src.resource->target);
594
595 const unsigned targ = nv50_blit_texture_type(ptarg);
596 const unsigned mode = ctx->mode;
597
598 if (!blitter->fp[targ][mode]) {
599 pipe_mutex_lock(blitter->mutex);
600 if (!blitter->fp[targ][mode])
601 blitter->fp[targ][mode] =
602 nv50_blitter_make_fp(&ctx->nvc0->base.pipe, mode, ptarg);
603 pipe_mutex_unlock(blitter->mutex);
604 }
605 ctx->fp = blitter->fp[targ][mode];
606 }
607
608 static void
609 nvc0_blit_set_dst(struct nvc0_blitctx *ctx,
610 struct pipe_resource *res, unsigned level, unsigned layer,
611 enum pipe_format format)
612 {
613 struct nvc0_context *nvc0 = ctx->nvc0;
614 struct pipe_context *pipe = &nvc0->base.pipe;
615 struct pipe_surface templ;
616
617 if (util_format_is_depth_or_stencil(format))
618 templ.format = nv50_blit_zeta_to_colour_format(format);
619 else
620 templ.format = format;
621
622 templ.u.tex.level = level;
623 templ.u.tex.first_layer = templ.u.tex.last_layer = layer;
624
625 if (layer == -1) {
626 templ.u.tex.first_layer = 0;
627 templ.u.tex.last_layer =
628 (res->target == PIPE_TEXTURE_3D ? res->depth0 : res->array_size) - 1;
629 }
630
631 nvc0->framebuffer.cbufs[0] = nvc0_miptree_surface_new(pipe, res, &templ);
632 nvc0->framebuffer.nr_cbufs = 1;
633 nvc0->framebuffer.zsbuf = NULL;
634 nvc0->framebuffer.width = nvc0->framebuffer.cbufs[0]->width;
635 nvc0->framebuffer.height = nvc0->framebuffer.cbufs[0]->height;
636 }
637
638 static void
639 nvc0_blit_set_src(struct nvc0_blitctx *ctx,
640 struct pipe_resource *res, unsigned level, unsigned layer,
641 enum pipe_format format, const uint8_t filter)
642 {
643 struct nvc0_context *nvc0 = ctx->nvc0;
644 struct pipe_context *pipe = &nvc0->base.pipe;
645 struct pipe_sampler_view templ;
646 uint32_t flags;
647 unsigned s;
648 enum pipe_texture_target target;
649
650 target = nv50_blit_reinterpret_pipe_texture_target(res->target);
651
652 templ.format = format;
653 templ.u.tex.first_layer = templ.u.tex.last_layer = layer;
654 templ.u.tex.first_level = templ.u.tex.last_level = level;
655 templ.swizzle_r = PIPE_SWIZZLE_RED;
656 templ.swizzle_g = PIPE_SWIZZLE_GREEN;
657 templ.swizzle_b = PIPE_SWIZZLE_BLUE;
658 templ.swizzle_a = PIPE_SWIZZLE_ALPHA;
659
660 if (layer == -1) {
661 templ.u.tex.first_layer = 0;
662 templ.u.tex.last_layer =
663 (res->target == PIPE_TEXTURE_3D ? res->depth0 : res->array_size) - 1;
664 }
665
666 flags = res->last_level ? 0 : NV50_TEXVIEW_SCALED_COORDS;
667 flags |= NV50_TEXVIEW_ACCESS_RESOLVE;
668 if (filter && res->nr_samples == 8)
669 flags |= NV50_TEXVIEW_FILTER_MSAA8;
670
671 nvc0->textures[4][0] = nvc0_create_texture_view(
672 pipe, res, &templ, flags, target);
673 nvc0->textures[4][1] = NULL;
674
675 for (s = 0; s <= 3; ++s)
676 nvc0->num_textures[s] = 0;
677 nvc0->num_textures[4] = 1;
678
679 templ.format = nv50_zs_to_s_format(format);
680 if (templ.format != format) {
681 nvc0->textures[4][1] = nvc0_create_texture_view(
682 pipe, res, &templ, flags, target);
683 nvc0->num_textures[4] = 2;
684 }
685 }
686
687 static void
688 nvc0_blitctx_prepare_state(struct nvc0_blitctx *blit)
689 {
690 struct nouveau_pushbuf *push = blit->nvc0->base.pushbuf;
691
692 /* TODO: maybe make this a MACRO (if we need more logic) ? */
693
694 if (blit->nvc0->cond_query)
695 IMMED_NVC0(push, NVC0_3D(COND_MODE), NVC0_3D_COND_MODE_ALWAYS);
696
697 /* blend state */
698 BEGIN_NVC0(push, NVC0_3D(COLOR_MASK(0)), 1);
699 PUSH_DATA (push, blit->color_mask);
700 IMMED_NVC0(push, NVC0_3D(BLEND_ENABLE(0)), 0);
701 IMMED_NVC0(push, NVC0_3D(LOGIC_OP_ENABLE), 0);
702
703 /* rasterizer state */
704 IMMED_NVC0(push, NVC0_3D(FRAG_COLOR_CLAMP_EN), 0);
705 IMMED_NVC0(push, NVC0_3D(MULTISAMPLE_ENABLE), 0);
706 BEGIN_NVC0(push, NVC0_3D(MSAA_MASK(0)), 4);
707 PUSH_DATA (push, 0xffff);
708 PUSH_DATA (push, 0xffff);
709 PUSH_DATA (push, 0xffff);
710 PUSH_DATA (push, 0xffff);
711 BEGIN_NVC0(push, NVC0_3D(MACRO_POLYGON_MODE_FRONT), 1);
712 PUSH_DATA (push, NVC0_3D_MACRO_POLYGON_MODE_FRONT_FILL);
713 BEGIN_NVC0(push, NVC0_3D(MACRO_POLYGON_MODE_BACK), 1);
714 PUSH_DATA (push, NVC0_3D_MACRO_POLYGON_MODE_BACK_FILL);
715 IMMED_NVC0(push, NVC0_3D(POLYGON_SMOOTH_ENABLE), 0);
716 IMMED_NVC0(push, NVC0_3D(POLYGON_OFFSET_FILL_ENABLE), 0);
717 IMMED_NVC0(push, NVC0_3D(POLYGON_STIPPLE_ENABLE), 0);
718 IMMED_NVC0(push, NVC0_3D(CULL_FACE_ENABLE), 0);
719
720 /* zsa state */
721 IMMED_NVC0(push, NVC0_3D(DEPTH_TEST_ENABLE), 0);
722 IMMED_NVC0(push, NVC0_3D(STENCIL_ENABLE), 0);
723 IMMED_NVC0(push, NVC0_3D(ALPHA_TEST_ENABLE), 0);
724
725 /* disable transform feedback */
726 IMMED_NVC0(push, NVC0_3D(TFB_ENABLE), 0);
727 }
728
729 static void
730 nvc0_blitctx_pre_blit(struct nvc0_blitctx *ctx)
731 {
732 struct nvc0_context *nvc0 = ctx->nvc0;
733 struct nvc0_blitter *blitter = nvc0->screen->blitter;
734 int s;
735
736 ctx->saved.fb.width = nvc0->framebuffer.width;
737 ctx->saved.fb.height = nvc0->framebuffer.height;
738 ctx->saved.fb.nr_cbufs = nvc0->framebuffer.nr_cbufs;
739 ctx->saved.fb.cbufs[0] = nvc0->framebuffer.cbufs[0];
740 ctx->saved.fb.zsbuf = nvc0->framebuffer.zsbuf;
741
742 ctx->saved.rast = nvc0->rast;
743
744 ctx->saved.vp = nvc0->vertprog;
745 ctx->saved.tcp = nvc0->tctlprog;
746 ctx->saved.tep = nvc0->tevlprog;
747 ctx->saved.gp = nvc0->gmtyprog;
748 ctx->saved.fp = nvc0->fragprog;
749
750 ctx->saved.min_samples = nvc0->min_samples;
751
752 nvc0->rast = &ctx->rast;
753
754 nvc0->vertprog = &blitter->vp;
755 nvc0->tctlprog = NULL;
756 nvc0->tevlprog = NULL;
757 nvc0->gmtyprog = NULL;
758 nvc0->fragprog = ctx->fp;
759
760 for (s = 0; s <= 4; ++s) {
761 ctx->saved.num_textures[s] = nvc0->num_textures[s];
762 ctx->saved.num_samplers[s] = nvc0->num_samplers[s];
763 nvc0->textures_dirty[s] = (1 << nvc0->num_textures[s]) - 1;
764 nvc0->samplers_dirty[s] = (1 << nvc0->num_samplers[s]) - 1;
765 }
766 ctx->saved.texture[0] = nvc0->textures[4][0];
767 ctx->saved.texture[1] = nvc0->textures[4][1];
768 ctx->saved.sampler[0] = nvc0->samplers[4][0];
769 ctx->saved.sampler[1] = nvc0->samplers[4][1];
770
771 nvc0->samplers[4][0] = &blitter->sampler[ctx->filter];
772 nvc0->samplers[4][1] = &blitter->sampler[ctx->filter];
773
774 for (s = 0; s <= 3; ++s)
775 nvc0->num_samplers[s] = 0;
776 nvc0->num_samplers[4] = 2;
777
778 nvc0->min_samples = 1;
779
780 ctx->saved.dirty = nvc0->dirty;
781
782 nvc0->textures_dirty[4] |= 3;
783 nvc0->samplers_dirty[4] |= 3;
784
785 nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_FB);
786 nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_TEX(4, 0));
787 nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_TEX(4, 1));
788
789 nvc0->dirty = NVC0_NEW_FRAMEBUFFER | NVC0_NEW_MIN_SAMPLES |
790 NVC0_NEW_VERTPROG | NVC0_NEW_FRAGPROG |
791 NVC0_NEW_TCTLPROG | NVC0_NEW_TEVLPROG | NVC0_NEW_GMTYPROG |
792 NVC0_NEW_TEXTURES | NVC0_NEW_SAMPLERS;
793 }
794
795 static void
796 nvc0_blitctx_post_blit(struct nvc0_blitctx *blit)
797 {
798 struct nvc0_context *nvc0 = blit->nvc0;
799 int s;
800
801 pipe_surface_reference(&nvc0->framebuffer.cbufs[0], NULL);
802
803 nvc0->framebuffer.width = blit->saved.fb.width;
804 nvc0->framebuffer.height = blit->saved.fb.height;
805 nvc0->framebuffer.nr_cbufs = blit->saved.fb.nr_cbufs;
806 nvc0->framebuffer.cbufs[0] = blit->saved.fb.cbufs[0];
807 nvc0->framebuffer.zsbuf = blit->saved.fb.zsbuf;
808
809 nvc0->rast = blit->saved.rast;
810
811 nvc0->vertprog = blit->saved.vp;
812 nvc0->tctlprog = blit->saved.tcp;
813 nvc0->tevlprog = blit->saved.tep;
814 nvc0->gmtyprog = blit->saved.gp;
815 nvc0->fragprog = blit->saved.fp;
816
817 nvc0->min_samples = blit->saved.min_samples;
818
819 pipe_sampler_view_reference(&nvc0->textures[4][0], NULL);
820 pipe_sampler_view_reference(&nvc0->textures[4][1], NULL);
821
822 for (s = 0; s <= 4; ++s) {
823 nvc0->num_textures[s] = blit->saved.num_textures[s];
824 nvc0->num_samplers[s] = blit->saved.num_samplers[s];
825 nvc0->textures_dirty[s] = (1 << nvc0->num_textures[s]) - 1;
826 nvc0->samplers_dirty[s] = (1 << nvc0->num_samplers[s]) - 1;
827 }
828 nvc0->textures[4][0] = blit->saved.texture[0];
829 nvc0->textures[4][1] = blit->saved.texture[1];
830 nvc0->samplers[4][0] = blit->saved.sampler[0];
831 nvc0->samplers[4][1] = blit->saved.sampler[1];
832
833 nvc0->textures_dirty[4] |= 3;
834 nvc0->samplers_dirty[4] |= 3;
835
836 if (nvc0->cond_query)
837 nvc0->base.pipe.render_condition(&nvc0->base.pipe, nvc0->cond_query,
838 nvc0->cond_cond, nvc0->cond_mode);
839
840 nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_FB);
841 nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_TEX(4, 0));
842 nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_TEX(4, 1));
843
844 nvc0->dirty = blit->saved.dirty |
845 (NVC0_NEW_FRAMEBUFFER | NVC0_NEW_SCISSOR | NVC0_NEW_SAMPLE_MASK |
846 NVC0_NEW_RASTERIZER | NVC0_NEW_ZSA | NVC0_NEW_BLEND |
847 NVC0_NEW_TEXTURES | NVC0_NEW_SAMPLERS |
848 NVC0_NEW_VERTPROG | NVC0_NEW_FRAGPROG |
849 NVC0_NEW_TCTLPROG | NVC0_NEW_TEVLPROG | NVC0_NEW_GMTYPROG |
850 NVC0_NEW_TFB_TARGETS);
851
852 nvc0->base.pipe.set_min_samples(&nvc0->base.pipe, blit->saved.min_samples);
853 }
854
855 static void
856 nvc0_blit_3d(struct nvc0_context *nvc0, const struct pipe_blit_info *info)
857 {
858 struct nvc0_blitctx *blit = nvc0->blit;
859 struct nouveau_pushbuf *push = nvc0->base.pushbuf;
860 struct pipe_resource *src = info->src.resource;
861 struct pipe_resource *dst = info->dst.resource;
862 int32_t minx, maxx, miny, maxy;
863 int32_t i;
864 float x0, x1, y0, y1, z;
865 float dz;
866 float x_range, y_range;
867
868 blit->mode = nv50_blit_select_mode(info);
869 blit->color_mask = nv50_blit_derive_color_mask(info);
870 blit->filter = nv50_blit_get_filter(info);
871
872 nvc0_blit_select_fp(blit, info);
873 nvc0_blitctx_pre_blit(blit);
874
875 nvc0_blit_set_dst(blit, dst, info->dst.level, -1, info->dst.format);
876 nvc0_blit_set_src(blit, src, info->src.level, -1, info->src.format,
877 blit->filter);
878
879 nvc0_blitctx_prepare_state(blit);
880
881 nvc0_state_validate(nvc0, ~0, 48);
882
883 x_range = (float)info->src.box.width / (float)info->dst.box.width;
884 y_range = (float)info->src.box.height / (float)info->dst.box.height;
885
886 x0 = (float)info->src.box.x - x_range * (float)info->dst.box.x;
887 y0 = (float)info->src.box.y - y_range * (float)info->dst.box.y;
888
889 x1 = x0 + 16384.0f * x_range;
890 y1 = y0 + 16384.0f * y_range;
891
892 x0 *= (float)(1 << nv50_miptree(src)->ms_x);
893 x1 *= (float)(1 << nv50_miptree(src)->ms_x);
894 y0 *= (float)(1 << nv50_miptree(src)->ms_y);
895 y1 *= (float)(1 << nv50_miptree(src)->ms_y);
896
897 if (src->last_level > 0) {
898 /* If there are mip maps, GPU always assumes normalized coordinates. */
899 const unsigned l = info->src.level;
900 const float fh = u_minify(src->width0 << nv50_miptree(src)->ms_x, l);
901 const float fv = u_minify(src->height0 << nv50_miptree(src)->ms_y, l);
902 x0 /= fh;
903 x1 /= fh;
904 y0 /= fv;
905 y1 /= fv;
906 }
907
908 dz = (float)info->src.box.depth / (float)info->dst.box.depth;
909 z = (float)info->src.box.z;
910 if (nv50_miptree(src)->layout_3d)
911 z += 0.5f * dz;
912
913 IMMED_NVC0(push, NVC0_3D(VIEWPORT_TRANSFORM_EN), 0);
914 IMMED_NVC0(push, NVC0_3D(VIEW_VOLUME_CLIP_CTRL), 0x2 |
915 NVC0_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_RANGE_0_1);
916 BEGIN_NVC0(push, NVC0_3D(VIEWPORT_HORIZ(0)), 2);
917 PUSH_DATA (push, nvc0->framebuffer.width << 16);
918 PUSH_DATA (push, nvc0->framebuffer.height << 16);
919
920 /* Draw a large triangle in screen coordinates covering the whole
921 * render target, with scissors defining the destination region.
922 * The vertex is supplied with non-normalized texture coordinates
923 * arranged in a way to yield the desired offset and scale.
924 */
925
926 minx = info->dst.box.x;
927 maxx = info->dst.box.x + info->dst.box.width;
928 miny = info->dst.box.y;
929 maxy = info->dst.box.y + info->dst.box.height;
930 if (info->scissor_enable) {
931 minx = MAX2(minx, info->scissor.minx);
932 maxx = MIN2(maxx, info->scissor.maxx);
933 miny = MAX2(miny, info->scissor.miny);
934 maxy = MIN2(maxy, info->scissor.maxy);
935 }
936 BEGIN_NVC0(push, NVC0_3D(SCISSOR_HORIZ(0)), 2);
937 PUSH_DATA (push, (maxx << 16) | minx);
938 PUSH_DATA (push, (maxy << 16) | miny);
939
940 for (i = 0; i < info->dst.box.depth; ++i, z += dz) {
941 if (info->dst.box.z + i) {
942 BEGIN_NVC0(push, NVC0_3D(LAYER), 1);
943 PUSH_DATA (push, info->dst.box.z + i);
944 }
945
946 IMMED_NVC0(push, NVC0_3D(VERTEX_BEGIN_GL),
947 NVC0_3D_VERTEX_BEGIN_GL_PRIMITIVE_TRIANGLES);
948
949 BEGIN_NVC0(push, NVC0_3D(VTX_ATTR_DEFINE), 4);
950 PUSH_DATA (push, 0x74301);
951 PUSH_DATAf(push, x0);
952 PUSH_DATAf(push, y0);
953 PUSH_DATAf(push, z);
954 BEGIN_NVC0(push, NVC0_3D(VTX_ATTR_DEFINE), 3);
955 PUSH_DATA (push, 0x74200);
956 PUSH_DATAf(push, 0.0f);
957 PUSH_DATAf(push, 0.0f);
958 BEGIN_NVC0(push, NVC0_3D(VTX_ATTR_DEFINE), 4);
959 PUSH_DATA (push, 0x74301);
960 PUSH_DATAf(push, x1);
961 PUSH_DATAf(push, y0);
962 PUSH_DATAf(push, z);
963 BEGIN_NVC0(push, NVC0_3D(VTX_ATTR_DEFINE), 3);
964 PUSH_DATA (push, 0x74200);
965 PUSH_DATAf(push, 16384 << nv50_miptree(dst)->ms_x);
966 PUSH_DATAf(push, 0.0f);
967 BEGIN_NVC0(push, NVC0_3D(VTX_ATTR_DEFINE), 4);
968 PUSH_DATA (push, 0x74301);
969 PUSH_DATAf(push, x0);
970 PUSH_DATAf(push, y1);
971 PUSH_DATAf(push, z);
972 BEGIN_NVC0(push, NVC0_3D(VTX_ATTR_DEFINE), 3);
973 PUSH_DATA (push, 0x74200);
974 PUSH_DATAf(push, 0.0f);
975 PUSH_DATAf(push, 16384 << nv50_miptree(dst)->ms_y);
976
977 IMMED_NVC0(push, NVC0_3D(VERTEX_END_GL), 0);
978 }
979 if (info->dst.box.z + info->dst.box.depth - 1)
980 IMMED_NVC0(push, NVC0_3D(LAYER), 0);
981
982 nvc0_blitctx_post_blit(blit);
983
984 /* restore viewport */
985
986 BEGIN_NVC0(push, NVC0_3D(VIEWPORT_HORIZ(0)), 2);
987 PUSH_DATA (push, nvc0->vport_int[0]);
988 PUSH_DATA (push, nvc0->vport_int[1]);
989 IMMED_NVC0(push, NVC0_3D(VIEWPORT_TRANSFORM_EN), 1);
990 }
991
992 static void
993 nvc0_blit_eng2d(struct nvc0_context *nvc0, const struct pipe_blit_info *info)
994 {
995 struct nouveau_pushbuf *push = nvc0->base.pushbuf;
996 struct nv50_miptree *dst = nv50_miptree(info->dst.resource);
997 struct nv50_miptree *src = nv50_miptree(info->src.resource);
998 const int32_t srcx_adj = info->src.box.width < 0 ? -1 : 0;
999 const int32_t srcy_adj = info->src.box.height < 0 ? -1 : 0;
1000 const int dz = info->dst.box.z;
1001 const int sz = info->src.box.z;
1002 uint32_t dstw, dsth;
1003 int32_t dstx, dsty;
1004 int64_t srcx, srcy;
1005 int64_t du_dx, dv_dy;
1006 int i;
1007 uint32_t mode;
1008 uint32_t mask = nv50_blit_eng2d_get_mask(info);
1009 boolean b;
1010
1011 mode = nv50_blit_get_filter(info) ?
1012 NVC0_2D_BLIT_CONTROL_FILTER_BILINEAR :
1013 NVC0_2D_BLIT_CONTROL_FILTER_POINT_SAMPLE;
1014 mode |= (src->base.base.nr_samples > dst->base.base.nr_samples) ?
1015 NVC0_2D_BLIT_CONTROL_ORIGIN_CORNER : NVC0_2D_BLIT_CONTROL_ORIGIN_CENTER;
1016
1017 du_dx = ((int64_t)info->src.box.width << 32) / info->dst.box.width;
1018 dv_dy = ((int64_t)info->src.box.height << 32) / info->dst.box.height;
1019
1020 b = info->dst.format == info->src.format;
1021 nvc0_2d_texture_set(push, 1, dst, info->dst.level, dz, info->dst.format, b);
1022 nvc0_2d_texture_set(push, 0, src, info->src.level, sz, info->src.format, b);
1023
1024 if (info->scissor_enable) {
1025 BEGIN_NVC0(push, NVC0_2D(CLIP_X), 5);
1026 PUSH_DATA (push, info->scissor.minx << dst->ms_x);
1027 PUSH_DATA (push, info->scissor.miny << dst->ms_y);
1028 PUSH_DATA (push, (info->scissor.maxx - info->scissor.minx) << dst->ms_x);
1029 PUSH_DATA (push, (info->scissor.maxy - info->scissor.miny) << dst->ms_y);
1030 PUSH_DATA (push, 1); /* enable */
1031 }
1032
1033 if (mask != 0xffffffff) {
1034 IMMED_NVC0(push, NVC0_2D(ROP), 0xca); /* DPSDxax */
1035 IMMED_NVC0(push, NVC0_2D(PATTERN_COLOR_FORMAT),
1036 NVC0_2D_PATTERN_COLOR_FORMAT_32BPP);
1037 BEGIN_NVC0(push, NVC0_2D(PATTERN_COLOR(0)), 4);
1038 PUSH_DATA (push, 0x00000000);
1039 PUSH_DATA (push, mask);
1040 PUSH_DATA (push, 0xffffffff);
1041 PUSH_DATA (push, 0xffffffff);
1042 IMMED_NVC0(push, NVC0_2D(OPERATION), NVC0_2D_OPERATION_ROP);
1043 } else
1044 if (info->src.format != info->dst.format) {
1045 if (info->src.format == PIPE_FORMAT_R8_UNORM ||
1046 info->src.format == PIPE_FORMAT_R8_SNORM ||
1047 info->src.format == PIPE_FORMAT_R16_UNORM ||
1048 info->src.format == PIPE_FORMAT_R16_SNORM ||
1049 info->src.format == PIPE_FORMAT_R16_FLOAT ||
1050 info->src.format == PIPE_FORMAT_R32_FLOAT) {
1051 mask = 0xffff0000; /* also makes condition for OPERATION reset true */
1052 BEGIN_NVC0(push, NVC0_2D(BETA4), 2);
1053 PUSH_DATA (push, mask);
1054 PUSH_DATA (push, NVC0_2D_OPERATION_SRCCOPY_PREMULT);
1055 } else
1056 if (info->src.format == PIPE_FORMAT_A8_UNORM) {
1057 mask = 0xff000000;
1058 BEGIN_NVC0(push, NVC0_2D(BETA4), 2);
1059 PUSH_DATA (push, mask);
1060 PUSH_DATA (push, NVC0_2D_OPERATION_SRCCOPY_PREMULT);
1061 }
1062 }
1063
1064 if (src->ms_x > dst->ms_x || src->ms_y > dst->ms_y) {
1065 /* ms_x is always >= ms_y */
1066 du_dx <<= src->ms_x - dst->ms_x;
1067 dv_dy <<= src->ms_y - dst->ms_y;
1068 } else {
1069 du_dx >>= dst->ms_x - src->ms_x;
1070 dv_dy >>= dst->ms_y - src->ms_y;
1071 }
1072
1073 srcx = (int64_t)(info->src.box.x + srcx_adj) << (src->ms_x + 32);
1074 srcy = (int64_t)(info->src.box.y + srcy_adj) << (src->ms_y + 32);
1075
1076 if (src->base.base.nr_samples > dst->base.base.nr_samples) {
1077 /* center src coorinates for proper MS resolve filtering */
1078 srcx += (int64_t)1 << (src->ms_x + 31);
1079 srcy += (int64_t)1 << (src->ms_y + 31);
1080 }
1081
1082 dstx = info->dst.box.x << dst->ms_x;
1083 dsty = info->dst.box.y << dst->ms_y;
1084
1085 dstw = info->dst.box.width << dst->ms_x;
1086 dsth = info->dst.box.height << dst->ms_y;
1087
1088 if (dstx < 0) {
1089 dstw += dstx;
1090 srcx -= du_dx * dstx;
1091 dstx = 0;
1092 }
1093 if (dsty < 0) {
1094 dsth += dsty;
1095 srcy -= dv_dy * dsty;
1096 dsty = 0;
1097 }
1098
1099 IMMED_NVC0(push, NVC0_2D(BLIT_CONTROL), mode);
1100 BEGIN_NVC0(push, NVC0_2D(BLIT_DST_X), 4);
1101 PUSH_DATA (push, dstx);
1102 PUSH_DATA (push, dsty);
1103 PUSH_DATA (push, dstw);
1104 PUSH_DATA (push, dsth);
1105 BEGIN_NVC0(push, NVC0_2D(BLIT_DU_DX_FRACT), 4);
1106 PUSH_DATA (push, du_dx);
1107 PUSH_DATA (push, du_dx >> 32);
1108 PUSH_DATA (push, dv_dy);
1109 PUSH_DATA (push, dv_dy >> 32);
1110
1111 BCTX_REFN(nvc0->bufctx, 2D, &dst->base, WR);
1112 BCTX_REFN(nvc0->bufctx, 2D, &src->base, RD);
1113 nouveau_pushbuf_bufctx(nvc0->base.pushbuf, nvc0->bufctx);
1114 if (nouveau_pushbuf_validate(nvc0->base.pushbuf))
1115 return;
1116
1117 for (i = 0; i < info->dst.box.depth; ++i) {
1118 if (i > 0) {
1119 /* no scaling in z-direction possible for eng2d blits */
1120 if (dst->layout_3d) {
1121 BEGIN_NVC0(push, NVC0_2D(DST_LAYER), 1);
1122 PUSH_DATA (push, info->dst.box.z + i);
1123 } else {
1124 const unsigned z = info->dst.box.z + i;
1125 BEGIN_NVC0(push, NVC0_2D(DST_ADDRESS_HIGH), 2);
1126 PUSH_DATAh(push, dst->base.address + z * dst->layer_stride);
1127 PUSH_DATA (push, dst->base.address + z * dst->layer_stride);
1128 }
1129 if (src->layout_3d) {
1130 /* not possible because of depth tiling */
1131 assert(0);
1132 } else {
1133 const unsigned z = info->src.box.z + i;
1134 BEGIN_NVC0(push, NVC0_2D(SRC_ADDRESS_HIGH), 2);
1135 PUSH_DATAh(push, src->base.address + z * src->layer_stride);
1136 PUSH_DATA (push, src->base.address + z * src->layer_stride);
1137 }
1138 BEGIN_NVC0(push, NVC0_2D(BLIT_SRC_Y_INT), 1); /* trigger */
1139 PUSH_DATA (push, srcy >> 32);
1140 } else {
1141 BEGIN_NVC0(push, NVC0_2D(BLIT_SRC_X_FRACT), 4);
1142 PUSH_DATA (push, srcx);
1143 PUSH_DATA (push, srcx >> 32);
1144 PUSH_DATA (push, srcy);
1145 PUSH_DATA (push, srcy >> 32);
1146 }
1147 }
1148 nvc0_resource_validate(&dst->base, NOUVEAU_BO_WR);
1149 nvc0_resource_validate(&src->base, NOUVEAU_BO_RD);
1150
1151 nouveau_bufctx_reset(nvc0->bufctx, NVC0_BIND_2D);
1152
1153 if (info->scissor_enable)
1154 IMMED_NVC0(push, NVC0_2D(CLIP_ENABLE), 0);
1155 if (mask != 0xffffffff)
1156 IMMED_NVC0(push, NVC0_2D(OPERATION), NVC0_2D_OPERATION_SRCCOPY);
1157 }
1158
1159 static void
1160 nvc0_blit(struct pipe_context *pipe, const struct pipe_blit_info *info)
1161 {
1162 struct nvc0_context *nvc0 = nvc0_context(pipe);
1163 boolean eng3d = FALSE;
1164
1165 if (util_format_is_depth_or_stencil(info->dst.resource->format)) {
1166 if (!(info->mask & PIPE_MASK_ZS))
1167 return;
1168 if (info->dst.resource->format == PIPE_FORMAT_Z32_FLOAT ||
1169 info->dst.resource->format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT)
1170 eng3d = TRUE;
1171 if (info->filter != PIPE_TEX_FILTER_NEAREST)
1172 eng3d = TRUE;
1173 } else {
1174 if (!(info->mask & PIPE_MASK_RGBA))
1175 return;
1176 if (info->mask != PIPE_MASK_RGBA)
1177 eng3d = TRUE;
1178 }
1179
1180 if (nv50_miptree(info->src.resource)->layout_3d) {
1181 eng3d = TRUE;
1182 } else
1183 if (info->src.box.depth != info->dst.box.depth) {
1184 eng3d = TRUE;
1185 debug_printf("blit: cannot filter array or cube textures in z direction");
1186 }
1187
1188 if (!eng3d && info->dst.format != info->src.format) {
1189 if (!nv50_2d_dst_format_faithful(info->dst.format)) {
1190 eng3d = TRUE;
1191 } else
1192 if (!nv50_2d_src_format_faithful(info->src.format)) {
1193 if (!util_format_is_luminance(info->src.format)) {
1194 if (util_format_is_intensity(info->src.format))
1195 eng3d = info->src.format != PIPE_FORMAT_I8_UNORM;
1196 else
1197 if (!nv50_2d_dst_format_ops_supported(info->dst.format))
1198 eng3d = TRUE;
1199 else
1200 eng3d = !nv50_2d_format_supported(info->src.format);
1201 }
1202 } else
1203 if (util_format_is_luminance_alpha(info->src.format))
1204 eng3d = TRUE;
1205 }
1206
1207 if (info->src.resource->nr_samples == 8 &&
1208 info->dst.resource->nr_samples <= 1)
1209 eng3d = TRUE;
1210 #if 0
1211 /* FIXME: can't make this work with eng2d anymore, at least not on nv50 */
1212 if (info->src.resource->nr_samples > 1 ||
1213 info->dst.resource->nr_samples > 1)
1214 eng3d = TRUE;
1215 #endif
1216 /* FIXME: find correct src coordinates adjustments */
1217 if ((info->src.box.width != info->dst.box.width &&
1218 info->src.box.width != -info->dst.box.width) ||
1219 (info->src.box.height != info->dst.box.height &&
1220 info->src.box.height != -info->dst.box.height))
1221 eng3d = TRUE;
1222
1223 if (!eng3d)
1224 nvc0_blit_eng2d(nvc0, info);
1225 else
1226 nvc0_blit_3d(nvc0, info);
1227
1228 NOUVEAU_DRV_STAT(&nvc0->screen->base, tex_blit_count, 1);
1229 }
1230
1231 static void
1232 nvc0_flush_resource(struct pipe_context *ctx,
1233 struct pipe_resource *resource)
1234 {
1235 }
1236
1237 boolean
1238 nvc0_blitter_create(struct nvc0_screen *screen)
1239 {
1240 screen->blitter = CALLOC_STRUCT(nvc0_blitter);
1241 if (!screen->blitter) {
1242 NOUVEAU_ERR("failed to allocate blitter struct\n");
1243 return FALSE;
1244 }
1245 screen->blitter->screen = screen;
1246
1247 pipe_mutex_init(screen->blitter->mutex);
1248
1249 nvc0_blitter_make_vp(screen->blitter);
1250 nvc0_blitter_make_sampler(screen->blitter);
1251
1252 return TRUE;
1253 }
1254
1255 void
1256 nvc0_blitter_destroy(struct nvc0_screen *screen)
1257 {
1258 struct nvc0_blitter *blitter = screen->blitter;
1259 unsigned i, m;
1260
1261 for (i = 0; i < NV50_BLIT_MAX_TEXTURE_TYPES; ++i) {
1262 for (m = 0; m < NV50_BLIT_MODES; ++m) {
1263 struct nvc0_program *prog = blitter->fp[i][m];
1264 if (prog) {
1265 nvc0_program_destroy(NULL, prog);
1266 FREE((void *)prog->pipe.tokens);
1267 FREE(prog);
1268 }
1269 }
1270 }
1271
1272 FREE(blitter);
1273 }
1274
1275 boolean
1276 nvc0_blitctx_create(struct nvc0_context *nvc0)
1277 {
1278 nvc0->blit = CALLOC_STRUCT(nvc0_blitctx);
1279 if (!nvc0->blit) {
1280 NOUVEAU_ERR("failed to allocate blit context\n");
1281 return FALSE;
1282 }
1283
1284 nvc0->blit->nvc0 = nvc0;
1285
1286 nvc0->blit->rast.pipe.half_pixel_center = 1;
1287
1288 return TRUE;
1289 }
1290
1291 void
1292 nvc0_blitctx_destroy(struct nvc0_context *nvc0)
1293 {
1294 if (nvc0->blit)
1295 FREE(nvc0->blit);
1296 }
1297
1298 void
1299 nvc0_init_surface_functions(struct nvc0_context *nvc0)
1300 {
1301 struct pipe_context *pipe = &nvc0->base.pipe;
1302
1303 pipe->resource_copy_region = nvc0_resource_copy_region;
1304 pipe->blit = nvc0_blit;
1305 pipe->flush_resource = nvc0_flush_resource;
1306 pipe->clear_render_target = nvc0_clear_render_target;
1307 pipe->clear_depth_stencil = nvc0_clear_depth_stencil;
1308 }