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nvc0: fix blit triangle size to fully cover FB's > 8192x8192
[mesa.git] / src / gallium / drivers / nouveau / nvc0 / nvc0_surface.c
1 /*
2 * Copyright 2008 Ben Skeggs
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 #include <stdint.h>
24
25 #include "pipe/p_defines.h"
26
27 #include "util/u_inlines.h"
28 #include "util/u_pack_color.h"
29 #include "util/u_format.h"
30 #include "util/u_surface.h"
31
32 #include "os/os_thread.h"
33
34 #include "nvc0/nvc0_context.h"
35 #include "nvc0/nvc0_resource.h"
36
37 #include "nv50/g80_defs.xml.h"
38 #include "nv50/g80_texture.xml.h"
39
40 /* these are used in nv50_blit.h */
41 #define NV50_ENG2D_SUPPORTED_FORMATS 0xff9ccfe1cce3ccc9ULL
42 #define NV50_ENG2D_NOCONVERT_FORMATS 0x009cc02000000000ULL
43 #define NV50_ENG2D_LUMINANCE_FORMATS 0x001cc02000000000ULL
44 #define NV50_ENG2D_INTENSITY_FORMATS 0x0080000000000000ULL
45 #define NV50_ENG2D_OPERATION_FORMATS 0x060001c000638000ULL
46
47 #define NOUVEAU_DRIVER 0xc0
48 #include "nv50/nv50_blit.h"
49
50 static inline uint8_t
51 nvc0_2d_format(enum pipe_format format, bool dst, bool dst_src_equal)
52 {
53 uint8_t id = nvc0_format_table[format].rt;
54
55 /* A8_UNORM is treated as I8_UNORM as far as the 2D engine is concerned. */
56 if (!dst && unlikely(format == PIPE_FORMAT_I8_UNORM) && !dst_src_equal)
57 return G80_SURFACE_FORMAT_A8_UNORM;
58
59 /* Hardware values for color formats range from 0xc0 to 0xff,
60 * but the 2D engine doesn't support all of them.
61 */
62 if (nv50_2d_format_supported(format))
63 return id;
64 assert(dst_src_equal);
65
66 switch (util_format_get_blocksize(format)) {
67 case 1:
68 return G80_SURFACE_FORMAT_R8_UNORM;
69 case 2:
70 return G80_SURFACE_FORMAT_RG8_UNORM;
71 case 4:
72 return G80_SURFACE_FORMAT_BGRA8_UNORM;
73 case 8:
74 return G80_SURFACE_FORMAT_RGBA16_UNORM;
75 case 16:
76 return G80_SURFACE_FORMAT_RGBA32_FLOAT;
77 default:
78 assert(0);
79 return 0;
80 }
81 }
82
83 static int
84 nvc0_2d_texture_set(struct nouveau_pushbuf *push, bool dst,
85 struct nv50_miptree *mt, unsigned level, unsigned layer,
86 enum pipe_format pformat, bool dst_src_pformat_equal)
87 {
88 struct nouveau_bo *bo = mt->base.bo;
89 uint32_t width, height, depth;
90 uint32_t format;
91 uint32_t mthd = dst ? NV50_2D_DST_FORMAT : NV50_2D_SRC_FORMAT;
92 uint32_t offset = mt->level[level].offset;
93
94 format = nvc0_2d_format(pformat, dst, dst_src_pformat_equal);
95 if (!format) {
96 NOUVEAU_ERR("invalid/unsupported surface format: %s\n",
97 util_format_name(pformat));
98 return 1;
99 }
100
101 width = u_minify(mt->base.base.width0, level) << mt->ms_x;
102 height = u_minify(mt->base.base.height0, level) << mt->ms_y;
103 depth = u_minify(mt->base.base.depth0, level);
104
105 /* layer has to be < depth, and depth > tile depth / 2 */
106
107 if (!mt->layout_3d) {
108 offset += mt->layer_stride * layer;
109 layer = 0;
110 depth = 1;
111 } else
112 if (!dst) {
113 offset += nvc0_mt_zslice_offset(mt, level, layer);
114 layer = 0;
115 }
116
117 if (!nouveau_bo_memtype(bo)) {
118 BEGIN_NVC0(push, SUBC_2D(mthd), 2);
119 PUSH_DATA (push, format);
120 PUSH_DATA (push, 1);
121 BEGIN_NVC0(push, SUBC_2D(mthd + 0x14), 5);
122 PUSH_DATA (push, mt->level[level].pitch);
123 PUSH_DATA (push, width);
124 PUSH_DATA (push, height);
125 PUSH_DATAh(push, bo->offset + offset);
126 PUSH_DATA (push, bo->offset + offset);
127 } else {
128 BEGIN_NVC0(push, SUBC_2D(mthd), 5);
129 PUSH_DATA (push, format);
130 PUSH_DATA (push, 0);
131 PUSH_DATA (push, mt->level[level].tile_mode);
132 PUSH_DATA (push, depth);
133 PUSH_DATA (push, layer);
134 BEGIN_NVC0(push, SUBC_2D(mthd + 0x18), 4);
135 PUSH_DATA (push, width);
136 PUSH_DATA (push, height);
137 PUSH_DATAh(push, bo->offset + offset);
138 PUSH_DATA (push, bo->offset + offset);
139 }
140
141 #if 0
142 if (dst) {
143 BEGIN_NVC0(push, SUBC_2D(NVC0_2D_CLIP_X), 4);
144 PUSH_DATA (push, 0);
145 PUSH_DATA (push, 0);
146 PUSH_DATA (push, width);
147 PUSH_DATA (push, height);
148 }
149 #endif
150 return 0;
151 }
152
153 static int
154 nvc0_2d_texture_do_copy(struct nouveau_pushbuf *push,
155 struct nv50_miptree *dst, unsigned dst_level,
156 unsigned dx, unsigned dy, unsigned dz,
157 struct nv50_miptree *src, unsigned src_level,
158 unsigned sx, unsigned sy, unsigned sz,
159 unsigned w, unsigned h)
160 {
161 const enum pipe_format dfmt = dst->base.base.format;
162 const enum pipe_format sfmt = src->base.base.format;
163 int ret;
164 bool eqfmt = dfmt == sfmt;
165
166 if (!PUSH_SPACE(push, 2 * 16 + 32))
167 return PIPE_ERROR;
168
169 ret = nvc0_2d_texture_set(push, true, dst, dst_level, dz, dfmt, eqfmt);
170 if (ret)
171 return ret;
172
173 ret = nvc0_2d_texture_set(push, false, src, src_level, sz, sfmt, eqfmt);
174 if (ret)
175 return ret;
176
177 IMMED_NVC0(push, NVC0_2D(BLIT_CONTROL), 0x00);
178 BEGIN_NVC0(push, NVC0_2D(BLIT_DST_X), 4);
179 PUSH_DATA (push, dx << dst->ms_x);
180 PUSH_DATA (push, dy << dst->ms_y);
181 PUSH_DATA (push, w << dst->ms_x);
182 PUSH_DATA (push, h << dst->ms_y);
183 BEGIN_NVC0(push, NVC0_2D(BLIT_DU_DX_FRACT), 4);
184 PUSH_DATA (push, 0);
185 PUSH_DATA (push, 1);
186 PUSH_DATA (push, 0);
187 PUSH_DATA (push, 1);
188 BEGIN_NVC0(push, NVC0_2D(BLIT_SRC_X_FRACT), 4);
189 PUSH_DATA (push, 0);
190 PUSH_DATA (push, sx << src->ms_x);
191 PUSH_DATA (push, 0);
192 PUSH_DATA (push, sy << src->ms_y);
193
194 return 0;
195 }
196
197 static void
198 nvc0_resource_copy_region(struct pipe_context *pipe,
199 struct pipe_resource *dst, unsigned dst_level,
200 unsigned dstx, unsigned dsty, unsigned dstz,
201 struct pipe_resource *src, unsigned src_level,
202 const struct pipe_box *src_box)
203 {
204 struct nvc0_context *nvc0 = nvc0_context(pipe);
205 int ret;
206 bool m2mf;
207 unsigned dst_layer = dstz, src_layer = src_box->z;
208
209 if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) {
210 nouveau_copy_buffer(&nvc0->base,
211 nv04_resource(dst), dstx,
212 nv04_resource(src), src_box->x, src_box->width);
213 NOUVEAU_DRV_STAT(&nvc0->screen->base, buf_copy_bytes, src_box->width);
214 return;
215 }
216 NOUVEAU_DRV_STAT(&nvc0->screen->base, tex_copy_count, 1);
217
218 /* 0 and 1 are equal, only supporting 0/1, 2, 4 and 8 */
219 assert((src->nr_samples | 1) == (dst->nr_samples | 1));
220
221 m2mf = (src->format == dst->format) ||
222 (util_format_get_blocksizebits(src->format) ==
223 util_format_get_blocksizebits(dst->format));
224
225 nv04_resource(dst)->status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING;
226
227 if (m2mf) {
228 struct nv50_miptree *src_mt = nv50_miptree(src);
229 struct nv50_miptree *dst_mt = nv50_miptree(dst);
230 struct nv50_m2mf_rect drect, srect;
231 unsigned i;
232 unsigned nx = util_format_get_nblocksx(src->format, src_box->width)
233 << src_mt->ms_x;
234 unsigned ny = util_format_get_nblocksy(src->format, src_box->height)
235 << src_mt->ms_y;
236
237 nv50_m2mf_rect_setup(&drect, dst, dst_level, dstx, dsty, dstz);
238 nv50_m2mf_rect_setup(&srect, src, src_level,
239 src_box->x, src_box->y, src_box->z);
240
241 for (i = 0; i < src_box->depth; ++i) {
242 nvc0->m2mf_copy_rect(nvc0, &drect, &srect, nx, ny);
243
244 if (dst_mt->layout_3d)
245 drect.z++;
246 else
247 drect.base += dst_mt->layer_stride;
248
249 if (src_mt->layout_3d)
250 srect.z++;
251 else
252 srect.base += src_mt->layer_stride;
253 }
254 return;
255 }
256
257 assert(nv50_2d_dst_format_faithful(dst->format));
258 assert(nv50_2d_src_format_faithful(src->format));
259
260 BCTX_REFN(nvc0->bufctx, 2D, nv04_resource(src), RD);
261 BCTX_REFN(nvc0->bufctx, 2D, nv04_resource(dst), WR);
262 nouveau_pushbuf_bufctx(nvc0->base.pushbuf, nvc0->bufctx);
263 nouveau_pushbuf_validate(nvc0->base.pushbuf);
264
265 for (; dst_layer < dstz + src_box->depth; ++dst_layer, ++src_layer) {
266 ret = nvc0_2d_texture_do_copy(nvc0->base.pushbuf,
267 nv50_miptree(dst), dst_level,
268 dstx, dsty, dst_layer,
269 nv50_miptree(src), src_level,
270 src_box->x, src_box->y, src_layer,
271 src_box->width, src_box->height);
272 if (ret)
273 break;
274 }
275 nouveau_bufctx_reset(nvc0->bufctx, 0);
276 }
277
278 static void
279 nvc0_clear_render_target(struct pipe_context *pipe,
280 struct pipe_surface *dst,
281 const union pipe_color_union *color,
282 unsigned dstx, unsigned dsty,
283 unsigned width, unsigned height)
284 {
285 struct nvc0_context *nvc0 = nvc0_context(pipe);
286 struct nouveau_pushbuf *push = nvc0->base.pushbuf;
287 struct nv50_surface *sf = nv50_surface(dst);
288 struct nv04_resource *res = nv04_resource(sf->base.texture);
289 unsigned z;
290
291 assert(dst->texture->target != PIPE_BUFFER);
292
293 if (!PUSH_SPACE(push, 32 + sf->depth))
294 return;
295
296 PUSH_REFN (push, res->bo, res->domain | NOUVEAU_BO_WR);
297
298 BEGIN_NVC0(push, NVC0_3D(CLEAR_COLOR(0)), 4);
299 PUSH_DATAf(push, color->f[0]);
300 PUSH_DATAf(push, color->f[1]);
301 PUSH_DATAf(push, color->f[2]);
302 PUSH_DATAf(push, color->f[3]);
303
304 BEGIN_NVC0(push, NVC0_3D(SCREEN_SCISSOR_HORIZ), 2);
305 PUSH_DATA (push, ( width << 16) | dstx);
306 PUSH_DATA (push, (height << 16) | dsty);
307
308 BEGIN_NVC0(push, NVC0_3D(RT_CONTROL), 1);
309 PUSH_DATA (push, 1);
310 BEGIN_NVC0(push, NVC0_3D(RT_ADDRESS_HIGH(0)), 9);
311 PUSH_DATAh(push, res->address + sf->offset);
312 PUSH_DATA (push, res->address + sf->offset);
313 if (likely(nouveau_bo_memtype(res->bo))) {
314 struct nv50_miptree *mt = nv50_miptree(dst->texture);
315
316 PUSH_DATA(push, sf->width);
317 PUSH_DATA(push, sf->height);
318 PUSH_DATA(push, nvc0_format_table[dst->format].rt);
319 PUSH_DATA(push, (mt->layout_3d << 16) |
320 mt->level[sf->base.u.tex.level].tile_mode);
321 PUSH_DATA(push, dst->u.tex.first_layer + sf->depth);
322 PUSH_DATA(push, mt->layer_stride >> 2);
323 PUSH_DATA(push, dst->u.tex.first_layer);
324 IMMED_NVC0(push, NVC0_3D(MULTISAMPLE_MODE), mt->ms_mode);
325 } else {
326 if (res->base.target == PIPE_BUFFER) {
327 PUSH_DATA(push, 262144);
328 PUSH_DATA(push, 1);
329 } else {
330 PUSH_DATA(push, nv50_miptree(&res->base)->level[0].pitch);
331 PUSH_DATA(push, sf->height);
332 }
333 PUSH_DATA(push, nvc0_format_table[sf->base.format].rt);
334 PUSH_DATA(push, 1 << 12);
335 PUSH_DATA(push, 1);
336 PUSH_DATA(push, 0);
337 PUSH_DATA(push, 0);
338
339 IMMED_NVC0(push, NVC0_3D(ZETA_ENABLE), 0);
340 IMMED_NVC0(push, NVC0_3D(MULTISAMPLE_MODE), 0);
341
342 /* tiled textures don't have to be fenced, they're not mapped directly */
343 nvc0_resource_fence(res, NOUVEAU_BO_WR);
344 }
345
346 IMMED_NVC0(push, NVC0_3D(COND_MODE), NVC0_3D_COND_MODE_ALWAYS);
347
348 BEGIN_NIC0(push, NVC0_3D(CLEAR_BUFFERS), sf->depth);
349 for (z = 0; z < sf->depth; ++z) {
350 PUSH_DATA (push, 0x3c |
351 (z << NVC0_3D_CLEAR_BUFFERS_LAYER__SHIFT));
352 }
353
354 IMMED_NVC0(push, NVC0_3D(COND_MODE), nvc0->cond_condmode);
355
356 nvc0->dirty_3d |= NVC0_NEW_3D_FRAMEBUFFER;
357 }
358
359 static void
360 nvc0_clear_buffer_push_nvc0(struct pipe_context *pipe,
361 struct pipe_resource *res,
362 unsigned offset, unsigned size,
363 const void *data, int data_size)
364 {
365 struct nvc0_context *nvc0 = nvc0_context(pipe);
366 struct nouveau_pushbuf *push = nvc0->base.pushbuf;
367 struct nv04_resource *buf = nv04_resource(res);
368 unsigned i;
369
370 nouveau_bufctx_refn(nvc0->bufctx, 0, buf->bo, buf->domain | NOUVEAU_BO_WR);
371 nouveau_pushbuf_bufctx(push, nvc0->bufctx);
372 nouveau_pushbuf_validate(push);
373
374 unsigned count = (size + 3) / 4;
375 unsigned data_words = data_size / 4;
376
377 while (count) {
378 unsigned nr_data = MIN2(count, NV04_PFIFO_MAX_PACKET_LEN) / data_words;
379 unsigned nr = nr_data * data_words;
380
381 if (!PUSH_SPACE(push, nr + 9))
382 break;
383
384 BEGIN_NVC0(push, NVC0_M2MF(OFFSET_OUT_HIGH), 2);
385 PUSH_DATAh(push, buf->address + offset);
386 PUSH_DATA (push, buf->address + offset);
387 BEGIN_NVC0(push, NVC0_M2MF(LINE_LENGTH_IN), 2);
388 PUSH_DATA (push, MIN2(size, nr * 4));
389 PUSH_DATA (push, 1);
390 BEGIN_NVC0(push, NVC0_M2MF(EXEC), 1);
391 PUSH_DATA (push, 0x100111);
392
393 /* must not be interrupted (trap on QUERY fence, 0x50 works however) */
394 BEGIN_NIC0(push, NVC0_M2MF(DATA), nr);
395 for (i = 0; i < nr_data; i++)
396 PUSH_DATAp(push, data, data_words);
397
398 count -= nr;
399 offset += nr * 4;
400 size -= nr * 4;
401 }
402
403 if (buf->mm) {
404 nouveau_fence_ref(nvc0->screen->base.fence.current, &buf->fence);
405 nouveau_fence_ref(nvc0->screen->base.fence.current, &buf->fence_wr);
406 }
407
408 nouveau_bufctx_reset(nvc0->bufctx, 0);
409 }
410
411 static void
412 nvc0_clear_buffer_push_nve4(struct pipe_context *pipe,
413 struct pipe_resource *res,
414 unsigned offset, unsigned size,
415 const void *data, int data_size)
416 {
417 struct nvc0_context *nvc0 = nvc0_context(pipe);
418 struct nouveau_pushbuf *push = nvc0->base.pushbuf;
419 struct nv04_resource *buf = nv04_resource(res);
420 unsigned i;
421
422 nouveau_bufctx_refn(nvc0->bufctx, 0, buf->bo, buf->domain | NOUVEAU_BO_WR);
423 nouveau_pushbuf_bufctx(push, nvc0->bufctx);
424 nouveau_pushbuf_validate(push);
425
426 unsigned count = (size + 3) / 4;
427 unsigned data_words = data_size / 4;
428
429 while (count) {
430 unsigned nr_data = MIN2(count, NV04_PFIFO_MAX_PACKET_LEN) / data_words;
431 unsigned nr = nr_data * data_words;
432
433 if (!PUSH_SPACE(push, nr + 10))
434 break;
435
436 BEGIN_NVC0(push, NVE4_P2MF(UPLOAD_DST_ADDRESS_HIGH), 2);
437 PUSH_DATAh(push, buf->address + offset);
438 PUSH_DATA (push, buf->address + offset);
439 BEGIN_NVC0(push, NVE4_P2MF(UPLOAD_LINE_LENGTH_IN), 2);
440 PUSH_DATA (push, MIN2(size, nr * 4));
441 PUSH_DATA (push, 1);
442 /* must not be interrupted (trap on QUERY fence, 0x50 works however) */
443 BEGIN_1IC0(push, NVE4_P2MF(UPLOAD_EXEC), nr + 1);
444 PUSH_DATA (push, 0x1001);
445 for (i = 0; i < nr_data; i++)
446 PUSH_DATAp(push, data, data_words);
447
448 count -= nr;
449 offset += nr * 4;
450 size -= nr * 4;
451 }
452
453 if (buf->mm) {
454 nouveau_fence_ref(nvc0->screen->base.fence.current, &buf->fence);
455 nouveau_fence_ref(nvc0->screen->base.fence.current, &buf->fence_wr);
456 }
457
458 nouveau_bufctx_reset(nvc0->bufctx, 0);
459 }
460
461 static void
462 nvc0_clear_buffer_push(struct pipe_context *pipe,
463 struct pipe_resource *res,
464 unsigned offset, unsigned size,
465 const void *data, int data_size)
466 {
467 struct nvc0_context *nvc0 = nvc0_context(pipe);
468 unsigned tmp;
469
470 if (data_size == 1) {
471 tmp = *(unsigned char *)data;
472 tmp = (tmp << 24) | (tmp << 16) | (tmp << 8) | tmp;
473 data = &tmp;
474 data_size = 4;
475 } else if (data_size == 2) {
476 tmp = *(unsigned short *)data;
477 tmp = (tmp << 16) | tmp;
478 data = &tmp;
479 data_size = 4;
480 }
481
482 if (nvc0->screen->base.class_3d < NVE4_3D_CLASS)
483 nvc0_clear_buffer_push_nvc0(pipe, res, offset, size, data, data_size);
484 else
485 nvc0_clear_buffer_push_nve4(pipe, res, offset, size, data, data_size);
486 }
487
488 static void
489 nvc0_clear_buffer(struct pipe_context *pipe,
490 struct pipe_resource *res,
491 unsigned offset, unsigned size,
492 const void *data, int data_size)
493 {
494 struct nvc0_context *nvc0 = nvc0_context(pipe);
495 struct nouveau_pushbuf *push = nvc0->base.pushbuf;
496 struct nv04_resource *buf = nv04_resource(res);
497 union pipe_color_union color;
498 enum pipe_format dst_fmt;
499 unsigned width, height, elements;
500
501 assert(res->target == PIPE_BUFFER);
502 assert(nouveau_bo_memtype(buf->bo) == 0);
503
504 switch (data_size) {
505 case 16:
506 dst_fmt = PIPE_FORMAT_R32G32B32A32_UINT;
507 memcpy(&color.ui, data, 16);
508 break;
509 case 12:
510 /* RGB32 is not a valid RT format. This will be handled by the pushbuf
511 * uploader.
512 */
513 break;
514 case 8:
515 dst_fmt = PIPE_FORMAT_R32G32_UINT;
516 memcpy(&color.ui, data, 8);
517 memset(&color.ui[2], 0, 8);
518 break;
519 case 4:
520 dst_fmt = PIPE_FORMAT_R32_UINT;
521 memcpy(&color.ui, data, 4);
522 memset(&color.ui[1], 0, 12);
523 break;
524 case 2:
525 dst_fmt = PIPE_FORMAT_R16_UINT;
526 color.ui[0] = util_cpu_to_le32(
527 util_le16_to_cpu(*(unsigned short *)data));
528 memset(&color.ui[1], 0, 12);
529 break;
530 case 1:
531 dst_fmt = PIPE_FORMAT_R8_UINT;
532 color.ui[0] = util_cpu_to_le32(*(unsigned char *)data);
533 memset(&color.ui[1], 0, 12);
534 break;
535 default:
536 assert(!"Unsupported element size");
537 return;
538 }
539
540 assert(size % data_size == 0);
541
542 if (data_size == 12) {
543 nvc0_clear_buffer_push(pipe, res, offset, size, data, data_size);
544 return;
545 }
546
547 if (offset & 0xff) {
548 unsigned fixup_size = MIN2(size, align(offset, 0x100) - offset);
549 assert(fixup_size % data_size == 0);
550 nvc0_clear_buffer_push(pipe, res, offset, fixup_size, data, data_size);
551 offset += fixup_size;
552 size -= fixup_size;
553 if (!size)
554 return;
555 }
556
557 elements = size / data_size;
558 height = (elements + 16383) / 16384;
559 width = elements / height;
560 if (height > 1)
561 width &= ~0xff;
562 assert(width > 0);
563
564 if (!PUSH_SPACE(push, 40))
565 return;
566
567 PUSH_REFN (push, buf->bo, buf->domain | NOUVEAU_BO_WR);
568
569 BEGIN_NVC0(push, NVC0_3D(CLEAR_COLOR(0)), 4);
570 PUSH_DATAf(push, color.f[0]);
571 PUSH_DATAf(push, color.f[1]);
572 PUSH_DATAf(push, color.f[2]);
573 PUSH_DATAf(push, color.f[3]);
574 BEGIN_NVC0(push, NVC0_3D(SCREEN_SCISSOR_HORIZ), 2);
575 PUSH_DATA (push, width << 16);
576 PUSH_DATA (push, height << 16);
577
578 IMMED_NVC0(push, NVC0_3D(RT_CONTROL), 1);
579
580 BEGIN_NVC0(push, NVC0_3D(RT_ADDRESS_HIGH(0)), 9);
581 PUSH_DATAh(push, buf->address + offset);
582 PUSH_DATA (push, buf->address + offset);
583 PUSH_DATA (push, align(width * data_size, 0x100));
584 PUSH_DATA (push, height);
585 PUSH_DATA (push, nvc0_format_table[dst_fmt].rt);
586 PUSH_DATA (push, NVC0_3D_RT_TILE_MODE_LINEAR);
587 PUSH_DATA (push, 1);
588 PUSH_DATA (push, 0);
589 PUSH_DATA (push, 0);
590
591 IMMED_NVC0(push, NVC0_3D(ZETA_ENABLE), 0);
592 IMMED_NVC0(push, NVC0_3D(MULTISAMPLE_MODE), 0);
593
594 IMMED_NVC0(push, NVC0_3D(COND_MODE), NVC0_3D_COND_MODE_ALWAYS);
595
596 IMMED_NVC0(push, NVC0_3D(CLEAR_BUFFERS), 0x3c);
597
598 IMMED_NVC0(push, NVC0_3D(COND_MODE), nvc0->cond_condmode);
599
600 if (buf->mm) {
601 nouveau_fence_ref(nvc0->screen->base.fence.current, &buf->fence);
602 nouveau_fence_ref(nvc0->screen->base.fence.current, &buf->fence_wr);
603 }
604
605 if (width * height != elements) {
606 offset += width * height * data_size;
607 width = elements - width * height;
608 nvc0_clear_buffer_push(pipe, res, offset, width * data_size,
609 data, data_size);
610 }
611
612 nvc0->dirty_3d |= NVC0_NEW_3D_FRAMEBUFFER;
613 }
614
615 static void
616 nvc0_clear_depth_stencil(struct pipe_context *pipe,
617 struct pipe_surface *dst,
618 unsigned clear_flags,
619 double depth,
620 unsigned stencil,
621 unsigned dstx, unsigned dsty,
622 unsigned width, unsigned height)
623 {
624 struct nvc0_context *nvc0 = nvc0_context(pipe);
625 struct nouveau_pushbuf *push = nvc0->base.pushbuf;
626 struct nv50_miptree *mt = nv50_miptree(dst->texture);
627 struct nv50_surface *sf = nv50_surface(dst);
628 uint32_t mode = 0;
629 int unk = mt->base.base.target == PIPE_TEXTURE_2D;
630 unsigned z;
631
632 assert(dst->texture->target != PIPE_BUFFER);
633
634 if (!PUSH_SPACE(push, 32 + sf->depth))
635 return;
636
637 PUSH_REFN (push, mt->base.bo, mt->base.domain | NOUVEAU_BO_WR);
638
639 if (clear_flags & PIPE_CLEAR_DEPTH) {
640 BEGIN_NVC0(push, NVC0_3D(CLEAR_DEPTH), 1);
641 PUSH_DATAf(push, depth);
642 mode |= NVC0_3D_CLEAR_BUFFERS_Z;
643 }
644
645 if (clear_flags & PIPE_CLEAR_STENCIL) {
646 BEGIN_NVC0(push, NVC0_3D(CLEAR_STENCIL), 1);
647 PUSH_DATA (push, stencil & 0xff);
648 mode |= NVC0_3D_CLEAR_BUFFERS_S;
649 }
650
651 BEGIN_NVC0(push, NVC0_3D(SCREEN_SCISSOR_HORIZ), 2);
652 PUSH_DATA (push, ( width << 16) | dstx);
653 PUSH_DATA (push, (height << 16) | dsty);
654
655 BEGIN_NVC0(push, NVC0_3D(ZETA_ADDRESS_HIGH), 5);
656 PUSH_DATAh(push, mt->base.address + sf->offset);
657 PUSH_DATA (push, mt->base.address + sf->offset);
658 PUSH_DATA (push, nvc0_format_table[dst->format].rt);
659 PUSH_DATA (push, mt->level[sf->base.u.tex.level].tile_mode);
660 PUSH_DATA (push, mt->layer_stride >> 2);
661 BEGIN_NVC0(push, NVC0_3D(ZETA_ENABLE), 1);
662 PUSH_DATA (push, 1);
663 BEGIN_NVC0(push, NVC0_3D(ZETA_HORIZ), 3);
664 PUSH_DATA (push, sf->width);
665 PUSH_DATA (push, sf->height);
666 PUSH_DATA (push, (unk << 16) | (dst->u.tex.first_layer + sf->depth));
667 BEGIN_NVC0(push, NVC0_3D(ZETA_BASE_LAYER), 1);
668 PUSH_DATA (push, dst->u.tex.first_layer);
669 IMMED_NVC0(push, NVC0_3D(MULTISAMPLE_MODE), mt->ms_mode);
670
671 IMMED_NVC0(push, NVC0_3D(COND_MODE), NVC0_3D_COND_MODE_ALWAYS);
672
673 BEGIN_NIC0(push, NVC0_3D(CLEAR_BUFFERS), sf->depth);
674 for (z = 0; z < sf->depth; ++z) {
675 PUSH_DATA (push, mode |
676 (z << NVC0_3D_CLEAR_BUFFERS_LAYER__SHIFT));
677 }
678
679 IMMED_NVC0(push, NVC0_3D(COND_MODE), nvc0->cond_condmode);
680
681 nvc0->dirty_3d |= NVC0_NEW_3D_FRAMEBUFFER;
682 }
683
684 void
685 nvc0_clear(struct pipe_context *pipe, unsigned buffers,
686 const union pipe_color_union *color,
687 double depth, unsigned stencil)
688 {
689 struct nvc0_context *nvc0 = nvc0_context(pipe);
690 struct nouveau_pushbuf *push = nvc0->base.pushbuf;
691 struct pipe_framebuffer_state *fb = &nvc0->framebuffer;
692 unsigned i, j, k;
693 uint32_t mode = 0;
694
695 /* don't need NEW_BLEND, COLOR_MASK doesn't affect CLEAR_BUFFERS */
696 if (!nvc0_state_validate_3d(nvc0, NVC0_NEW_3D_FRAMEBUFFER))
697 return;
698
699 if (buffers & PIPE_CLEAR_COLOR && fb->nr_cbufs) {
700 BEGIN_NVC0(push, NVC0_3D(CLEAR_COLOR(0)), 4);
701 PUSH_DATAf(push, color->f[0]);
702 PUSH_DATAf(push, color->f[1]);
703 PUSH_DATAf(push, color->f[2]);
704 PUSH_DATAf(push, color->f[3]);
705 if (buffers & PIPE_CLEAR_COLOR0)
706 mode =
707 NVC0_3D_CLEAR_BUFFERS_R | NVC0_3D_CLEAR_BUFFERS_G |
708 NVC0_3D_CLEAR_BUFFERS_B | NVC0_3D_CLEAR_BUFFERS_A;
709 }
710
711 if (buffers & PIPE_CLEAR_DEPTH) {
712 BEGIN_NVC0(push, NVC0_3D(CLEAR_DEPTH), 1);
713 PUSH_DATA (push, fui(depth));
714 mode |= NVC0_3D_CLEAR_BUFFERS_Z;
715 }
716
717 if (buffers & PIPE_CLEAR_STENCIL) {
718 BEGIN_NVC0(push, NVC0_3D(CLEAR_STENCIL), 1);
719 PUSH_DATA (push, stencil & 0xff);
720 mode |= NVC0_3D_CLEAR_BUFFERS_S;
721 }
722
723 if (mode) {
724 int zs_layers = 0, color0_layers = 0;
725 if (fb->cbufs[0] && (mode & 0x3c))
726 color0_layers = fb->cbufs[0]->u.tex.last_layer -
727 fb->cbufs[0]->u.tex.first_layer + 1;
728 if (fb->zsbuf && (mode & ~0x3c))
729 zs_layers = fb->zsbuf->u.tex.last_layer -
730 fb->zsbuf->u.tex.first_layer + 1;
731
732 for (j = 0; j < MIN2(zs_layers, color0_layers); j++) {
733 BEGIN_NVC0(push, NVC0_3D(CLEAR_BUFFERS), 1);
734 PUSH_DATA(push, mode | (j << NVC0_3D_CLEAR_BUFFERS_LAYER__SHIFT));
735 }
736 for (k = j; k < zs_layers; k++) {
737 BEGIN_NVC0(push, NVC0_3D(CLEAR_BUFFERS), 1);
738 PUSH_DATA(push, (mode & ~0x3c) | (k << NVC0_3D_CLEAR_BUFFERS_LAYER__SHIFT));
739 }
740 for (k = j; k < color0_layers; k++) {
741 BEGIN_NVC0(push, NVC0_3D(CLEAR_BUFFERS), 1);
742 PUSH_DATA(push, (mode & 0x3c) | (k << NVC0_3D_CLEAR_BUFFERS_LAYER__SHIFT));
743 }
744 }
745
746 for (i = 1; i < fb->nr_cbufs; i++) {
747 struct pipe_surface *sf = fb->cbufs[i];
748 if (!sf || !(buffers & (PIPE_CLEAR_COLOR0 << i)))
749 continue;
750 for (j = 0; j <= sf->u.tex.last_layer - sf->u.tex.first_layer; j++) {
751 BEGIN_NVC0(push, NVC0_3D(CLEAR_BUFFERS), 1);
752 PUSH_DATA (push, (i << 6) | 0x3c |
753 (j << NVC0_3D_CLEAR_BUFFERS_LAYER__SHIFT));
754 }
755 }
756 }
757
758
759 /* =============================== BLIT CODE ===================================
760 */
761
762 struct nvc0_blitter
763 {
764 struct nvc0_program *fp[NV50_BLIT_MAX_TEXTURE_TYPES][NV50_BLIT_MODES];
765 struct nvc0_program vp;
766
767 struct nv50_tsc_entry sampler[2]; /* nearest, bilinear */
768
769 pipe_mutex mutex;
770
771 struct nvc0_screen *screen;
772 };
773
774 struct nvc0_blitctx
775 {
776 struct nvc0_context *nvc0;
777 struct nvc0_program *fp;
778 uint8_t mode;
779 uint16_t color_mask;
780 uint8_t filter;
781 uint8_t render_condition_enable;
782 enum pipe_texture_target target;
783 struct {
784 struct pipe_framebuffer_state fb;
785 struct nvc0_rasterizer_stateobj *rast;
786 struct nvc0_program *vp;
787 struct nvc0_program *tcp;
788 struct nvc0_program *tep;
789 struct nvc0_program *gp;
790 struct nvc0_program *fp;
791 unsigned num_textures[5];
792 unsigned num_samplers[5];
793 struct pipe_sampler_view *texture[2];
794 struct nv50_tsc_entry *sampler[2];
795 unsigned min_samples;
796 uint32_t dirty_3d;
797 } saved;
798 struct nvc0_rasterizer_stateobj rast;
799 };
800
801 static void
802 nvc0_blitter_make_vp(struct nvc0_blitter *blit)
803 {
804 static const uint32_t code_nvc0[] =
805 {
806 0xfff11c26, 0x06000080, /* vfetch b64 $r4:$r5 a[0x80] */
807 0xfff01c46, 0x06000090, /* vfetch b96 $r0:$r1:$r2 a[0x90] */
808 0x13f01c26, 0x0a7e0070, /* export b64 o[0x70] $r4:$r5 */
809 0x03f01c46, 0x0a7e0080, /* export b96 o[0x80] $r0:$r1:$r2 */
810 0x00001de7, 0x80000000, /* exit */
811 };
812 static const uint32_t code_nve4[] =
813 {
814 0x00000007, 0x20000000, /* sched */
815 0xfff11c26, 0x06000080, /* vfetch b64 $r4:$r5 a[0x80] */
816 0xfff01c46, 0x06000090, /* vfetch b96 $r0:$r1:$r2 a[0x90] */
817 0x13f01c26, 0x0a7e0070, /* export b64 o[0x70] $r4:$r5 */
818 0x03f01c46, 0x0a7e0080, /* export b96 o[0x80] $r0:$r1:$r2 */
819 0x00001de7, 0x80000000, /* exit */
820 };
821 static const uint32_t code_gk110[] =
822 {
823 0x00000000, 0x08000000, /* sched */
824 0x401ffc12, 0x7ec7fc00, /* ld b64 $r4d a[0x80] 0x0 0x0 */
825 0x481ffc02, 0x7ecbfc00, /* ld b96 $r0t a[0x90] 0x0 0x0 */
826 0x381ffc12, 0x7f07fc00, /* st b64 a[0x70] $r4d 0x0 0x0 */
827 0x401ffc02, 0x7f0bfc00, /* st b96 a[0x80] $r0t 0x0 0x0 */
828 0x001c003c, 0x18000000, /* exit */
829 };
830 static const uint32_t code_gm107[] =
831 {
832 0xfc0007e0, 0x001f8000, /* sched 0x7e0 0x7e0 0x7e0 */
833 0x0807ff04, 0xefd8ff80, /* ld b64 $r4 a[0x80] 0x0 */
834 0x0907ff00, 0xefd97f80, /* ld b96 $r0 a[0x90] 0x0 */
835 0x0707ff04, 0xeff0ff80, /* st b64 a[0x70] $r4 0x0 */
836 0xfc0007e0, 0x00000000, /* sched 0x7e0 0x7e0 0x0 */
837 0x0807ff00, 0xeff17f80, /* st b96 a[0x80] $r0 0x0 */
838 0x0007000f, 0xe3000000, /* exit */
839 };
840
841 blit->vp.type = PIPE_SHADER_VERTEX;
842 blit->vp.translated = true;
843 if (blit->screen->base.class_3d >= GM107_3D_CLASS) {
844 blit->vp.code = (uint32_t *)code_gm107; /* const_cast */
845 blit->vp.code_size = sizeof(code_gm107);
846 } else
847 if (blit->screen->base.class_3d >= NVF0_3D_CLASS) {
848 blit->vp.code = (uint32_t *)code_gk110; /* const_cast */
849 blit->vp.code_size = sizeof(code_gk110);
850 } else
851 if (blit->screen->base.class_3d >= NVE4_3D_CLASS) {
852 blit->vp.code = (uint32_t *)code_nve4; /* const_cast */
853 blit->vp.code_size = sizeof(code_nve4);
854 } else {
855 blit->vp.code = (uint32_t *)code_nvc0; /* const_cast */
856 blit->vp.code_size = sizeof(code_nvc0);
857 }
858 blit->vp.num_gprs = 6;
859 blit->vp.vp.edgeflag = PIPE_MAX_ATTRIBS;
860
861 blit->vp.hdr[0] = 0x00020461; /* vertprog magic */
862 blit->vp.hdr[4] = 0x000ff000; /* no outputs read */
863 blit->vp.hdr[6] = 0x00000073; /* a[0x80].xy, a[0x90].xyz */
864 blit->vp.hdr[13] = 0x00073000; /* o[0x70].xy, o[0x80].xyz */
865 }
866
867 static void
868 nvc0_blitter_make_sampler(struct nvc0_blitter *blit)
869 {
870 /* clamp to edge, min/max lod = 0, nearest filtering */
871
872 blit->sampler[0].id = -1;
873
874 blit->sampler[0].tsc[0] = G80_TSC_0_SRGB_CONVERSION |
875 (G80_TSC_WRAP_CLAMP_TO_EDGE << G80_TSC_0_ADDRESS_U__SHIFT) |
876 (G80_TSC_WRAP_CLAMP_TO_EDGE << G80_TSC_0_ADDRESS_V__SHIFT) |
877 (G80_TSC_WRAP_CLAMP_TO_EDGE << G80_TSC_0_ADDRESS_P__SHIFT);
878 blit->sampler[0].tsc[1] =
879 G80_TSC_1_MAG_FILTER_NEAREST |
880 G80_TSC_1_MIN_FILTER_NEAREST |
881 G80_TSC_1_MIP_FILTER_NONE;
882
883 /* clamp to edge, min/max lod = 0, bilinear filtering */
884
885 blit->sampler[1].id = -1;
886
887 blit->sampler[1].tsc[0] = blit->sampler[0].tsc[0];
888 blit->sampler[1].tsc[1] =
889 G80_TSC_1_MAG_FILTER_LINEAR |
890 G80_TSC_1_MIN_FILTER_LINEAR |
891 G80_TSC_1_MIP_FILTER_NONE;
892 }
893
894 static void
895 nvc0_blit_select_fp(struct nvc0_blitctx *ctx, const struct pipe_blit_info *info)
896 {
897 struct nvc0_blitter *blitter = ctx->nvc0->screen->blitter;
898
899 const enum pipe_texture_target ptarg =
900 nv50_blit_reinterpret_pipe_texture_target(info->src.resource->target);
901
902 const unsigned targ = nv50_blit_texture_type(ptarg);
903 const unsigned mode = ctx->mode;
904
905 if (!blitter->fp[targ][mode]) {
906 pipe_mutex_lock(blitter->mutex);
907 if (!blitter->fp[targ][mode])
908 blitter->fp[targ][mode] =
909 nv50_blitter_make_fp(&ctx->nvc0->base.pipe, mode, ptarg);
910 pipe_mutex_unlock(blitter->mutex);
911 }
912 ctx->fp = blitter->fp[targ][mode];
913 }
914
915 static void
916 nvc0_blit_set_dst(struct nvc0_blitctx *ctx,
917 struct pipe_resource *res, unsigned level, unsigned layer,
918 enum pipe_format format)
919 {
920 struct nvc0_context *nvc0 = ctx->nvc0;
921 struct pipe_context *pipe = &nvc0->base.pipe;
922 struct pipe_surface templ;
923
924 if (util_format_is_depth_or_stencil(format))
925 templ.format = nv50_blit_zeta_to_colour_format(format);
926 else
927 templ.format = format;
928
929 templ.u.tex.level = level;
930 templ.u.tex.first_layer = templ.u.tex.last_layer = layer;
931
932 if (layer == -1) {
933 templ.u.tex.first_layer = 0;
934 templ.u.tex.last_layer =
935 (res->target == PIPE_TEXTURE_3D ? res->depth0 : res->array_size) - 1;
936 }
937
938 nvc0->framebuffer.cbufs[0] = nvc0_miptree_surface_new(pipe, res, &templ);
939 nvc0->framebuffer.nr_cbufs = 1;
940 nvc0->framebuffer.zsbuf = NULL;
941 nvc0->framebuffer.width = nvc0->framebuffer.cbufs[0]->width;
942 nvc0->framebuffer.height = nvc0->framebuffer.cbufs[0]->height;
943 }
944
945 static void
946 nvc0_blit_set_src(struct nvc0_blitctx *ctx,
947 struct pipe_resource *res, unsigned level, unsigned layer,
948 enum pipe_format format, const uint8_t filter)
949 {
950 struct nvc0_context *nvc0 = ctx->nvc0;
951 struct pipe_context *pipe = &nvc0->base.pipe;
952 struct pipe_sampler_view templ;
953 uint32_t flags;
954 unsigned s;
955 enum pipe_texture_target target;
956
957 target = nv50_blit_reinterpret_pipe_texture_target(res->target);
958
959 templ.format = format;
960 templ.u.tex.first_layer = templ.u.tex.last_layer = layer;
961 templ.u.tex.first_level = templ.u.tex.last_level = level;
962 templ.swizzle_r = PIPE_SWIZZLE_RED;
963 templ.swizzle_g = PIPE_SWIZZLE_GREEN;
964 templ.swizzle_b = PIPE_SWIZZLE_BLUE;
965 templ.swizzle_a = PIPE_SWIZZLE_ALPHA;
966
967 if (layer == -1) {
968 templ.u.tex.first_layer = 0;
969 templ.u.tex.last_layer =
970 (res->target == PIPE_TEXTURE_3D ? res->depth0 : res->array_size) - 1;
971 }
972
973 flags = res->last_level ? 0 : NV50_TEXVIEW_SCALED_COORDS;
974 flags |= NV50_TEXVIEW_ACCESS_RESOLVE;
975 if (filter && res->nr_samples == 8)
976 flags |= NV50_TEXVIEW_FILTER_MSAA8;
977
978 nvc0->textures[4][0] = nvc0_create_texture_view(
979 pipe, res, &templ, flags, target);
980 nvc0->textures[4][1] = NULL;
981
982 for (s = 0; s <= 3; ++s)
983 nvc0->num_textures[s] = 0;
984 nvc0->num_textures[4] = 1;
985
986 templ.format = nv50_zs_to_s_format(format);
987 if (templ.format != format) {
988 nvc0->textures[4][1] = nvc0_create_texture_view(
989 pipe, res, &templ, flags, target);
990 nvc0->num_textures[4] = 2;
991 }
992 }
993
994 static void
995 nvc0_blitctx_prepare_state(struct nvc0_blitctx *blit)
996 {
997 struct nouveau_pushbuf *push = blit->nvc0->base.pushbuf;
998
999 /* TODO: maybe make this a MACRO (if we need more logic) ? */
1000
1001 if (blit->nvc0->cond_query && !blit->render_condition_enable)
1002 IMMED_NVC0(push, NVC0_3D(COND_MODE), NVC0_3D_COND_MODE_ALWAYS);
1003
1004 /* blend state */
1005 BEGIN_NVC0(push, NVC0_3D(COLOR_MASK(0)), 1);
1006 PUSH_DATA (push, blit->color_mask);
1007 IMMED_NVC0(push, NVC0_3D(BLEND_ENABLE(0)), 0);
1008 IMMED_NVC0(push, NVC0_3D(LOGIC_OP_ENABLE), 0);
1009
1010 /* rasterizer state */
1011 IMMED_NVC0(push, NVC0_3D(FRAG_COLOR_CLAMP_EN), 0);
1012 IMMED_NVC0(push, NVC0_3D(MULTISAMPLE_ENABLE), 0);
1013 BEGIN_NVC0(push, NVC0_3D(MSAA_MASK(0)), 4);
1014 PUSH_DATA (push, 0xffff);
1015 PUSH_DATA (push, 0xffff);
1016 PUSH_DATA (push, 0xffff);
1017 PUSH_DATA (push, 0xffff);
1018 BEGIN_NVC0(push, NVC0_3D(MACRO_POLYGON_MODE_FRONT), 1);
1019 PUSH_DATA (push, NVC0_3D_MACRO_POLYGON_MODE_FRONT_FILL);
1020 BEGIN_NVC0(push, NVC0_3D(MACRO_POLYGON_MODE_BACK), 1);
1021 PUSH_DATA (push, NVC0_3D_MACRO_POLYGON_MODE_BACK_FILL);
1022 IMMED_NVC0(push, NVC0_3D(POLYGON_SMOOTH_ENABLE), 0);
1023 IMMED_NVC0(push, NVC0_3D(POLYGON_OFFSET_FILL_ENABLE), 0);
1024 IMMED_NVC0(push, NVC0_3D(POLYGON_STIPPLE_ENABLE), 0);
1025 IMMED_NVC0(push, NVC0_3D(CULL_FACE_ENABLE), 0);
1026
1027 /* zsa state */
1028 IMMED_NVC0(push, NVC0_3D(DEPTH_TEST_ENABLE), 0);
1029 IMMED_NVC0(push, NVC0_3D(DEPTH_BOUNDS_EN), 0);
1030 IMMED_NVC0(push, NVC0_3D(STENCIL_ENABLE), 0);
1031 IMMED_NVC0(push, NVC0_3D(ALPHA_TEST_ENABLE), 0);
1032
1033 /* disable transform feedback */
1034 IMMED_NVC0(push, NVC0_3D(TFB_ENABLE), 0);
1035 }
1036
1037 static void
1038 nvc0_blitctx_pre_blit(struct nvc0_blitctx *ctx)
1039 {
1040 struct nvc0_context *nvc0 = ctx->nvc0;
1041 struct nvc0_blitter *blitter = nvc0->screen->blitter;
1042 int s;
1043
1044 ctx->saved.fb.width = nvc0->framebuffer.width;
1045 ctx->saved.fb.height = nvc0->framebuffer.height;
1046 ctx->saved.fb.nr_cbufs = nvc0->framebuffer.nr_cbufs;
1047 ctx->saved.fb.cbufs[0] = nvc0->framebuffer.cbufs[0];
1048 ctx->saved.fb.zsbuf = nvc0->framebuffer.zsbuf;
1049
1050 ctx->saved.rast = nvc0->rast;
1051
1052 ctx->saved.vp = nvc0->vertprog;
1053 ctx->saved.tcp = nvc0->tctlprog;
1054 ctx->saved.tep = nvc0->tevlprog;
1055 ctx->saved.gp = nvc0->gmtyprog;
1056 ctx->saved.fp = nvc0->fragprog;
1057
1058 ctx->saved.min_samples = nvc0->min_samples;
1059
1060 nvc0->rast = &ctx->rast;
1061
1062 nvc0->vertprog = &blitter->vp;
1063 nvc0->tctlprog = NULL;
1064 nvc0->tevlprog = NULL;
1065 nvc0->gmtyprog = NULL;
1066 nvc0->fragprog = ctx->fp;
1067
1068 for (s = 0; s <= 4; ++s) {
1069 ctx->saved.num_textures[s] = nvc0->num_textures[s];
1070 ctx->saved.num_samplers[s] = nvc0->num_samplers[s];
1071 nvc0->textures_dirty[s] = (1 << nvc0->num_textures[s]) - 1;
1072 nvc0->samplers_dirty[s] = (1 << nvc0->num_samplers[s]) - 1;
1073 }
1074 ctx->saved.texture[0] = nvc0->textures[4][0];
1075 ctx->saved.texture[1] = nvc0->textures[4][1];
1076 ctx->saved.sampler[0] = nvc0->samplers[4][0];
1077 ctx->saved.sampler[1] = nvc0->samplers[4][1];
1078
1079 nvc0->samplers[4][0] = &blitter->sampler[ctx->filter];
1080 nvc0->samplers[4][1] = &blitter->sampler[ctx->filter];
1081
1082 for (s = 0; s <= 3; ++s)
1083 nvc0->num_samplers[s] = 0;
1084 nvc0->num_samplers[4] = 2;
1085
1086 nvc0->min_samples = 1;
1087
1088 ctx->saved.dirty_3d = nvc0->dirty_3d;
1089
1090 nvc0->textures_dirty[4] |= 3;
1091 nvc0->samplers_dirty[4] |= 3;
1092
1093 nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_3D_FB);
1094 nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_3D_TEX(4, 0));
1095 nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_3D_TEX(4, 1));
1096
1097 nvc0->dirty_3d = NVC0_NEW_3D_FRAMEBUFFER | NVC0_NEW_3D_MIN_SAMPLES |
1098 NVC0_NEW_3D_VERTPROG | NVC0_NEW_3D_FRAGPROG |
1099 NVC0_NEW_3D_TCTLPROG | NVC0_NEW_3D_TEVLPROG | NVC0_NEW_3D_GMTYPROG |
1100 NVC0_NEW_3D_TEXTURES | NVC0_NEW_3D_SAMPLERS;
1101 }
1102
1103 static void
1104 nvc0_blitctx_post_blit(struct nvc0_blitctx *blit)
1105 {
1106 struct nvc0_context *nvc0 = blit->nvc0;
1107 int s;
1108
1109 pipe_surface_reference(&nvc0->framebuffer.cbufs[0], NULL);
1110
1111 nvc0->framebuffer.width = blit->saved.fb.width;
1112 nvc0->framebuffer.height = blit->saved.fb.height;
1113 nvc0->framebuffer.nr_cbufs = blit->saved.fb.nr_cbufs;
1114 nvc0->framebuffer.cbufs[0] = blit->saved.fb.cbufs[0];
1115 nvc0->framebuffer.zsbuf = blit->saved.fb.zsbuf;
1116
1117 nvc0->rast = blit->saved.rast;
1118
1119 nvc0->vertprog = blit->saved.vp;
1120 nvc0->tctlprog = blit->saved.tcp;
1121 nvc0->tevlprog = blit->saved.tep;
1122 nvc0->gmtyprog = blit->saved.gp;
1123 nvc0->fragprog = blit->saved.fp;
1124
1125 nvc0->min_samples = blit->saved.min_samples;
1126
1127 pipe_sampler_view_reference(&nvc0->textures[4][0], NULL);
1128 pipe_sampler_view_reference(&nvc0->textures[4][1], NULL);
1129
1130 for (s = 0; s <= 4; ++s) {
1131 nvc0->num_textures[s] = blit->saved.num_textures[s];
1132 nvc0->num_samplers[s] = blit->saved.num_samplers[s];
1133 nvc0->textures_dirty[s] = (1 << nvc0->num_textures[s]) - 1;
1134 nvc0->samplers_dirty[s] = (1 << nvc0->num_samplers[s]) - 1;
1135 }
1136 nvc0->textures[4][0] = blit->saved.texture[0];
1137 nvc0->textures[4][1] = blit->saved.texture[1];
1138 nvc0->samplers[4][0] = blit->saved.sampler[0];
1139 nvc0->samplers[4][1] = blit->saved.sampler[1];
1140
1141 nvc0->textures_dirty[4] |= 3;
1142 nvc0->samplers_dirty[4] |= 3;
1143
1144 if (nvc0->cond_query && !blit->render_condition_enable)
1145 nvc0->base.pipe.render_condition(&nvc0->base.pipe, nvc0->cond_query,
1146 nvc0->cond_cond, nvc0->cond_mode);
1147
1148 nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_3D_VTX_TMP);
1149 nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_3D_FB);
1150 nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_3D_TEX(4, 0));
1151 nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_3D_TEX(4, 1));
1152 nouveau_scratch_done(&nvc0->base);
1153
1154 nvc0->dirty_3d = blit->saved.dirty_3d |
1155 (NVC0_NEW_3D_FRAMEBUFFER | NVC0_NEW_3D_SCISSOR | NVC0_NEW_3D_SAMPLE_MASK |
1156 NVC0_NEW_3D_RASTERIZER | NVC0_NEW_3D_ZSA | NVC0_NEW_3D_BLEND |
1157 NVC0_NEW_3D_VIEWPORT |
1158 NVC0_NEW_3D_TEXTURES | NVC0_NEW_3D_SAMPLERS |
1159 NVC0_NEW_3D_VERTPROG | NVC0_NEW_3D_FRAGPROG |
1160 NVC0_NEW_3D_TCTLPROG | NVC0_NEW_3D_TEVLPROG | NVC0_NEW_3D_GMTYPROG |
1161 NVC0_NEW_3D_TFB_TARGETS | NVC0_NEW_3D_VERTEX | NVC0_NEW_3D_ARRAYS);
1162 nvc0->scissors_dirty |= 1;
1163 nvc0->viewports_dirty |= 1;
1164
1165 nvc0->base.pipe.set_min_samples(&nvc0->base.pipe, blit->saved.min_samples);
1166 }
1167
1168 static void
1169 nvc0_blit_3d(struct nvc0_context *nvc0, const struct pipe_blit_info *info)
1170 {
1171 struct nvc0_blitctx *blit = nvc0->blit;
1172 struct nouveau_pushbuf *push = nvc0->base.pushbuf;
1173 struct pipe_resource *src = info->src.resource;
1174 struct pipe_resource *dst = info->dst.resource;
1175 struct nouveau_bo *vtxbuf_bo;
1176 uint32_t stride, length, *vbuf;
1177 uint64_t vtxbuf;
1178 int32_t minx, maxx, miny, maxy;
1179 int32_t i, n;
1180 float x0, x1, y0, y1, z;
1181 float dz;
1182 float x_range, y_range;
1183
1184 blit->mode = nv50_blit_select_mode(info);
1185 blit->color_mask = nv50_blit_derive_color_mask(info);
1186 blit->filter = nv50_blit_get_filter(info);
1187 blit->render_condition_enable = info->render_condition_enable;
1188
1189 nvc0_blit_select_fp(blit, info);
1190 nvc0_blitctx_pre_blit(blit);
1191
1192 nvc0_blit_set_dst(blit, dst, info->dst.level, -1, info->dst.format);
1193 nvc0_blit_set_src(blit, src, info->src.level, -1, info->src.format,
1194 blit->filter);
1195
1196 nvc0_blitctx_prepare_state(blit);
1197
1198 nvc0_state_validate_3d(nvc0, ~0);
1199
1200 x_range = (float)info->src.box.width / (float)info->dst.box.width;
1201 y_range = (float)info->src.box.height / (float)info->dst.box.height;
1202
1203 x0 = (float)info->src.box.x - x_range * (float)info->dst.box.x;
1204 y0 = (float)info->src.box.y - y_range * (float)info->dst.box.y;
1205
1206 x1 = x0 + 32768.0f * x_range;
1207 y1 = y0 + 32768.0f * y_range;
1208
1209 x0 *= (float)(1 << nv50_miptree(src)->ms_x);
1210 x1 *= (float)(1 << nv50_miptree(src)->ms_x);
1211 y0 *= (float)(1 << nv50_miptree(src)->ms_y);
1212 y1 *= (float)(1 << nv50_miptree(src)->ms_y);
1213
1214 dz = (float)info->src.box.depth / (float)info->dst.box.depth;
1215 z = (float)info->src.box.z;
1216 if (nv50_miptree(src)->layout_3d)
1217 z += 0.5f * dz;
1218
1219 if (src->last_level > 0) {
1220 /* If there are mip maps, GPU always assumes normalized coordinates. */
1221 const unsigned l = info->src.level;
1222 const float fh = u_minify(src->width0 << nv50_miptree(src)->ms_x, l);
1223 const float fv = u_minify(src->height0 << nv50_miptree(src)->ms_y, l);
1224 x0 /= fh;
1225 x1 /= fh;
1226 y0 /= fv;
1227 y1 /= fv;
1228 if (nv50_miptree(src)->layout_3d) {
1229 z /= u_minify(src->depth0, l);
1230 dz /= u_minify(src->depth0, l);
1231 }
1232 }
1233
1234 IMMED_NVC0(push, NVC0_3D(VIEWPORT_TRANSFORM_EN), 0);
1235 IMMED_NVC0(push, NVC0_3D(VIEW_VOLUME_CLIP_CTRL), 0x2 |
1236 NVC0_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_RANGE_0_1);
1237 BEGIN_NVC0(push, NVC0_3D(VIEWPORT_HORIZ(0)), 2);
1238 PUSH_DATA (push, nvc0->framebuffer.width << 16);
1239 PUSH_DATA (push, nvc0->framebuffer.height << 16);
1240
1241 /* Draw a large triangle in screen coordinates covering the whole
1242 * render target, with scissors defining the destination region.
1243 * The vertex is supplied with non-normalized texture coordinates
1244 * arranged in a way to yield the desired offset and scale.
1245 */
1246
1247 minx = info->dst.box.x;
1248 maxx = info->dst.box.x + info->dst.box.width;
1249 miny = info->dst.box.y;
1250 maxy = info->dst.box.y + info->dst.box.height;
1251 if (info->scissor_enable) {
1252 minx = MAX2(minx, info->scissor.minx);
1253 maxx = MIN2(maxx, info->scissor.maxx);
1254 miny = MAX2(miny, info->scissor.miny);
1255 maxy = MIN2(maxy, info->scissor.maxy);
1256 }
1257 BEGIN_NVC0(push, NVC0_3D(SCISSOR_HORIZ(0)), 2);
1258 PUSH_DATA (push, (maxx << 16) | minx);
1259 PUSH_DATA (push, (maxy << 16) | miny);
1260
1261 stride = (3 + 2) * 4;
1262 length = stride * 3 * info->dst.box.depth;
1263
1264 vbuf = nouveau_scratch_get(&nvc0->base, length, &vtxbuf, &vtxbuf_bo);
1265 if (!vbuf) {
1266 assert(vbuf);
1267 return;
1268 }
1269
1270 BCTX_REFN_bo(nvc0->bufctx_3d, 3D_VTX_TMP,
1271 NOUVEAU_BO_GART | NOUVEAU_BO_RD, vtxbuf_bo);
1272 nouveau_pushbuf_validate(push);
1273
1274 BEGIN_NVC0(push, NVC0_3D(VERTEX_ARRAY_FETCH(0)), 4);
1275 PUSH_DATA (push, NVC0_3D_VERTEX_ARRAY_FETCH_ENABLE | stride <<
1276 NVC0_3D_VERTEX_ARRAY_FETCH_STRIDE__SHIFT);
1277 PUSH_DATAh(push, vtxbuf);
1278 PUSH_DATA (push, vtxbuf);
1279 PUSH_DATA (push, 0);
1280 BEGIN_NVC0(push, NVC0_3D(VERTEX_ARRAY_LIMIT_HIGH(0)), 2);
1281 PUSH_DATAh(push, vtxbuf + length - 1);
1282 PUSH_DATA (push, vtxbuf + length - 1);
1283
1284 n = MAX2(2, nvc0->state.num_vtxelts);
1285
1286 BEGIN_NVC0(push, NVC0_3D(VERTEX_ATTRIB_FORMAT(0)), n);
1287 PUSH_DATA (push, NVC0_3D_VERTEX_ATTRIB_FORMAT_TYPE_FLOAT |
1288 NVC0_3D_VERTEX_ATTRIB_FORMAT_SIZE_32_32 | 0x00 <<
1289 NVC0_3D_VERTEX_ATTRIB_FORMAT_OFFSET__SHIFT);
1290 PUSH_DATA (push, NVC0_3D_VERTEX_ATTRIB_FORMAT_TYPE_FLOAT |
1291 NVC0_3D_VERTEX_ATTRIB_FORMAT_SIZE_32_32_32 | 0x08 <<
1292 NVC0_3D_VERTEX_ATTRIB_FORMAT_OFFSET__SHIFT);
1293 for (i = 2; i < n; i++) {
1294 PUSH_DATA(push, NVC0_3D_VERTEX_ATTRIB_FORMAT_TYPE_FLOAT |
1295 NVC0_3D_VERTEX_ATTRIB_FORMAT_SIZE_32 |
1296 NVC0_3D_VERTEX_ATTRIB_FORMAT_CONST);
1297 }
1298 if (nvc0->state.instance_elts) {
1299 nvc0->state.instance_elts = 0;
1300 BEGIN_NVC0(push, NVC0_3D(MACRO_VERTEX_ARRAY_PER_INSTANCE), 2);
1301 PUSH_DATA (push, n);
1302 PUSH_DATA (push, 0);
1303 }
1304 nvc0->state.num_vtxelts = 2;
1305
1306 for (i = 0; i < info->dst.box.depth; ++i, z += dz) {
1307 if (info->dst.box.z + i) {
1308 BEGIN_NVC0(push, NVC0_3D(LAYER), 1);
1309 PUSH_DATA (push, info->dst.box.z + i);
1310 }
1311
1312 *(vbuf++) = fui(0.0f);
1313 *(vbuf++) = fui(0.0f);
1314 *(vbuf++) = fui(x0);
1315 *(vbuf++) = fui(y0);
1316 *(vbuf++) = fui(z);
1317
1318 *(vbuf++) = fui(32768 << nv50_miptree(dst)->ms_x);
1319 *(vbuf++) = fui(0.0f);
1320 *(vbuf++) = fui(x1);
1321 *(vbuf++) = fui(y0);
1322 *(vbuf++) = fui(z);
1323
1324 *(vbuf++) = fui(0.0f);
1325 *(vbuf++) = fui(32768 << nv50_miptree(dst)->ms_y);
1326 *(vbuf++) = fui(x0);
1327 *(vbuf++) = fui(y1);
1328 *(vbuf++) = fui(z);
1329
1330 IMMED_NVC0(push, NVC0_3D(VERTEX_BEGIN_GL),
1331 NVC0_3D_VERTEX_BEGIN_GL_PRIMITIVE_TRIANGLES);
1332 BEGIN_NVC0(push, NVC0_3D(VERTEX_BUFFER_FIRST), 2);
1333 PUSH_DATA (push, i * 3);
1334 PUSH_DATA (push, 3);
1335 IMMED_NVC0(push, NVC0_3D(VERTEX_END_GL), 0);
1336 }
1337 if (info->dst.box.z + info->dst.box.depth - 1)
1338 IMMED_NVC0(push, NVC0_3D(LAYER), 0);
1339
1340 nvc0_blitctx_post_blit(blit);
1341
1342 /* restore viewport transform */
1343 IMMED_NVC0(push, NVC0_3D(VIEWPORT_TRANSFORM_EN), 1);
1344 }
1345
1346 static void
1347 nvc0_blit_eng2d(struct nvc0_context *nvc0, const struct pipe_blit_info *info)
1348 {
1349 struct nouveau_pushbuf *push = nvc0->base.pushbuf;
1350 struct nv50_miptree *dst = nv50_miptree(info->dst.resource);
1351 struct nv50_miptree *src = nv50_miptree(info->src.resource);
1352 const int32_t srcx_adj = info->src.box.width < 0 ? -1 : 0;
1353 const int32_t srcy_adj = info->src.box.height < 0 ? -1 : 0;
1354 const int dz = info->dst.box.z;
1355 const int sz = info->src.box.z;
1356 uint32_t dstw, dsth;
1357 int32_t dstx, dsty;
1358 int64_t srcx, srcy;
1359 int64_t du_dx, dv_dy;
1360 int i;
1361 uint32_t mode;
1362 uint32_t mask = nv50_blit_eng2d_get_mask(info);
1363 bool b;
1364
1365 mode = nv50_blit_get_filter(info) ?
1366 NV50_2D_BLIT_CONTROL_FILTER_BILINEAR :
1367 NV50_2D_BLIT_CONTROL_FILTER_POINT_SAMPLE;
1368 mode |= (src->base.base.nr_samples > dst->base.base.nr_samples) ?
1369 NV50_2D_BLIT_CONTROL_ORIGIN_CORNER : NV50_2D_BLIT_CONTROL_ORIGIN_CENTER;
1370
1371 du_dx = ((int64_t)info->src.box.width << 32) / info->dst.box.width;
1372 dv_dy = ((int64_t)info->src.box.height << 32) / info->dst.box.height;
1373
1374 b = info->dst.format == info->src.format;
1375 nvc0_2d_texture_set(push, 1, dst, info->dst.level, dz, info->dst.format, b);
1376 nvc0_2d_texture_set(push, 0, src, info->src.level, sz, info->src.format, b);
1377
1378 if (info->scissor_enable) {
1379 BEGIN_NVC0(push, NVC0_2D(CLIP_X), 5);
1380 PUSH_DATA (push, info->scissor.minx << dst->ms_x);
1381 PUSH_DATA (push, info->scissor.miny << dst->ms_y);
1382 PUSH_DATA (push, (info->scissor.maxx - info->scissor.minx) << dst->ms_x);
1383 PUSH_DATA (push, (info->scissor.maxy - info->scissor.miny) << dst->ms_y);
1384 PUSH_DATA (push, 1); /* enable */
1385 }
1386
1387 if (nvc0->cond_query && info->render_condition_enable)
1388 IMMED_NVC0(push, NVC0_2D(COND_MODE), nvc0->cond_condmode);
1389
1390 if (mask != 0xffffffff) {
1391 IMMED_NVC0(push, NVC0_2D(ROP), 0xca); /* DPSDxax */
1392 IMMED_NVC0(push, NVC0_2D(PATTERN_COLOR_FORMAT),
1393 NV50_2D_PATTERN_COLOR_FORMAT_A8R8G8B8);
1394 BEGIN_NVC0(push, NVC0_2D(PATTERN_BITMAP_COLOR(0)), 4);
1395 PUSH_DATA (push, 0x00000000);
1396 PUSH_DATA (push, mask);
1397 PUSH_DATA (push, 0xffffffff);
1398 PUSH_DATA (push, 0xffffffff);
1399 IMMED_NVC0(push, NVC0_2D(OPERATION), NV50_2D_OPERATION_ROP);
1400 } else
1401 if (info->src.format != info->dst.format) {
1402 if (info->src.format == PIPE_FORMAT_R8_UNORM ||
1403 info->src.format == PIPE_FORMAT_R8_SNORM ||
1404 info->src.format == PIPE_FORMAT_R16_UNORM ||
1405 info->src.format == PIPE_FORMAT_R16_SNORM ||
1406 info->src.format == PIPE_FORMAT_R16_FLOAT ||
1407 info->src.format == PIPE_FORMAT_R32_FLOAT) {
1408 mask = 0xffff0000; /* also makes condition for OPERATION reset true */
1409 BEGIN_NVC0(push, NVC0_2D(BETA4), 2);
1410 PUSH_DATA (push, mask);
1411 PUSH_DATA (push, NV50_2D_OPERATION_SRCCOPY_PREMULT);
1412 } else
1413 if (info->src.format == PIPE_FORMAT_A8_UNORM) {
1414 mask = 0xff000000;
1415 BEGIN_NVC0(push, NVC0_2D(BETA4), 2);
1416 PUSH_DATA (push, mask);
1417 PUSH_DATA (push, NV50_2D_OPERATION_SRCCOPY_PREMULT);
1418 }
1419 }
1420
1421 if (src->ms_x > dst->ms_x || src->ms_y > dst->ms_y) {
1422 /* ms_x is always >= ms_y */
1423 du_dx <<= src->ms_x - dst->ms_x;
1424 dv_dy <<= src->ms_y - dst->ms_y;
1425 } else {
1426 du_dx >>= dst->ms_x - src->ms_x;
1427 dv_dy >>= dst->ms_y - src->ms_y;
1428 }
1429
1430 srcx = (int64_t)(info->src.box.x + srcx_adj) << (src->ms_x + 32);
1431 srcy = (int64_t)(info->src.box.y + srcy_adj) << (src->ms_y + 32);
1432
1433 if (src->base.base.nr_samples > dst->base.base.nr_samples) {
1434 /* center src coorinates for proper MS resolve filtering */
1435 srcx += (int64_t)1 << (src->ms_x + 31);
1436 srcy += (int64_t)1 << (src->ms_y + 31);
1437 }
1438
1439 dstx = info->dst.box.x << dst->ms_x;
1440 dsty = info->dst.box.y << dst->ms_y;
1441
1442 dstw = info->dst.box.width << dst->ms_x;
1443 dsth = info->dst.box.height << dst->ms_y;
1444
1445 if (dstx < 0) {
1446 dstw += dstx;
1447 srcx -= du_dx * dstx;
1448 dstx = 0;
1449 }
1450 if (dsty < 0) {
1451 dsth += dsty;
1452 srcy -= dv_dy * dsty;
1453 dsty = 0;
1454 }
1455
1456 IMMED_NVC0(push, NVC0_2D(BLIT_CONTROL), mode);
1457 BEGIN_NVC0(push, NVC0_2D(BLIT_DST_X), 4);
1458 PUSH_DATA (push, dstx);
1459 PUSH_DATA (push, dsty);
1460 PUSH_DATA (push, dstw);
1461 PUSH_DATA (push, dsth);
1462 BEGIN_NVC0(push, NVC0_2D(BLIT_DU_DX_FRACT), 4);
1463 PUSH_DATA (push, du_dx);
1464 PUSH_DATA (push, du_dx >> 32);
1465 PUSH_DATA (push, dv_dy);
1466 PUSH_DATA (push, dv_dy >> 32);
1467
1468 BCTX_REFN(nvc0->bufctx, 2D, &dst->base, WR);
1469 BCTX_REFN(nvc0->bufctx, 2D, &src->base, RD);
1470 nouveau_pushbuf_bufctx(nvc0->base.pushbuf, nvc0->bufctx);
1471 if (nouveau_pushbuf_validate(nvc0->base.pushbuf))
1472 return;
1473
1474 for (i = 0; i < info->dst.box.depth; ++i) {
1475 if (i > 0) {
1476 /* no scaling in z-direction possible for eng2d blits */
1477 if (dst->layout_3d) {
1478 BEGIN_NVC0(push, NVC0_2D(DST_LAYER), 1);
1479 PUSH_DATA (push, info->dst.box.z + i);
1480 } else {
1481 const unsigned z = info->dst.box.z + i;
1482 const uint64_t address = dst->base.address +
1483 dst->level[info->dst.level].offset +
1484 z * dst->layer_stride;
1485 BEGIN_NVC0(push, NVC0_2D(DST_ADDRESS_HIGH), 2);
1486 PUSH_DATAh(push, address);
1487 PUSH_DATA (push, address);
1488 }
1489 if (src->layout_3d) {
1490 /* not possible because of depth tiling */
1491 assert(0);
1492 } else {
1493 const unsigned z = info->src.box.z + i;
1494 const uint64_t address = src->base.address +
1495 src->level[info->src.level].offset +
1496 z * src->layer_stride;
1497 BEGIN_NVC0(push, NVC0_2D(SRC_ADDRESS_HIGH), 2);
1498 PUSH_DATAh(push, address);
1499 PUSH_DATA (push, address);
1500 }
1501 BEGIN_NVC0(push, NVC0_2D(BLIT_SRC_Y_INT), 1); /* trigger */
1502 PUSH_DATA (push, srcy >> 32);
1503 } else {
1504 BEGIN_NVC0(push, NVC0_2D(BLIT_SRC_X_FRACT), 4);
1505 PUSH_DATA (push, srcx);
1506 PUSH_DATA (push, srcx >> 32);
1507 PUSH_DATA (push, srcy);
1508 PUSH_DATA (push, srcy >> 32);
1509 }
1510 }
1511 nvc0_resource_validate(&dst->base, NOUVEAU_BO_WR);
1512 nvc0_resource_validate(&src->base, NOUVEAU_BO_RD);
1513
1514 nouveau_bufctx_reset(nvc0->bufctx, NVC0_BIND_2D);
1515
1516 if (info->scissor_enable)
1517 IMMED_NVC0(push, NVC0_2D(CLIP_ENABLE), 0);
1518 if (mask != 0xffffffff)
1519 IMMED_NVC0(push, NVC0_2D(OPERATION), NV50_2D_OPERATION_SRCCOPY);
1520 if (nvc0->cond_query && info->render_condition_enable)
1521 IMMED_NVC0(push, NVC0_2D(COND_MODE), NV50_2D_COND_MODE_ALWAYS);
1522 }
1523
1524 static void
1525 nvc0_blit(struct pipe_context *pipe, const struct pipe_blit_info *info)
1526 {
1527 struct nvc0_context *nvc0 = nvc0_context(pipe);
1528 struct nouveau_pushbuf *push = nvc0->base.pushbuf;
1529 bool eng3d = false;
1530
1531 if (util_format_is_depth_or_stencil(info->dst.resource->format)) {
1532 if (!(info->mask & PIPE_MASK_ZS))
1533 return;
1534 if (info->dst.resource->format == PIPE_FORMAT_Z32_FLOAT ||
1535 info->dst.resource->format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT)
1536 eng3d = true;
1537 if (info->filter != PIPE_TEX_FILTER_NEAREST)
1538 eng3d = true;
1539 } else {
1540 if (!(info->mask & PIPE_MASK_RGBA))
1541 return;
1542 if (info->mask != PIPE_MASK_RGBA)
1543 eng3d = true;
1544 }
1545
1546 if (nv50_miptree(info->src.resource)->layout_3d) {
1547 eng3d = true;
1548 } else
1549 if (info->src.box.depth != info->dst.box.depth) {
1550 eng3d = true;
1551 debug_printf("blit: cannot filter array or cube textures in z direction");
1552 }
1553
1554 if (!eng3d && info->dst.format != info->src.format) {
1555 if (!nv50_2d_dst_format_faithful(info->dst.format)) {
1556 eng3d = true;
1557 } else
1558 if (!nv50_2d_src_format_faithful(info->src.format)) {
1559 if (!util_format_is_luminance(info->src.format)) {
1560 if (!nv50_2d_dst_format_ops_supported(info->dst.format))
1561 eng3d = true;
1562 else
1563 if (util_format_is_intensity(info->src.format))
1564 eng3d = info->src.format != PIPE_FORMAT_I8_UNORM;
1565 else
1566 if (util_format_is_alpha(info->src.format))
1567 eng3d = info->src.format != PIPE_FORMAT_A8_UNORM;
1568 else
1569 eng3d = !nv50_2d_format_supported(info->src.format);
1570 }
1571 } else
1572 if (util_format_is_luminance_alpha(info->src.format))
1573 eng3d = true;
1574 }
1575
1576 if (info->src.resource->nr_samples == 8 &&
1577 info->dst.resource->nr_samples <= 1)
1578 eng3d = true;
1579 #if 0
1580 /* FIXME: can't make this work with eng2d anymore, at least not on nv50 */
1581 if (info->src.resource->nr_samples > 1 ||
1582 info->dst.resource->nr_samples > 1)
1583 eng3d = true;
1584 #endif
1585 /* FIXME: find correct src coordinates adjustments */
1586 if ((info->src.box.width != info->dst.box.width &&
1587 info->src.box.width != -info->dst.box.width) ||
1588 (info->src.box.height != info->dst.box.height &&
1589 info->src.box.height != -info->dst.box.height))
1590 eng3d = true;
1591
1592 if (nvc0->screen->num_occlusion_queries_active)
1593 IMMED_NVC0(push, NVC0_3D(SAMPLECNT_ENABLE), 0);
1594
1595 if (!eng3d)
1596 nvc0_blit_eng2d(nvc0, info);
1597 else
1598 nvc0_blit_3d(nvc0, info);
1599
1600 if (nvc0->screen->num_occlusion_queries_active)
1601 IMMED_NVC0(push, NVC0_3D(SAMPLECNT_ENABLE), 1);
1602
1603 NOUVEAU_DRV_STAT(&nvc0->screen->base, tex_blit_count, 1);
1604 }
1605
1606 static void
1607 nvc0_flush_resource(struct pipe_context *ctx,
1608 struct pipe_resource *resource)
1609 {
1610 }
1611
1612 bool
1613 nvc0_blitter_create(struct nvc0_screen *screen)
1614 {
1615 screen->blitter = CALLOC_STRUCT(nvc0_blitter);
1616 if (!screen->blitter) {
1617 NOUVEAU_ERR("failed to allocate blitter struct\n");
1618 return false;
1619 }
1620 screen->blitter->screen = screen;
1621
1622 pipe_mutex_init(screen->blitter->mutex);
1623
1624 nvc0_blitter_make_vp(screen->blitter);
1625 nvc0_blitter_make_sampler(screen->blitter);
1626
1627 return true;
1628 }
1629
1630 void
1631 nvc0_blitter_destroy(struct nvc0_screen *screen)
1632 {
1633 struct nvc0_blitter *blitter = screen->blitter;
1634 unsigned i, m;
1635
1636 for (i = 0; i < NV50_BLIT_MAX_TEXTURE_TYPES; ++i) {
1637 for (m = 0; m < NV50_BLIT_MODES; ++m) {
1638 struct nvc0_program *prog = blitter->fp[i][m];
1639 if (prog) {
1640 nvc0_program_destroy(NULL, prog);
1641 FREE((void *)prog->pipe.tokens);
1642 FREE(prog);
1643 }
1644 }
1645 }
1646
1647 pipe_mutex_destroy(blitter->mutex);
1648 FREE(blitter);
1649 }
1650
1651 bool
1652 nvc0_blitctx_create(struct nvc0_context *nvc0)
1653 {
1654 nvc0->blit = CALLOC_STRUCT(nvc0_blitctx);
1655 if (!nvc0->blit) {
1656 NOUVEAU_ERR("failed to allocate blit context\n");
1657 return false;
1658 }
1659
1660 nvc0->blit->nvc0 = nvc0;
1661
1662 nvc0->blit->rast.pipe.half_pixel_center = 1;
1663
1664 return true;
1665 }
1666
1667 void
1668 nvc0_blitctx_destroy(struct nvc0_context *nvc0)
1669 {
1670 FREE(nvc0->blit);
1671 }
1672
1673 void
1674 nvc0_init_surface_functions(struct nvc0_context *nvc0)
1675 {
1676 struct pipe_context *pipe = &nvc0->base.pipe;
1677
1678 pipe->resource_copy_region = nvc0_resource_copy_region;
1679 pipe->blit = nvc0_blit;
1680 pipe->flush_resource = nvc0_flush_resource;
1681 pipe->clear_render_target = nvc0_clear_render_target;
1682 pipe->clear_depth_stencil = nvc0_clear_depth_stencil;
1683 pipe->clear_texture = nv50_clear_texture;
1684 pipe->clear_buffer = nvc0_clear_buffer;
1685 }