2 * Copyright 2008 Ben Skeggs
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
25 #include "pipe/p_defines.h"
27 #include "util/u_inlines.h"
28 #include "util/u_pack_color.h"
29 #include "util/u_format.h"
30 #include "util/u_surface.h"
32 #include "os/os_thread.h"
34 #include "nvc0/nvc0_context.h"
35 #include "nvc0/nvc0_resource.h"
37 #include "nv50/nv50_defs.xml.h"
38 #include "nv50/nv50_texture.xml.h"
40 /* these are used in nv50_blit.h */
41 #define NV50_ENG2D_SUPPORTED_FORMATS 0xff9ccfe1cce3ccc9ULL
42 #define NV50_ENG2D_NOCONVERT_FORMATS 0x009cc02000000000ULL
43 #define NV50_ENG2D_LUMINANCE_FORMATS 0x001cc02000000000ULL
44 #define NV50_ENG2D_INTENSITY_FORMATS 0x0080000000000000ULL
45 #define NV50_ENG2D_OPERATION_FORMATS 0x060001c000638000ULL
47 #define NOUVEAU_DRIVER 0xc0
48 #include "nv50/nv50_blit.h"
51 nvc0_2d_format(enum pipe_format format
, boolean dst
, boolean dst_src_equal
)
53 uint8_t id
= nvc0_format_table
[format
].rt
;
55 /* A8_UNORM is treated as I8_UNORM as far as the 2D engine is concerned. */
56 if (!dst
&& unlikely(format
== PIPE_FORMAT_I8_UNORM
) && !dst_src_equal
)
57 return NV50_SURFACE_FORMAT_A8_UNORM
;
59 /* Hardware values for color formats range from 0xc0 to 0xff,
60 * but the 2D engine doesn't support all of them.
62 if (nv50_2d_format_supported(format
))
64 assert(dst_src_equal
);
66 switch (util_format_get_blocksize(format
)) {
68 return NV50_SURFACE_FORMAT_R8_UNORM
;
70 return NV50_SURFACE_FORMAT_R16_UNORM
;
72 return NV50_SURFACE_FORMAT_BGRA8_UNORM
;
74 return NV50_SURFACE_FORMAT_RGBA16_UNORM
;
76 return NV50_SURFACE_FORMAT_RGBA32_FLOAT
;
84 nvc0_2d_texture_set(struct nouveau_pushbuf
*push
, boolean dst
,
85 struct nv50_miptree
*mt
, unsigned level
, unsigned layer
,
86 enum pipe_format pformat
, boolean dst_src_pformat_equal
)
88 struct nouveau_bo
*bo
= mt
->base
.bo
;
89 uint32_t width
, height
, depth
;
91 uint32_t mthd
= dst
? NVC0_2D_DST_FORMAT
: NVC0_2D_SRC_FORMAT
;
92 uint32_t offset
= mt
->level
[level
].offset
;
94 format
= nvc0_2d_format(pformat
, dst
, dst_src_pformat_equal
);
96 NOUVEAU_ERR("invalid/unsupported surface format: %s\n",
97 util_format_name(pformat
));
101 width
= u_minify(mt
->base
.base
.width0
, level
) << mt
->ms_x
;
102 height
= u_minify(mt
->base
.base
.height0
, level
) << mt
->ms_y
;
103 depth
= u_minify(mt
->base
.base
.depth0
, level
);
105 /* layer has to be < depth, and depth > tile depth / 2 */
107 if (!mt
->layout_3d
) {
108 offset
+= mt
->layer_stride
* layer
;
113 offset
+= nvc0_mt_zslice_offset(mt
, level
, layer
);
117 if (!nouveau_bo_memtype(bo
)) {
118 BEGIN_NVC0(push
, SUBC_2D(mthd
), 2);
119 PUSH_DATA (push
, format
);
121 BEGIN_NVC0(push
, SUBC_2D(mthd
+ 0x14), 5);
122 PUSH_DATA (push
, mt
->level
[level
].pitch
);
123 PUSH_DATA (push
, width
);
124 PUSH_DATA (push
, height
);
125 PUSH_DATAh(push
, bo
->offset
+ offset
);
126 PUSH_DATA (push
, bo
->offset
+ offset
);
128 BEGIN_NVC0(push
, SUBC_2D(mthd
), 5);
129 PUSH_DATA (push
, format
);
131 PUSH_DATA (push
, mt
->level
[level
].tile_mode
);
132 PUSH_DATA (push
, depth
);
133 PUSH_DATA (push
, layer
);
134 BEGIN_NVC0(push
, SUBC_2D(mthd
+ 0x18), 4);
135 PUSH_DATA (push
, width
);
136 PUSH_DATA (push
, height
);
137 PUSH_DATAh(push
, bo
->offset
+ offset
);
138 PUSH_DATA (push
, bo
->offset
+ offset
);
143 BEGIN_NVC0(push
, SUBC_2D(NVC0_2D_CLIP_X
), 4);
146 PUSH_DATA (push
, width
);
147 PUSH_DATA (push
, height
);
154 nvc0_2d_texture_do_copy(struct nouveau_pushbuf
*push
,
155 struct nv50_miptree
*dst
, unsigned dst_level
,
156 unsigned dx
, unsigned dy
, unsigned dz
,
157 struct nv50_miptree
*src
, unsigned src_level
,
158 unsigned sx
, unsigned sy
, unsigned sz
,
159 unsigned w
, unsigned h
)
161 const enum pipe_format dfmt
= dst
->base
.base
.format
;
162 const enum pipe_format sfmt
= src
->base
.base
.format
;
164 boolean eqfmt
= dfmt
== sfmt
;
166 if (!PUSH_SPACE(push
, 2 * 16 + 32))
169 ret
= nvc0_2d_texture_set(push
, TRUE
, dst
, dst_level
, dz
, dfmt
, eqfmt
);
173 ret
= nvc0_2d_texture_set(push
, FALSE
, src
, src_level
, sz
, sfmt
, eqfmt
);
177 IMMED_NVC0(push
, NVC0_2D(BLIT_CONTROL
), 0x00);
178 BEGIN_NVC0(push
, NVC0_2D(BLIT_DST_X
), 4);
179 PUSH_DATA (push
, dx
<< dst
->ms_x
);
180 PUSH_DATA (push
, dy
<< dst
->ms_y
);
181 PUSH_DATA (push
, w
<< dst
->ms_x
);
182 PUSH_DATA (push
, h
<< dst
->ms_y
);
183 BEGIN_NVC0(push
, NVC0_2D(BLIT_DU_DX_FRACT
), 4);
188 BEGIN_NVC0(push
, NVC0_2D(BLIT_SRC_X_FRACT
), 4);
190 PUSH_DATA (push
, sx
<< src
->ms_x
);
192 PUSH_DATA (push
, sy
<< src
->ms_x
);
198 nvc0_resource_copy_region(struct pipe_context
*pipe
,
199 struct pipe_resource
*dst
, unsigned dst_level
,
200 unsigned dstx
, unsigned dsty
, unsigned dstz
,
201 struct pipe_resource
*src
, unsigned src_level
,
202 const struct pipe_box
*src_box
)
204 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
207 unsigned dst_layer
= dstz
, src_layer
= src_box
->z
;
209 if (dst
->target
== PIPE_BUFFER
&& src
->target
== PIPE_BUFFER
) {
210 nouveau_copy_buffer(&nvc0
->base
,
211 nv04_resource(dst
), dstx
,
212 nv04_resource(src
), src_box
->x
, src_box
->width
);
213 NOUVEAU_DRV_STAT(&nvc0
->screen
->base
, buf_copy_bytes
, src_box
->width
);
216 NOUVEAU_DRV_STAT(&nvc0
->screen
->base
, tex_copy_count
, 1);
218 /* 0 and 1 are equal, only supporting 0/1, 2, 4 and 8 */
219 assert((src
->nr_samples
| 1) == (dst
->nr_samples
| 1));
221 m2mf
= (src
->format
== dst
->format
) ||
222 (util_format_get_blocksizebits(src
->format
) ==
223 util_format_get_blocksizebits(dst
->format
));
225 nv04_resource(dst
)->status
|= NOUVEAU_BUFFER_STATUS_GPU_WRITING
;
228 struct nv50_m2mf_rect drect
, srect
;
230 unsigned nx
= util_format_get_nblocksx(src
->format
, src_box
->width
);
231 unsigned ny
= util_format_get_nblocksy(src
->format
, src_box
->height
);
233 nv50_m2mf_rect_setup(&drect
, dst
, dst_level
, dstx
, dsty
, dstz
);
234 nv50_m2mf_rect_setup(&srect
, src
, src_level
,
235 src_box
->x
, src_box
->y
, src_box
->z
);
237 for (i
= 0; i
< src_box
->depth
; ++i
) {
238 nvc0
->m2mf_copy_rect(nvc0
, &drect
, &srect
, nx
, ny
);
240 if (nv50_miptree(dst
)->layout_3d
)
243 drect
.base
+= nv50_miptree(dst
)->layer_stride
;
245 if (nv50_miptree(src
)->layout_3d
)
248 srect
.base
+= nv50_miptree(src
)->layer_stride
;
253 assert(nv50_2d_dst_format_faithful(dst
->format
));
254 assert(nv50_2d_src_format_faithful(src
->format
));
256 BCTX_REFN(nvc0
->bufctx
, 2D
, nv04_resource(src
), RD
);
257 BCTX_REFN(nvc0
->bufctx
, 2D
, nv04_resource(dst
), WR
);
258 nouveau_pushbuf_bufctx(nvc0
->base
.pushbuf
, nvc0
->bufctx
);
259 nouveau_pushbuf_validate(nvc0
->base
.pushbuf
);
261 for (; dst_layer
< dstz
+ src_box
->depth
; ++dst_layer
, ++src_layer
) {
262 ret
= nvc0_2d_texture_do_copy(nvc0
->base
.pushbuf
,
263 nv50_miptree(dst
), dst_level
,
264 dstx
, dsty
, dst_layer
,
265 nv50_miptree(src
), src_level
,
266 src_box
->x
, src_box
->y
, src_layer
,
267 src_box
->width
, src_box
->height
);
271 nouveau_bufctx_reset(nvc0
->bufctx
, 0);
275 nvc0_clear_render_target(struct pipe_context
*pipe
,
276 struct pipe_surface
*dst
,
277 const union pipe_color_union
*color
,
278 unsigned dstx
, unsigned dsty
,
279 unsigned width
, unsigned height
)
281 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
282 struct nouveau_pushbuf
*push
= nvc0
->base
.pushbuf
;
283 struct nv50_surface
*sf
= nv50_surface(dst
);
284 struct nv04_resource
*res
= nv04_resource(sf
->base
.texture
);
287 if (!PUSH_SPACE(push
, 32 + sf
->depth
))
290 PUSH_REFN (push
, res
->bo
, res
->domain
| NOUVEAU_BO_WR
);
292 BEGIN_NVC0(push
, NVC0_3D(CLEAR_COLOR(0)), 4);
293 PUSH_DATAf(push
, color
->f
[0]);
294 PUSH_DATAf(push
, color
->f
[1]);
295 PUSH_DATAf(push
, color
->f
[2]);
296 PUSH_DATAf(push
, color
->f
[3]);
298 BEGIN_NVC0(push
, NVC0_3D(SCREEN_SCISSOR_HORIZ
), 2);
299 PUSH_DATA (push
, ( width
<< 16) | dstx
);
300 PUSH_DATA (push
, (height
<< 16) | dsty
);
302 BEGIN_NVC0(push
, NVC0_3D(RT_CONTROL
), 1);
304 BEGIN_NVC0(push
, NVC0_3D(RT_ADDRESS_HIGH(0)), 9);
305 PUSH_DATAh(push
, res
->address
+ sf
->offset
);
306 PUSH_DATA (push
, res
->address
+ sf
->offset
);
307 if (likely(nouveau_bo_memtype(res
->bo
))) {
308 struct nv50_miptree
*mt
= nv50_miptree(dst
->texture
);
310 PUSH_DATA(push
, sf
->width
);
311 PUSH_DATA(push
, sf
->height
);
312 PUSH_DATA(push
, nvc0_format_table
[dst
->format
].rt
);
313 PUSH_DATA(push
, (mt
->layout_3d
<< 16) |
314 mt
->level
[sf
->base
.u
.tex
.level
].tile_mode
);
315 PUSH_DATA(push
, dst
->u
.tex
.first_layer
+ sf
->depth
);
316 PUSH_DATA(push
, mt
->layer_stride
>> 2);
317 PUSH_DATA(push
, dst
->u
.tex
.first_layer
);
319 if (res
->base
.target
== PIPE_BUFFER
) {
320 PUSH_DATA(push
, 262144);
323 PUSH_DATA(push
, nv50_miptree(&res
->base
)->level
[0].pitch
);
324 PUSH_DATA(push
, sf
->height
);
326 PUSH_DATA(push
, nvc0_format_table
[sf
->base
.format
].rt
);
327 PUSH_DATA(push
, 1 << 12);
332 IMMED_NVC0(push
, NVC0_3D(ZETA_ENABLE
), 0);
334 /* tiled textures don't have to be fenced, they're not mapped directly */
335 nvc0_resource_fence(res
, NOUVEAU_BO_WR
);
338 BEGIN_NIC0(push
, NVC0_3D(CLEAR_BUFFERS
), sf
->depth
);
339 for (z
= 0; z
< sf
->depth
; ++z
) {
340 PUSH_DATA (push
, 0x3c |
341 (z
<< NVC0_3D_CLEAR_BUFFERS_LAYER__SHIFT
));
344 nvc0
->dirty
|= NVC0_NEW_FRAMEBUFFER
;
348 nvc0_clear_depth_stencil(struct pipe_context
*pipe
,
349 struct pipe_surface
*dst
,
350 unsigned clear_flags
,
353 unsigned dstx
, unsigned dsty
,
354 unsigned width
, unsigned height
)
356 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
357 struct nouveau_pushbuf
*push
= nvc0
->base
.pushbuf
;
358 struct nv50_miptree
*mt
= nv50_miptree(dst
->texture
);
359 struct nv50_surface
*sf
= nv50_surface(dst
);
361 int unk
= mt
->base
.base
.target
== PIPE_TEXTURE_2D
;
364 if (!PUSH_SPACE(push
, 32 + sf
->depth
))
367 PUSH_REFN (push
, mt
->base
.bo
, mt
->base
.domain
| NOUVEAU_BO_WR
);
369 if (clear_flags
& PIPE_CLEAR_DEPTH
) {
370 BEGIN_NVC0(push
, NVC0_3D(CLEAR_DEPTH
), 1);
371 PUSH_DATAf(push
, depth
);
372 mode
|= NVC0_3D_CLEAR_BUFFERS_Z
;
375 if (clear_flags
& PIPE_CLEAR_STENCIL
) {
376 BEGIN_NVC0(push
, NVC0_3D(CLEAR_STENCIL
), 1);
377 PUSH_DATA (push
, stencil
& 0xff);
378 mode
|= NVC0_3D_CLEAR_BUFFERS_S
;
381 BEGIN_NVC0(push
, NVC0_3D(SCREEN_SCISSOR_HORIZ
), 2);
382 PUSH_DATA (push
, ( width
<< 16) | dstx
);
383 PUSH_DATA (push
, (height
<< 16) | dsty
);
385 BEGIN_NVC0(push
, NVC0_3D(ZETA_ADDRESS_HIGH
), 5);
386 PUSH_DATAh(push
, mt
->base
.address
+ sf
->offset
);
387 PUSH_DATA (push
, mt
->base
.address
+ sf
->offset
);
388 PUSH_DATA (push
, nvc0_format_table
[dst
->format
].rt
);
389 PUSH_DATA (push
, mt
->level
[sf
->base
.u
.tex
.level
].tile_mode
);
390 PUSH_DATA (push
, mt
->layer_stride
>> 2);
391 BEGIN_NVC0(push
, NVC0_3D(ZETA_ENABLE
), 1);
393 BEGIN_NVC0(push
, NVC0_3D(ZETA_HORIZ
), 3);
394 PUSH_DATA (push
, sf
->width
);
395 PUSH_DATA (push
, sf
->height
);
396 PUSH_DATA (push
, (unk
<< 16) | (dst
->u
.tex
.first_layer
+ sf
->depth
));
397 BEGIN_NVC0(push
, NVC0_3D(ZETA_BASE_LAYER
), 1);
398 PUSH_DATA (push
, dst
->u
.tex
.first_layer
);
400 BEGIN_NIC0(push
, NVC0_3D(CLEAR_BUFFERS
), sf
->depth
);
401 for (z
= 0; z
< sf
->depth
; ++z
) {
402 PUSH_DATA (push
, mode
|
403 (z
<< NVC0_3D_CLEAR_BUFFERS_LAYER__SHIFT
));
406 nvc0
->dirty
|= NVC0_NEW_FRAMEBUFFER
;
410 nvc0_clear(struct pipe_context
*pipe
, unsigned buffers
,
411 const union pipe_color_union
*color
,
412 double depth
, unsigned stencil
)
414 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
415 struct nouveau_pushbuf
*push
= nvc0
->base
.pushbuf
;
416 struct pipe_framebuffer_state
*fb
= &nvc0
->framebuffer
;
420 /* don't need NEW_BLEND, COLOR_MASK doesn't affect CLEAR_BUFFERS */
421 if (!nvc0_state_validate(nvc0
, NVC0_NEW_FRAMEBUFFER
, 9 + (fb
->nr_cbufs
* 2)))
424 if (buffers
& PIPE_CLEAR_COLOR
&& fb
->nr_cbufs
) {
425 BEGIN_NVC0(push
, NVC0_3D(CLEAR_COLOR(0)), 4);
426 PUSH_DATAf(push
, color
->f
[0]);
427 PUSH_DATAf(push
, color
->f
[1]);
428 PUSH_DATAf(push
, color
->f
[2]);
429 PUSH_DATAf(push
, color
->f
[3]);
430 if (buffers
& PIPE_CLEAR_COLOR0
)
432 NVC0_3D_CLEAR_BUFFERS_R
| NVC0_3D_CLEAR_BUFFERS_G
|
433 NVC0_3D_CLEAR_BUFFERS_B
| NVC0_3D_CLEAR_BUFFERS_A
;
436 if (buffers
& PIPE_CLEAR_DEPTH
) {
437 BEGIN_NVC0(push
, NVC0_3D(CLEAR_DEPTH
), 1);
438 PUSH_DATA (push
, fui(depth
));
439 mode
|= NVC0_3D_CLEAR_BUFFERS_Z
;
442 if (buffers
& PIPE_CLEAR_STENCIL
) {
443 BEGIN_NVC0(push
, NVC0_3D(CLEAR_STENCIL
), 1);
444 PUSH_DATA (push
, stencil
& 0xff);
445 mode
|= NVC0_3D_CLEAR_BUFFERS_S
;
449 int zs_layers
= 0, color0_layers
= 0;
450 if (fb
->cbufs
[0] && (mode
& 0x3c))
451 color0_layers
= fb
->cbufs
[0]->u
.tex
.last_layer
-
452 fb
->cbufs
[0]->u
.tex
.first_layer
+ 1;
453 if (fb
->zsbuf
&& (mode
& ~0x3c))
454 zs_layers
= fb
->zsbuf
->u
.tex
.last_layer
-
455 fb
->zsbuf
->u
.tex
.first_layer
+ 1;
457 for (j
= 0; j
< MIN2(zs_layers
, color0_layers
); j
++) {
458 BEGIN_NVC0(push
, NVC0_3D(CLEAR_BUFFERS
), 1);
459 PUSH_DATA(push
, mode
| (j
<< NVC0_3D_CLEAR_BUFFERS_LAYER__SHIFT
));
461 for (k
= j
; k
< zs_layers
; k
++) {
462 BEGIN_NVC0(push
, NVC0_3D(CLEAR_BUFFERS
), 1);
463 PUSH_DATA(push
, (mode
& ~0x3c) | (k
<< NVC0_3D_CLEAR_BUFFERS_LAYER__SHIFT
));
465 for (k
= j
; k
< color0_layers
; k
++) {
466 BEGIN_NVC0(push
, NVC0_3D(CLEAR_BUFFERS
), 1);
467 PUSH_DATA(push
, (mode
& 0x3c) | (k
<< NVC0_3D_CLEAR_BUFFERS_LAYER__SHIFT
));
471 for (i
= 1; i
< fb
->nr_cbufs
; i
++) {
472 struct pipe_surface
*sf
= fb
->cbufs
[i
];
473 if (!sf
|| !(buffers
& (PIPE_CLEAR_COLOR0
<< i
)))
475 for (j
= 0; j
<= sf
->u
.tex
.last_layer
- sf
->u
.tex
.first_layer
; j
++) {
476 BEGIN_NVC0(push
, NVC0_3D(CLEAR_BUFFERS
), 1);
477 PUSH_DATA (push
, (i
<< 6) | 0x3c |
478 (j
<< NVC0_3D_CLEAR_BUFFERS_LAYER__SHIFT
));
484 /* =============================== BLIT CODE ===================================
489 struct nvc0_program
*fp
[NV50_BLIT_MAX_TEXTURE_TYPES
][NV50_BLIT_MODES
];
490 struct nvc0_program vp
;
492 struct nv50_tsc_entry sampler
[2]; /* nearest, bilinear */
496 struct nvc0_screen
*screen
;
501 struct nvc0_context
*nvc0
;
502 struct nvc0_program
*fp
;
506 enum pipe_texture_target target
;
508 struct pipe_framebuffer_state fb
;
509 struct nvc0_rasterizer_stateobj
*rast
;
510 struct nvc0_program
*vp
;
511 struct nvc0_program
*tcp
;
512 struct nvc0_program
*tep
;
513 struct nvc0_program
*gp
;
514 struct nvc0_program
*fp
;
515 unsigned num_textures
[5];
516 unsigned num_samplers
[5];
517 struct pipe_sampler_view
*texture
[2];
518 struct nv50_tsc_entry
*sampler
[2];
521 struct nvc0_rasterizer_stateobj rast
;
525 nvc0_blitter_make_vp(struct nvc0_blitter
*blit
)
527 static const uint32_t code_nvc0
[] =
529 0xfff11c26, 0x06000080, /* vfetch b64 $r4:$r5 a[0x80] */
530 0xfff01c46, 0x06000090, /* vfetch b96 $r0:$r1:$r2 a[0x90] */
531 0x13f01c26, 0x0a7e0070, /* export b64 o[0x70] $r4:$r5 */
532 0x03f01c46, 0x0a7e0080, /* export b96 o[0x80] $r0:$r1:$r2 */
533 0x00001de7, 0x80000000, /* exit */
535 static const uint32_t code_nve4
[] =
537 0x00000007, 0x20000000, /* sched */
538 0xfff11c26, 0x06000080, /* vfetch b64 $r4:$r5 a[0x80] */
539 0xfff01c46, 0x06000090, /* vfetch b96 $r0:$r1:$r2 a[0x90] */
540 0x13f01c26, 0x0a7e0070, /* export b64 o[0x70] $r4:$r5 */
541 0x03f01c46, 0x0a7e0080, /* export b96 o[0x80] $r0:$r1:$r2 */
542 0x00001de7, 0x80000000, /* exit */
545 blit
->vp
.type
= PIPE_SHADER_VERTEX
;
546 blit
->vp
.translated
= TRUE
;
547 if (blit
->screen
->base
.class_3d
>= NVE4_3D_CLASS
) {
548 blit
->vp
.code
= (uint32_t *)code_nve4
; /* const_cast */
549 blit
->vp
.code_size
= sizeof(code_nve4
);
551 blit
->vp
.code
= (uint32_t *)code_nvc0
; /* const_cast */
552 blit
->vp
.code_size
= sizeof(code_nvc0
);
554 blit
->vp
.num_gprs
= 6;
555 blit
->vp
.vp
.edgeflag
= PIPE_MAX_ATTRIBS
;
557 blit
->vp
.hdr
[0] = 0x00020461; /* vertprog magic */
558 blit
->vp
.hdr
[4] = 0x000ff000; /* no outputs read */
559 blit
->vp
.hdr
[6] = 0x00000073; /* a[0x80].xy, a[0x90].xyz */
560 blit
->vp
.hdr
[13] = 0x00073000; /* o[0x70].xy, o[0x80].xyz */
564 nvc0_blitter_make_sampler(struct nvc0_blitter
*blit
)
566 /* clamp to edge, min/max lod = 0, nearest filtering */
568 blit
->sampler
[0].id
= -1;
570 blit
->sampler
[0].tsc
[0] = NV50_TSC_0_SRGB_CONVERSION_ALLOWED
|
571 (NV50_TSC_WRAP_CLAMP_TO_EDGE
<< NV50_TSC_0_WRAPS__SHIFT
) |
572 (NV50_TSC_WRAP_CLAMP_TO_EDGE
<< NV50_TSC_0_WRAPT__SHIFT
) |
573 (NV50_TSC_WRAP_CLAMP_TO_EDGE
<< NV50_TSC_0_WRAPR__SHIFT
);
574 blit
->sampler
[0].tsc
[1] =
575 NV50_TSC_1_MAGF_NEAREST
| NV50_TSC_1_MINF_NEAREST
| NV50_TSC_1_MIPF_NONE
;
577 /* clamp to edge, min/max lod = 0, bilinear filtering */
579 blit
->sampler
[1].id
= -1;
581 blit
->sampler
[1].tsc
[0] = blit
->sampler
[0].tsc
[0];
582 blit
->sampler
[1].tsc
[1] =
583 NV50_TSC_1_MAGF_LINEAR
| NV50_TSC_1_MINF_LINEAR
| NV50_TSC_1_MIPF_NONE
;
587 nvc0_blit_select_fp(struct nvc0_blitctx
*ctx
, const struct pipe_blit_info
*info
)
589 struct nvc0_blitter
*blitter
= ctx
->nvc0
->screen
->blitter
;
591 const enum pipe_texture_target ptarg
=
592 nv50_blit_reinterpret_pipe_texture_target(info
->src
.resource
->target
);
594 const unsigned targ
= nv50_blit_texture_type(ptarg
);
595 const unsigned mode
= ctx
->mode
;
597 if (!blitter
->fp
[targ
][mode
]) {
598 pipe_mutex_lock(blitter
->mutex
);
599 if (!blitter
->fp
[targ
][mode
])
600 blitter
->fp
[targ
][mode
] =
601 nv50_blitter_make_fp(&ctx
->nvc0
->base
.pipe
, mode
, ptarg
);
602 pipe_mutex_unlock(blitter
->mutex
);
604 ctx
->fp
= blitter
->fp
[targ
][mode
];
608 nvc0_blit_set_dst(struct nvc0_blitctx
*ctx
,
609 struct pipe_resource
*res
, unsigned level
, unsigned layer
,
610 enum pipe_format format
)
612 struct nvc0_context
*nvc0
= ctx
->nvc0
;
613 struct pipe_context
*pipe
= &nvc0
->base
.pipe
;
614 struct pipe_surface templ
;
616 if (util_format_is_depth_or_stencil(format
))
617 templ
.format
= nv50_blit_zeta_to_colour_format(format
);
619 templ
.format
= format
;
621 templ
.u
.tex
.level
= level
;
622 templ
.u
.tex
.first_layer
= templ
.u
.tex
.last_layer
= layer
;
625 templ
.u
.tex
.first_layer
= 0;
626 templ
.u
.tex
.last_layer
=
627 (res
->target
== PIPE_TEXTURE_3D
? res
->depth0
: res
->array_size
) - 1;
630 nvc0
->framebuffer
.cbufs
[0] = nvc0_miptree_surface_new(pipe
, res
, &templ
);
631 nvc0
->framebuffer
.nr_cbufs
= 1;
632 nvc0
->framebuffer
.zsbuf
= NULL
;
633 nvc0
->framebuffer
.width
= nvc0
->framebuffer
.cbufs
[0]->width
;
634 nvc0
->framebuffer
.height
= nvc0
->framebuffer
.cbufs
[0]->height
;
638 nvc0_blit_set_src(struct nvc0_blitctx
*ctx
,
639 struct pipe_resource
*res
, unsigned level
, unsigned layer
,
640 enum pipe_format format
, const uint8_t filter
)
642 struct nvc0_context
*nvc0
= ctx
->nvc0
;
643 struct pipe_context
*pipe
= &nvc0
->base
.pipe
;
644 struct pipe_sampler_view templ
;
647 enum pipe_texture_target target
;
649 target
= nv50_blit_reinterpret_pipe_texture_target(res
->target
);
651 templ
.format
= format
;
652 templ
.u
.tex
.first_layer
= templ
.u
.tex
.last_layer
= layer
;
653 templ
.u
.tex
.first_level
= templ
.u
.tex
.last_level
= level
;
654 templ
.swizzle_r
= PIPE_SWIZZLE_RED
;
655 templ
.swizzle_g
= PIPE_SWIZZLE_GREEN
;
656 templ
.swizzle_b
= PIPE_SWIZZLE_BLUE
;
657 templ
.swizzle_a
= PIPE_SWIZZLE_ALPHA
;
660 templ
.u
.tex
.first_layer
= 0;
661 templ
.u
.tex
.last_layer
=
662 (res
->target
== PIPE_TEXTURE_3D
? res
->depth0
: res
->array_size
) - 1;
665 flags
= res
->last_level
? 0 : NV50_TEXVIEW_SCALED_COORDS
;
666 flags
|= NV50_TEXVIEW_ACCESS_RESOLVE
;
667 if (filter
&& res
->nr_samples
== 8)
668 flags
|= NV50_TEXVIEW_FILTER_MSAA8
;
670 nvc0
->textures
[4][0] = nvc0_create_texture_view(
671 pipe
, res
, &templ
, flags
, target
);
672 nvc0
->textures
[4][1] = NULL
;
674 for (s
= 0; s
<= 3; ++s
)
675 nvc0
->num_textures
[s
] = 0;
676 nvc0
->num_textures
[4] = 1;
678 templ
.format
= nv50_zs_to_s_format(format
);
679 if (templ
.format
!= format
) {
680 nvc0
->textures
[4][1] = nvc0_create_texture_view(
681 pipe
, res
, &templ
, flags
, target
);
682 nvc0
->num_textures
[4] = 2;
687 nvc0_blitctx_prepare_state(struct nvc0_blitctx
*blit
)
689 struct nouveau_pushbuf
*push
= blit
->nvc0
->base
.pushbuf
;
691 /* TODO: maybe make this a MACRO (if we need more logic) ? */
693 if (blit
->nvc0
->cond_query
)
694 IMMED_NVC0(push
, NVC0_3D(COND_MODE
), NVC0_3D_COND_MODE_ALWAYS
);
697 BEGIN_NVC0(push
, NVC0_3D(COLOR_MASK(0)), 1);
698 PUSH_DATA (push
, blit
->color_mask
);
699 IMMED_NVC0(push
, NVC0_3D(BLEND_ENABLE(0)), 0);
700 IMMED_NVC0(push
, NVC0_3D(LOGIC_OP_ENABLE
), 0);
702 /* rasterizer state */
703 IMMED_NVC0(push
, NVC0_3D(FRAG_COLOR_CLAMP_EN
), 0);
704 IMMED_NVC0(push
, NVC0_3D(MULTISAMPLE_ENABLE
), 0);
705 BEGIN_NVC0(push
, NVC0_3D(MSAA_MASK(0)), 4);
706 PUSH_DATA (push
, 0xffff);
707 PUSH_DATA (push
, 0xffff);
708 PUSH_DATA (push
, 0xffff);
709 PUSH_DATA (push
, 0xffff);
710 BEGIN_NVC0(push
, NVC0_3D(MACRO_POLYGON_MODE_FRONT
), 1);
711 PUSH_DATA (push
, NVC0_3D_MACRO_POLYGON_MODE_FRONT_FILL
);
712 BEGIN_NVC0(push
, NVC0_3D(MACRO_POLYGON_MODE_BACK
), 1);
713 PUSH_DATA (push
, NVC0_3D_MACRO_POLYGON_MODE_BACK_FILL
);
714 IMMED_NVC0(push
, NVC0_3D(POLYGON_SMOOTH_ENABLE
), 0);
715 IMMED_NVC0(push
, NVC0_3D(POLYGON_OFFSET_FILL_ENABLE
), 0);
716 IMMED_NVC0(push
, NVC0_3D(POLYGON_STIPPLE_ENABLE
), 0);
717 IMMED_NVC0(push
, NVC0_3D(CULL_FACE_ENABLE
), 0);
720 IMMED_NVC0(push
, NVC0_3D(DEPTH_TEST_ENABLE
), 0);
721 IMMED_NVC0(push
, NVC0_3D(STENCIL_ENABLE
), 0);
722 IMMED_NVC0(push
, NVC0_3D(ALPHA_TEST_ENABLE
), 0);
724 /* disable transform feedback */
725 IMMED_NVC0(push
, NVC0_3D(TFB_ENABLE
), 0);
729 nvc0_blitctx_pre_blit(struct nvc0_blitctx
*ctx
)
731 struct nvc0_context
*nvc0
= ctx
->nvc0
;
732 struct nvc0_blitter
*blitter
= nvc0
->screen
->blitter
;
735 ctx
->saved
.fb
.width
= nvc0
->framebuffer
.width
;
736 ctx
->saved
.fb
.height
= nvc0
->framebuffer
.height
;
737 ctx
->saved
.fb
.nr_cbufs
= nvc0
->framebuffer
.nr_cbufs
;
738 ctx
->saved
.fb
.cbufs
[0] = nvc0
->framebuffer
.cbufs
[0];
739 ctx
->saved
.fb
.zsbuf
= nvc0
->framebuffer
.zsbuf
;
741 ctx
->saved
.rast
= nvc0
->rast
;
743 ctx
->saved
.vp
= nvc0
->vertprog
;
744 ctx
->saved
.tcp
= nvc0
->tctlprog
;
745 ctx
->saved
.tep
= nvc0
->tevlprog
;
746 ctx
->saved
.gp
= nvc0
->gmtyprog
;
747 ctx
->saved
.fp
= nvc0
->fragprog
;
749 nvc0
->rast
= &ctx
->rast
;
751 nvc0
->vertprog
= &blitter
->vp
;
752 nvc0
->tctlprog
= NULL
;
753 nvc0
->tevlprog
= NULL
;
754 nvc0
->gmtyprog
= NULL
;
755 nvc0
->fragprog
= ctx
->fp
;
757 for (s
= 0; s
<= 4; ++s
) {
758 ctx
->saved
.num_textures
[s
] = nvc0
->num_textures
[s
];
759 ctx
->saved
.num_samplers
[s
] = nvc0
->num_samplers
[s
];
760 nvc0
->textures_dirty
[s
] = (1 << nvc0
->num_textures
[s
]) - 1;
761 nvc0
->samplers_dirty
[s
] = (1 << nvc0
->num_samplers
[s
]) - 1;
763 ctx
->saved
.texture
[0] = nvc0
->textures
[4][0];
764 ctx
->saved
.texture
[1] = nvc0
->textures
[4][1];
765 ctx
->saved
.sampler
[0] = nvc0
->samplers
[4][0];
766 ctx
->saved
.sampler
[1] = nvc0
->samplers
[4][1];
768 nvc0
->samplers
[4][0] = &blitter
->sampler
[ctx
->filter
];
769 nvc0
->samplers
[4][1] = &blitter
->sampler
[ctx
->filter
];
771 for (s
= 0; s
<= 3; ++s
)
772 nvc0
->num_samplers
[s
] = 0;
773 nvc0
->num_samplers
[4] = 2;
775 ctx
->saved
.dirty
= nvc0
->dirty
;
777 nvc0
->textures_dirty
[4] |= 3;
778 nvc0
->samplers_dirty
[4] |= 3;
780 nouveau_bufctx_reset(nvc0
->bufctx_3d
, NVC0_BIND_FB
);
781 nouveau_bufctx_reset(nvc0
->bufctx_3d
, NVC0_BIND_TEX(4, 0));
782 nouveau_bufctx_reset(nvc0
->bufctx_3d
, NVC0_BIND_TEX(4, 1));
784 nvc0
->dirty
= NVC0_NEW_FRAMEBUFFER
|
785 NVC0_NEW_VERTPROG
| NVC0_NEW_FRAGPROG
|
786 NVC0_NEW_TCTLPROG
| NVC0_NEW_TEVLPROG
| NVC0_NEW_GMTYPROG
|
787 NVC0_NEW_TEXTURES
| NVC0_NEW_SAMPLERS
;
791 nvc0_blitctx_post_blit(struct nvc0_blitctx
*blit
)
793 struct nvc0_context
*nvc0
= blit
->nvc0
;
796 pipe_surface_reference(&nvc0
->framebuffer
.cbufs
[0], NULL
);
798 nvc0
->framebuffer
.width
= blit
->saved
.fb
.width
;
799 nvc0
->framebuffer
.height
= blit
->saved
.fb
.height
;
800 nvc0
->framebuffer
.nr_cbufs
= blit
->saved
.fb
.nr_cbufs
;
801 nvc0
->framebuffer
.cbufs
[0] = blit
->saved
.fb
.cbufs
[0];
802 nvc0
->framebuffer
.zsbuf
= blit
->saved
.fb
.zsbuf
;
804 nvc0
->rast
= blit
->saved
.rast
;
806 nvc0
->vertprog
= blit
->saved
.vp
;
807 nvc0
->tctlprog
= blit
->saved
.tcp
;
808 nvc0
->tevlprog
= blit
->saved
.tep
;
809 nvc0
->gmtyprog
= blit
->saved
.gp
;
810 nvc0
->fragprog
= blit
->saved
.fp
;
812 pipe_sampler_view_reference(&nvc0
->textures
[4][0], NULL
);
813 pipe_sampler_view_reference(&nvc0
->textures
[4][1], NULL
);
815 for (s
= 0; s
<= 4; ++s
) {
816 nvc0
->num_textures
[s
] = blit
->saved
.num_textures
[s
];
817 nvc0
->num_samplers
[s
] = blit
->saved
.num_samplers
[s
];
818 nvc0
->textures_dirty
[s
] = (1 << nvc0
->num_textures
[s
]) - 1;
819 nvc0
->samplers_dirty
[s
] = (1 << nvc0
->num_samplers
[s
]) - 1;
821 nvc0
->textures
[4][0] = blit
->saved
.texture
[0];
822 nvc0
->textures
[4][1] = blit
->saved
.texture
[1];
823 nvc0
->samplers
[4][0] = blit
->saved
.sampler
[0];
824 nvc0
->samplers
[4][1] = blit
->saved
.sampler
[1];
826 nvc0
->textures_dirty
[4] |= 3;
827 nvc0
->samplers_dirty
[4] |= 3;
829 if (nvc0
->cond_query
)
830 nvc0
->base
.pipe
.render_condition(&nvc0
->base
.pipe
, nvc0
->cond_query
,
831 nvc0
->cond_cond
, nvc0
->cond_mode
);
833 nouveau_bufctx_reset(nvc0
->bufctx_3d
, NVC0_BIND_FB
);
834 nouveau_bufctx_reset(nvc0
->bufctx_3d
, NVC0_BIND_TEX(4, 0));
835 nouveau_bufctx_reset(nvc0
->bufctx_3d
, NVC0_BIND_TEX(4, 1));
837 nvc0
->dirty
= blit
->saved
.dirty
|
838 (NVC0_NEW_FRAMEBUFFER
| NVC0_NEW_SCISSOR
| NVC0_NEW_SAMPLE_MASK
|
839 NVC0_NEW_RASTERIZER
| NVC0_NEW_ZSA
| NVC0_NEW_BLEND
|
840 NVC0_NEW_TEXTURES
| NVC0_NEW_SAMPLERS
|
841 NVC0_NEW_VERTPROG
| NVC0_NEW_FRAGPROG
|
842 NVC0_NEW_TCTLPROG
| NVC0_NEW_TEVLPROG
| NVC0_NEW_GMTYPROG
|
843 NVC0_NEW_TFB_TARGETS
);
847 nvc0_blit_3d(struct nvc0_context
*nvc0
, const struct pipe_blit_info
*info
)
849 struct nvc0_blitctx
*blit
= nvc0
->blit
;
850 struct nouveau_pushbuf
*push
= nvc0
->base
.pushbuf
;
851 struct pipe_resource
*src
= info
->src
.resource
;
852 struct pipe_resource
*dst
= info
->dst
.resource
;
853 int32_t minx
, maxx
, miny
, maxy
;
855 float x0
, x1
, y0
, y1
, z
;
857 float x_range
, y_range
;
859 blit
->mode
= nv50_blit_select_mode(info
);
860 blit
->color_mask
= nv50_blit_derive_color_mask(info
);
861 blit
->filter
= nv50_blit_get_filter(info
);
863 nvc0_blit_select_fp(blit
, info
);
864 nvc0_blitctx_pre_blit(blit
);
866 nvc0_blit_set_dst(blit
, dst
, info
->dst
.level
, -1, info
->dst
.format
);
867 nvc0_blit_set_src(blit
, src
, info
->src
.level
, -1, info
->src
.format
,
870 nvc0_blitctx_prepare_state(blit
);
872 nvc0_state_validate(nvc0
, ~0, 48);
874 x_range
= (float)info
->src
.box
.width
/ (float)info
->dst
.box
.width
;
875 y_range
= (float)info
->src
.box
.height
/ (float)info
->dst
.box
.height
;
877 x0
= (float)info
->src
.box
.x
- x_range
* (float)info
->dst
.box
.x
;
878 y0
= (float)info
->src
.box
.y
- y_range
* (float)info
->dst
.box
.y
;
880 x1
= x0
+ 16384.0f
* x_range
;
881 y1
= y0
+ 16384.0f
* y_range
;
883 x0
*= (float)(1 << nv50_miptree(src
)->ms_x
);
884 x1
*= (float)(1 << nv50_miptree(src
)->ms_x
);
885 y0
*= (float)(1 << nv50_miptree(src
)->ms_y
);
886 y1
*= (float)(1 << nv50_miptree(src
)->ms_y
);
888 if (src
->last_level
> 0) {
889 /* If there are mip maps, GPU always assumes normalized coordinates. */
890 const unsigned l
= info
->src
.level
;
891 const float fh
= u_minify(src
->width0
<< nv50_miptree(src
)->ms_x
, l
);
892 const float fv
= u_minify(src
->height0
<< nv50_miptree(src
)->ms_y
, l
);
899 dz
= (float)info
->src
.box
.depth
/ (float)info
->dst
.box
.depth
;
900 z
= (float)info
->src
.box
.z
;
901 if (nv50_miptree(src
)->layout_3d
)
904 IMMED_NVC0(push
, NVC0_3D(VIEWPORT_TRANSFORM_EN
), 0);
905 IMMED_NVC0(push
, NVC0_3D(VIEW_VOLUME_CLIP_CTRL
), 0x2 |
906 NVC0_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_RANGE_0_1
);
907 BEGIN_NVC0(push
, NVC0_3D(VIEWPORT_HORIZ(0)), 2);
908 PUSH_DATA (push
, nvc0
->framebuffer
.width
<< 16);
909 PUSH_DATA (push
, nvc0
->framebuffer
.height
<< 16);
911 /* Draw a large triangle in screen coordinates covering the whole
912 * render target, with scissors defining the destination region.
913 * The vertex is supplied with non-normalized texture coordinates
914 * arranged in a way to yield the desired offset and scale.
917 minx
= info
->dst
.box
.x
;
918 maxx
= info
->dst
.box
.x
+ info
->dst
.box
.width
;
919 miny
= info
->dst
.box
.y
;
920 maxy
= info
->dst
.box
.y
+ info
->dst
.box
.height
;
921 if (info
->scissor_enable
) {
922 minx
= MAX2(minx
, info
->scissor
.minx
);
923 maxx
= MIN2(maxx
, info
->scissor
.maxx
);
924 miny
= MAX2(miny
, info
->scissor
.miny
);
925 maxy
= MIN2(maxy
, info
->scissor
.maxy
);
927 BEGIN_NVC0(push
, NVC0_3D(SCISSOR_HORIZ(0)), 2);
928 PUSH_DATA (push
, (maxx
<< 16) | minx
);
929 PUSH_DATA (push
, (maxy
<< 16) | miny
);
931 for (i
= 0; i
< info
->dst
.box
.depth
; ++i
, z
+= dz
) {
932 if (info
->dst
.box
.z
+ i
) {
933 BEGIN_NVC0(push
, NVC0_3D(LAYER
), 1);
934 PUSH_DATA (push
, info
->dst
.box
.z
+ i
);
937 IMMED_NVC0(push
, NVC0_3D(VERTEX_BEGIN_GL
),
938 NVC0_3D_VERTEX_BEGIN_GL_PRIMITIVE_TRIANGLES
);
940 BEGIN_NVC0(push
, NVC0_3D(VTX_ATTR_DEFINE
), 4);
941 PUSH_DATA (push
, 0x74301);
942 PUSH_DATAf(push
, x0
);
943 PUSH_DATAf(push
, y0
);
945 BEGIN_NVC0(push
, NVC0_3D(VTX_ATTR_DEFINE
), 3);
946 PUSH_DATA (push
, 0x74200);
947 PUSH_DATAf(push
, 0.0f
);
948 PUSH_DATAf(push
, 0.0f
);
949 BEGIN_NVC0(push
, NVC0_3D(VTX_ATTR_DEFINE
), 4);
950 PUSH_DATA (push
, 0x74301);
951 PUSH_DATAf(push
, x1
);
952 PUSH_DATAf(push
, y0
);
954 BEGIN_NVC0(push
, NVC0_3D(VTX_ATTR_DEFINE
), 3);
955 PUSH_DATA (push
, 0x74200);
956 PUSH_DATAf(push
, 16384 << nv50_miptree(dst
)->ms_x
);
957 PUSH_DATAf(push
, 0.0f
);
958 BEGIN_NVC0(push
, NVC0_3D(VTX_ATTR_DEFINE
), 4);
959 PUSH_DATA (push
, 0x74301);
960 PUSH_DATAf(push
, x0
);
961 PUSH_DATAf(push
, y1
);
963 BEGIN_NVC0(push
, NVC0_3D(VTX_ATTR_DEFINE
), 3);
964 PUSH_DATA (push
, 0x74200);
965 PUSH_DATAf(push
, 0.0f
);
966 PUSH_DATAf(push
, 16384 << nv50_miptree(dst
)->ms_y
);
968 IMMED_NVC0(push
, NVC0_3D(VERTEX_END_GL
), 0);
970 if (info
->dst
.box
.z
+ info
->dst
.box
.depth
- 1)
971 IMMED_NVC0(push
, NVC0_3D(LAYER
), 0);
973 nvc0_blitctx_post_blit(blit
);
975 /* restore viewport */
977 BEGIN_NVC0(push
, NVC0_3D(VIEWPORT_HORIZ(0)), 2);
978 PUSH_DATA (push
, nvc0
->vport_int
[0]);
979 PUSH_DATA (push
, nvc0
->vport_int
[1]);
980 IMMED_NVC0(push
, NVC0_3D(VIEWPORT_TRANSFORM_EN
), 1);
984 nvc0_blit_eng2d(struct nvc0_context
*nvc0
, const struct pipe_blit_info
*info
)
986 struct nouveau_pushbuf
*push
= nvc0
->base
.pushbuf
;
987 struct nv50_miptree
*dst
= nv50_miptree(info
->dst
.resource
);
988 struct nv50_miptree
*src
= nv50_miptree(info
->src
.resource
);
989 const int32_t srcx_adj
= info
->src
.box
.width
< 0 ? -1 : 0;
990 const int32_t srcy_adj
= info
->src
.box
.height
< 0 ? -1 : 0;
991 const int dz
= info
->dst
.box
.z
;
992 const int sz
= info
->src
.box
.z
;
996 int64_t du_dx
, dv_dy
;
999 uint32_t mask
= nv50_blit_eng2d_get_mask(info
);
1002 mode
= nv50_blit_get_filter(info
) ?
1003 NVC0_2D_BLIT_CONTROL_FILTER_BILINEAR
:
1004 NVC0_2D_BLIT_CONTROL_FILTER_POINT_SAMPLE
;
1005 mode
|= (src
->base
.base
.nr_samples
> dst
->base
.base
.nr_samples
) ?
1006 NVC0_2D_BLIT_CONTROL_ORIGIN_CORNER
: NVC0_2D_BLIT_CONTROL_ORIGIN_CENTER
;
1008 du_dx
= ((int64_t)info
->src
.box
.width
<< 32) / info
->dst
.box
.width
;
1009 dv_dy
= ((int64_t)info
->src
.box
.height
<< 32) / info
->dst
.box
.height
;
1011 b
= info
->dst
.format
== info
->src
.format
;
1012 nvc0_2d_texture_set(push
, 1, dst
, info
->dst
.level
, dz
, info
->dst
.format
, b
);
1013 nvc0_2d_texture_set(push
, 0, src
, info
->src
.level
, sz
, info
->src
.format
, b
);
1015 if (info
->scissor_enable
) {
1016 BEGIN_NVC0(push
, NVC0_2D(CLIP_X
), 5);
1017 PUSH_DATA (push
, info
->scissor
.minx
<< dst
->ms_x
);
1018 PUSH_DATA (push
, info
->scissor
.miny
<< dst
->ms_y
);
1019 PUSH_DATA (push
, (info
->scissor
.maxx
- info
->scissor
.minx
) << dst
->ms_x
);
1020 PUSH_DATA (push
, (info
->scissor
.maxy
- info
->scissor
.miny
) << dst
->ms_y
);
1021 PUSH_DATA (push
, 1); /* enable */
1024 if (mask
!= 0xffffffff) {
1025 IMMED_NVC0(push
, NVC0_2D(ROP
), 0xca); /* DPSDxax */
1026 IMMED_NVC0(push
, NVC0_2D(PATTERN_COLOR_FORMAT
),
1027 NVC0_2D_PATTERN_COLOR_FORMAT_32BPP
);
1028 BEGIN_NVC0(push
, NVC0_2D(PATTERN_COLOR(0)), 4);
1029 PUSH_DATA (push
, 0x00000000);
1030 PUSH_DATA (push
, mask
);
1031 PUSH_DATA (push
, 0xffffffff);
1032 PUSH_DATA (push
, 0xffffffff);
1033 IMMED_NVC0(push
, NVC0_2D(OPERATION
), NVC0_2D_OPERATION_ROP
);
1035 if (info
->src
.format
!= info
->dst
.format
) {
1036 if (info
->src
.format
== PIPE_FORMAT_R8_UNORM
||
1037 info
->src
.format
== PIPE_FORMAT_R8_SNORM
||
1038 info
->src
.format
== PIPE_FORMAT_R16_UNORM
||
1039 info
->src
.format
== PIPE_FORMAT_R16_SNORM
||
1040 info
->src
.format
== PIPE_FORMAT_R16_FLOAT
||
1041 info
->src
.format
== PIPE_FORMAT_R32_FLOAT
) {
1042 mask
= 0xffff0000; /* also makes condition for OPERATION reset true */
1043 BEGIN_NVC0(push
, NVC0_2D(BETA4
), 2);
1044 PUSH_DATA (push
, mask
);
1045 PUSH_DATA (push
, NVC0_2D_OPERATION_SRCCOPY_PREMULT
);
1047 if (info
->src
.format
== PIPE_FORMAT_A8_UNORM
) {
1049 BEGIN_NVC0(push
, NVC0_2D(BETA4
), 2);
1050 PUSH_DATA (push
, mask
);
1051 PUSH_DATA (push
, NVC0_2D_OPERATION_SRCCOPY_PREMULT
);
1055 if (src
->ms_x
> dst
->ms_x
|| src
->ms_y
> dst
->ms_y
) {
1056 /* ms_x is always >= ms_y */
1057 du_dx
<<= src
->ms_x
- dst
->ms_x
;
1058 dv_dy
<<= src
->ms_y
- dst
->ms_y
;
1060 du_dx
>>= dst
->ms_x
- src
->ms_x
;
1061 dv_dy
>>= dst
->ms_y
- src
->ms_y
;
1064 srcx
= (int64_t)(info
->src
.box
.x
+ srcx_adj
) << (src
->ms_x
+ 32);
1065 srcy
= (int64_t)(info
->src
.box
.y
+ srcy_adj
) << (src
->ms_y
+ 32);
1067 if (src
->base
.base
.nr_samples
> dst
->base
.base
.nr_samples
) {
1068 /* center src coorinates for proper MS resolve filtering */
1069 srcx
+= (int64_t)(src
->ms_x
+ 0) << 32;
1070 srcy
+= (int64_t)(src
->ms_y
+ 1) << 31;
1073 dstx
= info
->dst
.box
.x
<< dst
->ms_x
;
1074 dsty
= info
->dst
.box
.y
<< dst
->ms_y
;
1076 dstw
= info
->dst
.box
.width
<< dst
->ms_x
;
1077 dsth
= info
->dst
.box
.height
<< dst
->ms_y
;
1081 srcx
-= du_dx
* dstx
;
1086 srcy
-= dv_dy
* dsty
;
1090 IMMED_NVC0(push
, NVC0_2D(BLIT_CONTROL
), mode
);
1091 BEGIN_NVC0(push
, NVC0_2D(BLIT_DST_X
), 4);
1092 PUSH_DATA (push
, dstx
);
1093 PUSH_DATA (push
, dsty
);
1094 PUSH_DATA (push
, dstw
);
1095 PUSH_DATA (push
, dsth
);
1096 BEGIN_NVC0(push
, NVC0_2D(BLIT_DU_DX_FRACT
), 4);
1097 PUSH_DATA (push
, du_dx
);
1098 PUSH_DATA (push
, du_dx
>> 32);
1099 PUSH_DATA (push
, dv_dy
);
1100 PUSH_DATA (push
, dv_dy
>> 32);
1102 BCTX_REFN(nvc0
->bufctx
, 2D
, &dst
->base
, WR
);
1103 BCTX_REFN(nvc0
->bufctx
, 2D
, &src
->base
, RD
);
1104 nouveau_pushbuf_bufctx(nvc0
->base
.pushbuf
, nvc0
->bufctx
);
1105 if (nouveau_pushbuf_validate(nvc0
->base
.pushbuf
))
1108 for (i
= 0; i
< info
->dst
.box
.depth
; ++i
) {
1110 /* no scaling in z-direction possible for eng2d blits */
1111 if (dst
->layout_3d
) {
1112 BEGIN_NVC0(push
, NVC0_2D(DST_LAYER
), 1);
1113 PUSH_DATA (push
, info
->dst
.box
.z
+ i
);
1115 const unsigned z
= info
->dst
.box
.z
+ i
;
1116 BEGIN_NVC0(push
, NVC0_2D(DST_ADDRESS_HIGH
), 2);
1117 PUSH_DATAh(push
, dst
->base
.address
+ z
* dst
->layer_stride
);
1118 PUSH_DATA (push
, dst
->base
.address
+ z
* dst
->layer_stride
);
1120 if (src
->layout_3d
) {
1121 /* not possible because of depth tiling */
1124 const unsigned z
= info
->src
.box
.z
+ i
;
1125 BEGIN_NVC0(push
, NVC0_2D(SRC_ADDRESS_HIGH
), 2);
1126 PUSH_DATAh(push
, src
->base
.address
+ z
* src
->layer_stride
);
1127 PUSH_DATA (push
, src
->base
.address
+ z
* src
->layer_stride
);
1129 BEGIN_NVC0(push
, NVC0_2D(BLIT_SRC_Y_INT
), 1); /* trigger */
1130 PUSH_DATA (push
, srcy
>> 32);
1132 BEGIN_NVC0(push
, NVC0_2D(BLIT_SRC_X_FRACT
), 4);
1133 PUSH_DATA (push
, srcx
);
1134 PUSH_DATA (push
, srcx
>> 32);
1135 PUSH_DATA (push
, srcy
);
1136 PUSH_DATA (push
, srcy
>> 32);
1139 nvc0_resource_validate(&dst
->base
, NOUVEAU_BO_WR
);
1140 nvc0_resource_validate(&src
->base
, NOUVEAU_BO_RD
);
1142 nouveau_bufctx_reset(nvc0
->bufctx
, NVC0_BIND_2D
);
1144 if (info
->scissor_enable
)
1145 IMMED_NVC0(push
, NVC0_2D(CLIP_ENABLE
), 0);
1146 if (mask
!= 0xffffffff)
1147 IMMED_NVC0(push
, NVC0_2D(OPERATION
), NVC0_2D_OPERATION_SRCCOPY
);
1151 nvc0_blit(struct pipe_context
*pipe
, const struct pipe_blit_info
*info
)
1153 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
1154 boolean eng3d
= FALSE
;
1156 if (util_format_is_depth_or_stencil(info
->dst
.resource
->format
)) {
1157 if (!(info
->mask
& PIPE_MASK_ZS
))
1159 if (info
->dst
.resource
->format
== PIPE_FORMAT_Z32_FLOAT
||
1160 info
->dst
.resource
->format
== PIPE_FORMAT_Z32_FLOAT_S8X24_UINT
)
1162 if (info
->filter
!= PIPE_TEX_FILTER_NEAREST
)
1165 if (!(info
->mask
& PIPE_MASK_RGBA
))
1167 if (info
->mask
!= PIPE_MASK_RGBA
)
1171 if (nv50_miptree(info
->src
.resource
)->layout_3d
) {
1174 if (info
->src
.box
.depth
!= info
->dst
.box
.depth
) {
1176 debug_printf("blit: cannot filter array or cube textures in z direction");
1179 if (!eng3d
&& info
->dst
.format
!= info
->src
.format
) {
1180 if (!nv50_2d_dst_format_faithful(info
->dst
.format
)) {
1183 if (!nv50_2d_src_format_faithful(info
->src
.format
)) {
1184 if (!util_format_is_luminance(info
->src
.format
)) {
1185 if (util_format_is_intensity(info
->src
.format
))
1186 eng3d
= info
->src
.format
!= PIPE_FORMAT_I8_UNORM
;
1188 if (!nv50_2d_dst_format_ops_supported(info
->dst
.format
))
1191 eng3d
= !nv50_2d_format_supported(info
->src
.format
);
1194 if (util_format_is_luminance_alpha(info
->src
.format
))
1198 if (info
->src
.resource
->nr_samples
== 8 &&
1199 info
->dst
.resource
->nr_samples
<= 1)
1202 /* FIXME: can't make this work with eng2d anymore, at least not on nv50 */
1203 if (info
->src
.resource
->nr_samples
> 1 ||
1204 info
->dst
.resource
->nr_samples
> 1)
1207 /* FIXME: find correct src coordinates adjustments */
1208 if ((info
->src
.box
.width
!= info
->dst
.box
.width
&&
1209 info
->src
.box
.width
!= -info
->dst
.box
.width
) ||
1210 (info
->src
.box
.height
!= info
->dst
.box
.height
&&
1211 info
->src
.box
.height
!= -info
->dst
.box
.height
))
1215 nvc0_blit_eng2d(nvc0
, info
);
1217 nvc0_blit_3d(nvc0
, info
);
1219 NOUVEAU_DRV_STAT(&nvc0
->screen
->base
, tex_blit_count
, 1);
1223 nvc0_flush_resource(struct pipe_context
*ctx
,
1224 struct pipe_resource
*resource
)
1229 nvc0_blitter_create(struct nvc0_screen
*screen
)
1231 screen
->blitter
= CALLOC_STRUCT(nvc0_blitter
);
1232 if (!screen
->blitter
) {
1233 NOUVEAU_ERR("failed to allocate blitter struct\n");
1236 screen
->blitter
->screen
= screen
;
1238 pipe_mutex_init(screen
->blitter
->mutex
);
1240 nvc0_blitter_make_vp(screen
->blitter
);
1241 nvc0_blitter_make_sampler(screen
->blitter
);
1247 nvc0_blitter_destroy(struct nvc0_screen
*screen
)
1249 struct nvc0_blitter
*blitter
= screen
->blitter
;
1252 for (i
= 0; i
< NV50_BLIT_MAX_TEXTURE_TYPES
; ++i
) {
1253 for (m
= 0; m
< NV50_BLIT_MODES
; ++m
) {
1254 struct nvc0_program
*prog
= blitter
->fp
[i
][m
];
1256 nvc0_program_destroy(NULL
, prog
);
1257 FREE((void *)prog
->pipe
.tokens
);
1267 nvc0_blitctx_create(struct nvc0_context
*nvc0
)
1269 nvc0
->blit
= CALLOC_STRUCT(nvc0_blitctx
);
1271 NOUVEAU_ERR("failed to allocate blit context\n");
1275 nvc0
->blit
->nvc0
= nvc0
;
1277 nvc0
->blit
->rast
.pipe
.half_pixel_center
= 1;
1283 nvc0_blitctx_destroy(struct nvc0_context
*nvc0
)
1290 nvc0_init_surface_functions(struct nvc0_context
*nvc0
)
1292 struct pipe_context
*pipe
= &nvc0
->base
.pipe
;
1294 pipe
->resource_copy_region
= nvc0_resource_copy_region
;
1295 pipe
->blit
= nvc0_blit
;
1296 pipe
->flush_resource
= nvc0_flush_resource
;
1297 pipe
->clear_render_target
= nvc0_clear_render_target
;
1298 pipe
->clear_depth_stencil
= nvc0_clear_depth_stencil
;