nouveau: implement pipe_context::bind_sampler_states()
[mesa.git] / src / gallium / drivers / nouveau / nvc0 / nvc0_video_bsp.c
1 /*
2 * Copyright 2011-2013 Maarten Lankhorst
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 #include "nvc0/nvc0_video.h"
24
25 #if NOUVEAU_VP3_DEBUG_FENCE
26 static void dump_comm_bsp(struct comm *comm)
27 {
28 unsigned idx = comm->bsp_cur_index & 0xf;
29 debug_printf("Cur seq: %x, bsp byte ofs: %x\n", comm->bsp_cur_index, comm->byte_ofs);
30 debug_printf("Status: %08x, pos: %08x\n", comm->status[idx], comm->pos[idx]);
31 }
32 #endif
33
34 unsigned
35 nvc0_decoder_bsp(struct nouveau_vp3_decoder *dec, union pipe_desc desc,
36 struct nouveau_vp3_video_buffer *target,
37 unsigned comm_seq, unsigned num_buffers,
38 const void *const *data, const unsigned *num_bytes,
39 unsigned *vp_caps, unsigned *is_ref,
40 struct nouveau_vp3_video_buffer *refs[16])
41 {
42 struct nouveau_pushbuf *push = dec->pushbuf[0];
43 enum pipe_video_format codec = u_reduce_video_profile(dec->base.profile);
44 uint32_t bsp_addr, comm_addr, inter_addr;
45 uint32_t slice_size, bucket_size, ring_size;
46 uint32_t caps;
47 int ret;
48 struct nouveau_bo *bsp_bo = dec->bsp_bo[comm_seq % NOUVEAU_VP3_VIDEO_QDEPTH];
49 struct nouveau_bo *inter_bo = dec->inter_bo[comm_seq & 1];
50 unsigned fence_extra = 0;
51 struct nouveau_pushbuf_refn bo_refs[] = {
52 { bsp_bo, NOUVEAU_BO_RD | NOUVEAU_BO_VRAM },
53 { inter_bo, NOUVEAU_BO_WR | NOUVEAU_BO_VRAM },
54 #if NOUVEAU_VP3_DEBUG_FENCE
55 { dec->fence_bo, NOUVEAU_BO_WR | NOUVEAU_BO_GART },
56 #endif
57 { dec->bitplane_bo, NOUVEAU_BO_RDWR | NOUVEAU_BO_VRAM },
58 };
59 int num_refs = sizeof(bo_refs)/sizeof(*bo_refs);
60
61 if (!dec->bitplane_bo)
62 num_refs--;
63
64 #if NOUVEAU_VP3_DEBUG_FENCE
65 fence_extra = 4;
66 #endif
67
68 ret = nouveau_bo_map(bsp_bo, NOUVEAU_BO_WR, dec->client);
69 if (ret) {
70 debug_printf("map failed: %i %s\n", ret, strerror(-ret));
71 return -1;
72 }
73
74 caps = nouveau_vp3_bsp(dec, desc, target, comm_seq,
75 num_buffers, data, num_bytes);
76
77 nouveau_vp3_vp_caps(dec, desc, target, comm_seq, vp_caps, is_ref, refs);
78
79 nouveau_pushbuf_space(push, 6 + (codec == PIPE_VIDEO_FORMAT_MPEG4_AVC ? 9 : 7) + fence_extra + 2, num_refs, 0);
80 nouveau_pushbuf_refn(push, bo_refs, num_refs);
81
82 bsp_addr = bsp_bo->offset >> 8;
83 inter_addr = inter_bo->offset >> 8;
84
85 #if NOUVEAU_VP3_DEBUG_FENCE
86 memset(dec->comm, 0, 0x200);
87 comm_addr = (dec->fence_bo->offset + COMM_OFFSET) >> 8;
88 #else
89 comm_addr = bsp_addr + (COMM_OFFSET>>8);
90 #endif
91
92 BEGIN_NVC0(push, SUBC_BSP(0x700), 5);
93 PUSH_DATA (push, caps); // 700 cmd
94 PUSH_DATA (push, bsp_addr + 1); // 704 strparm_bsp
95 PUSH_DATA (push, bsp_addr + 7); // 708 str addr
96 PUSH_DATA (push, comm_addr); // 70c comm
97 PUSH_DATA (push, comm_seq); // 710 seq
98
99 if (codec != PIPE_VIDEO_FORMAT_MPEG4_AVC) {
100 u32 bitplane_addr;
101
102 bitplane_addr = dec->bitplane_bo->offset >> 8;
103
104 nouveau_vp3_inter_sizes(dec, 1, &slice_size, &bucket_size, &ring_size);
105 BEGIN_NVC0(push, SUBC_BSP(0x400), 6);
106 PUSH_DATA (push, bsp_addr); // 400 picparm addr
107 PUSH_DATA (push, inter_addr); // 404 interparm addr
108 PUSH_DATA (push, inter_addr + slice_size + bucket_size); // 408 interdata addr
109 PUSH_DATA (push, ring_size << 8); // 40c interdata_size
110 PUSH_DATA (push, bitplane_addr); // 410 BITPLANE_DATA
111 PUSH_DATA (push, 0x400); // 414 BITPLANE_DATA_SIZE
112 } else {
113 nouveau_vp3_inter_sizes(dec, desc.h264->slice_count, &slice_size, &bucket_size, &ring_size);
114 BEGIN_NVC0(push, SUBC_BSP(0x400), 8);
115 PUSH_DATA (push, bsp_addr); // 400 picparm addr
116 PUSH_DATA (push, inter_addr); // 404 interparm addr
117 PUSH_DATA (push, slice_size << 8); // 408 interparm size?
118 PUSH_DATA (push, inter_addr + slice_size + bucket_size); // 40c interdata addr
119 PUSH_DATA (push, ring_size << 8); // 410 interdata size
120 PUSH_DATA (push, inter_addr + slice_size); // 414 bucket?
121 PUSH_DATA (push, bucket_size << 8); // 418 bucket size? unshifted..
122 PUSH_DATA (push, 0); // 41c targets
123 // TODO: Double check 414 / 418 with nvidia trace
124 }
125
126 #if NOUVEAU_VP3_DEBUG_FENCE
127 BEGIN_NVC0(push, SUBC_BSP(0x240), 3);
128 PUSH_DATAh(push, dec->fence_bo->offset);
129 PUSH_DATA (push, dec->fence_bo->offset);
130 PUSH_DATA (push, dec->fence_seq);
131
132 BEGIN_NVC0(push, SUBC_BSP(0x300), 1);
133 PUSH_DATA (push, 1);
134 PUSH_KICK (push);
135
136 {
137 unsigned spin = 0;
138 do {
139 usleep(100);
140 if ((spin++ & 0xff) == 0xff) {
141 debug_printf("b%u: %u\n", dec->fence_seq, dec->fence_map[0]);
142 dump_comm_bsp(dec->comm);
143 }
144 } while (dec->fence_seq > dec->fence_map[0]);
145 }
146
147 dump_comm_bsp(dec->comm);
148 return dec->comm->status[comm_seq & 0xf];
149 #else
150 BEGIN_NVC0(push, SUBC_BSP(0x300), 1);
151 PUSH_DATA (push, 0);
152 PUSH_KICK (push);
153 return 2;
154 #endif
155 }