nvc0/cl: hande 64 bit pointers in nvc0_set_global_handle
[mesa.git] / src / gallium / drivers / nouveau / nvc0 / qmda0c0.c
1 /*
2 * Copyright 2020 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 #include "qmd.h"
23 #include "cla0c0qmd.h"
24
25 #define NVA0C0_QMDV00_06_VAL(a...) NVQMD_VAL(NVA0C0, QMDV00_06, ##a)
26 #define NVA0C0_QMDV00_06_DEF(a...) NVQMD_DEF(NVA0C0, QMDV00_06, ##a)
27 #define NVA0C0_QMDV00_06_IDX(a...) NVQMD_IDX(NVA0C0, QMDV00_06, ##a)
28
29 void
30 NVA0C0QmdDump_V00_06(uint32_t *qmd)
31 {
32 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_V1_A, "0x%x");
33 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_V1_B, "0x%x");
34 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_V1_C, "0x%x");
35 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_V1_D, "0x%x");
36 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_V1_E, "0x%x");
37 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_V1_F, "0x%x");
38 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_V1_G, "0x%x");
39 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_V1_H, "0x%x");
40 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_A_A, "0x%x");
41 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_V1_I, "0x%x");
42 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_V1_J, "0x%x");
43 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_A, "0x%x");
44 NVA0C0_QMDV00_06_DEF(qmd, QMD_RESERVED_V1_K, FALSE, TRUE);
45 NVA0C0_QMDV00_06_DEF(qmd, QMD_RESERVED_V1_L, FALSE, TRUE);
46 NVA0C0_QMDV00_06_DEF(qmd, SEMAPHORE_RELEASE_ENABLE0, FALSE, TRUE);
47 NVA0C0_QMDV00_06_DEF(qmd, SEMAPHORE_RELEASE_ENABLE1, FALSE, TRUE);
48 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_B, "0x%x");
49 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_V1_M, "0x%x");
50 NVA0C0_QMDV00_06_DEF(qmd, QMD_RESERVED_V1_N, FALSE, TRUE);
51 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_V1_O, "0x%x");
52 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_C, "0x%x");
53 NVA0C0_QMDV00_06_DEF(qmd, INVALIDATE_TEXTURE_HEADER_CACHE, FALSE, TRUE);
54 NVA0C0_QMDV00_06_DEF(qmd, INVALIDATE_TEXTURE_SAMPLER_CACHE, FALSE, TRUE);
55 NVA0C0_QMDV00_06_DEF(qmd, INVALIDATE_TEXTURE_DATA_CACHE, FALSE, TRUE);
56 NVA0C0_QMDV00_06_DEF(qmd, INVALIDATE_SHADER_DATA_CACHE, FALSE, TRUE);
57 NVA0C0_QMDV00_06_DEF(qmd, INVALIDATE_INSTRUCTION_CACHE, FALSE, TRUE);
58 NVA0C0_QMDV00_06_DEF(qmd, INVALIDATE_SHADER_CONSTANT_CACHE, FALSE, TRUE);
59 NVA0C0_QMDV00_06_VAL(qmd, PROGRAM_OFFSET, "0x%x");
60 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_V1_P, "0x%x");
61 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_V1_Q, "0x%x");
62 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_D, "0x%x");
63 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_V1_R, "0x%x");
64 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_V1_S, "0x%x");
65 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_E, "0x%x");
66 NVA0C0_QMDV00_06_DEF(qmd, RELEASE_MEMBAR_TYPE, FE_NONE, FE_SYSMEMBAR);
67 NVA0C0_QMDV00_06_DEF(qmd, CWD_MEMBAR_TYPE, L1_NONE, L1_SYSMEMBAR, L1_MEMBAR);
68 NVA0C0_QMDV00_06_DEF(qmd, QMD_RESERVED_V1_T, FALSE, TRUE);
69 NVA0C0_QMDV00_06_DEF(qmd, QMD_RESERVED_V1_U, FALSE, TRUE);
70 NVA0C0_QMDV00_06_DEF(qmd, THROTTLED, FALSE, TRUE);
71 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_E2_A, "0x%x");
72 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_E2_B, "0x%x");
73 NVA0C0_QMDV00_06_DEF(qmd, API_VISIBLE_CALL_LIMIT, _32, NO_CHECK);
74 NVA0C0_QMDV00_06_DEF(qmd, SHARED_MEMORY_BANK_MAPPING, FOUR_BYTES_PER_BANK,
75 EIGHT_BYTES_PER_BANK);
76 NVA0C0_QMDV00_06_DEF(qmd, SAMPLER_INDEX, INDEPENDENTLY, VIA_HEADER_INDEX);
77 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_E3_A, "0x%x");
78 NVA0C0_QMDV00_06_VAL(qmd, CTA_RASTER_WIDTH, "0x%x");
79 NVA0C0_QMDV00_06_VAL(qmd, CTA_RASTER_HEIGHT, "0x%x");
80 NVA0C0_QMDV00_06_VAL(qmd, CTA_RASTER_DEPTH, "0x%x");
81 NVA0C0_QMDV00_06_VAL(qmd, CTA_RASTER_WIDTH_RESUME, "0x%x");
82 NVA0C0_QMDV00_06_VAL(qmd, CTA_RASTER_HEIGHT_RESUME, "0x%x");
83 NVA0C0_QMDV00_06_VAL(qmd, CTA_RASTER_DEPTH_RESUME, "0x%x");
84 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_V1_V, "0x%x");
85 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_F, "0x%x");
86 NVA0C0_QMDV00_06_DEF(qmd, QMD_RESERVED_V1_W, FALSE, TRUE);
87 NVA0C0_QMDV00_06_VAL(qmd, SHARED_MEMORY_SIZE, "0x%x");
88 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_G, "0x%x");
89 NVA0C0_QMDV00_06_VAL(qmd, QMD_VERSION, "0x%x");
90 NVA0C0_QMDV00_06_VAL(qmd, QMD_MAJOR_VERSION, "0x%x");
91 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_H, "0x%x");
92 NVA0C0_QMDV00_06_VAL(qmd, CTA_THREAD_DIMENSION0, "0x%x");
93 NVA0C0_QMDV00_06_VAL(qmd, CTA_THREAD_DIMENSION1, "0x%x");
94 NVA0C0_QMDV00_06_VAL(qmd, CTA_THREAD_DIMENSION2, "0x%x");
95 for (int i = 0; i < 8; i++)
96 NVA0C0_QMDV00_06_IDX(qmd, CONSTANT_BUFFER_VALID, i, FALSE, TRUE);
97 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_I, "0x%x");
98 NVA0C0_QMDV00_06_DEF(qmd, L1_CONFIGURATION,
99 DIRECTLY_ADDRESSABLE_MEMORY_SIZE_16KB,
100 DIRECTLY_ADDRESSABLE_MEMORY_SIZE_32KB,
101 DIRECTLY_ADDRESSABLE_MEMORY_SIZE_48KB);
102 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_V1_X, "0x%x");
103 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_V1_Y, "0x%x");
104 NVA0C0_QMDV00_06_VAL(qmd, RELEASE0_ADDRESS_LOWER, "0x%x");
105 NVA0C0_QMDV00_06_VAL(qmd, RELEASE0_ADDRESS_UPPER, "0x%x");
106 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_J, "0x%x");
107 NVA0C0_QMDV00_06_DEF(qmd, RELEASE0_REDUCTION_OP, RED_ADD,
108 RED_MIN,
109 RED_MAX,
110 RED_INC,
111 RED_DEC,
112 RED_AND,
113 RED_OR,
114 RED_XOR);
115 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_K, "0x%x");
116 NVA0C0_QMDV00_06_DEF(qmd, RELEASE0_REDUCTION_FORMAT, UNSIGNED_32, SIGNED_32);
117 NVA0C0_QMDV00_06_DEF(qmd, RELEASE0_REDUCTION_ENABLE, FALSE, TRUE);
118 NVA0C0_QMDV00_06_DEF(qmd, RELEASE0_STRUCTURE_SIZE, FOUR_WORDS, ONE_WORD);
119 NVA0C0_QMDV00_06_VAL(qmd, RELEASE0_PAYLOAD, "0x%x");
120 NVA0C0_QMDV00_06_VAL(qmd, RELEASE1_ADDRESS_LOWER, "0x%x");
121 NVA0C0_QMDV00_06_VAL(qmd, RELEASE1_ADDRESS_UPPER, "0x%x");
122 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_L, "0x%x");
123 NVA0C0_QMDV00_06_DEF(qmd, RELEASE1_REDUCTION_OP, RED_ADD,
124 RED_MIN,
125 RED_MAX,
126 RED_INC,
127 RED_DEC,
128 RED_AND,
129 RED_OR,
130 RED_XOR);
131 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_M, "0x%x");
132 NVA0C0_QMDV00_06_DEF(qmd, RELEASE1_REDUCTION_FORMAT, UNSIGNED_32, SIGNED_32);
133 NVA0C0_QMDV00_06_DEF(qmd, RELEASE1_REDUCTION_ENABLE, FALSE, TRUE);
134 NVA0C0_QMDV00_06_DEF(qmd, RELEASE1_STRUCTURE_SIZE, FOUR_WORDS, ONE_WORD);
135 NVA0C0_QMDV00_06_VAL(qmd, RELEASE1_PAYLOAD, "0x%x");
136 for (int i = 0; i < 8; i++) {
137 NVA0C0_QMDV00_06_VAL(qmd, CONSTANT_BUFFER_ADDR_LOWER, i, "0x%x");
138 NVA0C0_QMDV00_06_VAL(qmd, CONSTANT_BUFFER_ADDR_UPPER, i, "0x%x");
139 NVA0C0_QMDV00_06_VAL(qmd, CONSTANT_BUFFER_RESERVED_ADDR, i, "0x%x");
140 NVA0C0_QMDV00_06_IDX(qmd, CONSTANT_BUFFER_INVALIDATE, i, FALSE, TRUE);
141 NVA0C0_QMDV00_06_VAL(qmd, CONSTANT_BUFFER_SIZE, i, "0x%x");
142 }
143 NVA0C0_QMDV00_06_VAL(qmd, SHADER_LOCAL_MEMORY_LOW_SIZE, "0x%x");
144 NVA0C0_QMDV00_06_VAL(qmd, QMD_RESERVED_N, "0x%x");
145 NVA0C0_QMDV00_06_VAL(qmd, BARRIER_COUNT, "0x%x");
146 NVA0C0_QMDV00_06_VAL(qmd, SHADER_LOCAL_MEMORY_HIGH_SIZE, "0x%x");
147 NVA0C0_QMDV00_06_VAL(qmd, REGISTER_COUNT, "0x%x");
148 NVA0C0_QMDV00_06_VAL(qmd, SHADER_LOCAL_MEMORY_CRS_SIZE, "0x%x");
149 NVA0C0_QMDV00_06_VAL(qmd, SASS_VERSION, "0x%x");
150 NVA0C0_QMDV00_06_VAL(qmd, QMD_SPARE_A, "0x%x");
151 NVA0C0_QMDV00_06_VAL(qmd, QMD_SPARE_B, "0x%x");
152 NVA0C0_QMDV00_06_VAL(qmd, QMD_SPARE_C, "0x%x");
153 NVA0C0_QMDV00_06_VAL(qmd, QMD_SPARE_D, "0x%x");
154 NVA0C0_QMDV00_06_VAL(qmd, QMD_SPARE_E, "0x%x");
155 NVA0C0_QMDV00_06_VAL(qmd, QMD_SPARE_F, "0x%x");
156 NVA0C0_QMDV00_06_VAL(qmd, QMD_SPARE_G, "0x%x");
157 NVA0C0_QMDV00_06_VAL(qmd, QMD_SPARE_H, "0x%x");
158 NVA0C0_QMDV00_06_VAL(qmd, QMD_SPARE_I, "0x%x");
159 NVA0C0_QMDV00_06_VAL(qmd, QMD_SPARE_J, "0x%x");
160 NVA0C0_QMDV00_06_VAL(qmd, QMD_SPARE_K, "0x%x");
161 NVA0C0_QMDV00_06_VAL(qmd, QMD_SPARE_L, "0x%x");
162 NVA0C0_QMDV00_06_VAL(qmd, QMD_SPARE_M, "0x%x");
163 NVA0C0_QMDV00_06_VAL(qmd, QMD_SPARE_N, "0x%x");
164 NVA0C0_QMDV00_06_VAL(qmd, DEBUG_ID_UPPER, "0x%x");
165 NVA0C0_QMDV00_06_VAL(qmd, DEBUG_ID_LOWER, "0x%x");
166 }