Merge branch 'mesa_7_5_branch'
[mesa.git] / src / gallium / drivers / nv04 / nv04_context.c
1 #include "draw/draw_context.h"
2 #include "pipe/p_defines.h"
3 #include "pipe/internal/p_winsys_screen.h"
4
5 #include "nv04_context.h"
6 #include "nv04_screen.h"
7
8 static void
9 nv04_flush(struct pipe_context *pipe, unsigned flags,
10 struct pipe_fence_handle **fence)
11 {
12 struct nv04_context *nv04 = nv04_context(pipe);
13
14 draw_flush(nv04->draw);
15
16 FIRE_RING(fence);
17 }
18
19 static void
20 nv04_destroy(struct pipe_context *pipe)
21 {
22 struct nv04_context *nv04 = nv04_context(pipe);
23
24 if (nv04->draw)
25 draw_destroy(nv04->draw);
26
27 FREE(nv04);
28 }
29
30 static void
31 nv04_set_edgeflags(struct pipe_context *pipe, const unsigned *bitfield)
32 {
33 }
34
35 static boolean
36 nv04_init_hwctx(struct nv04_context *nv04)
37 {
38 // requires a valid handle
39 // BEGIN_RING(fahrenheit, NV04_DX5_TEXTURED_TRIANGLE_NOTIFY, 1);
40 // OUT_RING(0);
41 BEGIN_RING(fahrenheit, NV04_DX5_TEXTURED_TRIANGLE_NOP, 1);
42 OUT_RING(0);
43
44 BEGIN_RING(fahrenheit, NV04_DX5_TEXTURED_TRIANGLE_CONTROL, 1);
45 OUT_RING(0x40182800);
46 // OUT_RING(1<<20/*no cull*/);
47 BEGIN_RING(fahrenheit, NV04_DX5_TEXTURED_TRIANGLE_BLEND, 1);
48 // OUT_RING(0x24|(1<<6)|(1<<8));
49 OUT_RING(0x120001a4);
50 BEGIN_RING(fahrenheit, NV04_DX5_TEXTURED_TRIANGLE_FORMAT, 1);
51 OUT_RING(0x332213a1);
52 BEGIN_RING(fahrenheit, NV04_DX5_TEXTURED_TRIANGLE_FILTER, 1);
53 OUT_RING(0x11001010);
54 BEGIN_RING(fahrenheit, NV04_DX5_TEXTURED_TRIANGLE_COLORKEY, 1);
55 OUT_RING(0x0);
56 // BEGIN_RING(fahrenheit, NV04_DX5_TEXTURED_TRIANGLE_OFFSET, 1);
57 // OUT_RING(SCREEN_OFFSET);
58 BEGIN_RING(fahrenheit, NV04_DX5_TEXTURED_TRIANGLE_FOGCOLOR, 1);
59 OUT_RING(0xff000000);
60
61
62
63 FIRE_RING (NULL);
64 return TRUE;
65 }
66
67 static unsigned int
68 nv04_is_texture_referenced( struct pipe_context *pipe,
69 struct pipe_texture *texture,
70 unsigned face, unsigned level)
71 {
72 /**
73 * FIXME: Optimize.
74 */
75
76 return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE;
77 }
78
79 static unsigned int
80 nv04_is_buffer_referenced( struct pipe_context *pipe,
81 struct pipe_buffer *buf)
82 {
83 /**
84 * FIXME: Optimize.
85 */
86
87 return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE;
88 }
89
90
91 struct pipe_context *
92 nv04_create(struct pipe_screen *pscreen, unsigned pctx_id)
93 {
94 struct nv04_screen *screen = nv04_screen(pscreen);
95 struct pipe_winsys *ws = pscreen->winsys;
96 struct nv04_context *nv04;
97 struct nouveau_winsys *nvws = screen->nvws;
98
99 nv04 = CALLOC(1, sizeof(struct nv04_context));
100 if (!nv04)
101 return NULL;
102 nv04->screen = screen;
103 nv04->pctx_id = pctx_id;
104
105 nv04->nvws = nvws;
106
107 nv04->pipe.winsys = ws;
108 nv04->pipe.screen = pscreen;
109 nv04->pipe.destroy = nv04_destroy;
110 nv04->pipe.set_edgeflags = nv04_set_edgeflags;
111 nv04->pipe.draw_arrays = nv04_draw_arrays;
112 nv04->pipe.draw_elements = nv04_draw_elements;
113 nv04->pipe.clear = nv04_clear;
114 nv04->pipe.flush = nv04_flush;
115
116 nv04->pipe.is_texture_referenced = nv04_is_texture_referenced;
117 nv04->pipe.is_buffer_referenced = nv04_is_buffer_referenced;
118
119 nv04_init_surface_functions(nv04);
120 nv04_init_state_functions(nv04);
121
122 nv04->draw = draw_create();
123 assert(nv04->draw);
124 draw_wide_point_threshold(nv04->draw, 0.0);
125 draw_wide_line_threshold(nv04->draw, 0.0);
126 draw_enable_line_stipple(nv04->draw, FALSE);
127 draw_enable_point_sprites(nv04->draw, FALSE);
128 draw_set_rasterize_stage(nv04->draw, nv04_draw_vbuf_stage(nv04));
129
130 nv04_init_hwctx(nv04);
131
132 return &nv04->pipe;
133 }
134