Merge commit 'origin/gallium-0.1'
[mesa.git] / src / gallium / drivers / nv10 / nv10_prim_vbuf.c
1 /**************************************************************************
2 *
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /**
29 * \file
30 * Build post-transformation, post-clipping vertex buffers and element
31 * lists by hooking into the end of the primitive pipeline and
32 * manipulating the vertex_id field in the vertex headers.
33 *
34 * XXX: work in progress
35 *
36 * \author José Fonseca <jrfonseca@tungstengraphics.com>
37 * \author Keith Whitwell <keith@tungstengraphics.com>
38 */
39
40
41 #include "util/u_debug.h"
42 #include "pipe/p_inlines.h"
43 #include "pipe/internal/p_winsys_screen.h"
44
45 #include "nv10_context.h"
46 #include "nv10_state.h"
47
48 #include "draw/draw_vbuf.h"
49
50 /**
51 * Primitive renderer for nv10.
52 */
53 struct nv10_vbuf_render {
54 struct vbuf_render base;
55
56 struct nv10_context *nv10;
57
58 /** Vertex buffer */
59 struct pipe_buffer* buffer;
60
61 /** Vertex size in bytes */
62 unsigned vertex_size;
63
64 /** Hardware primitive */
65 unsigned hwprim;
66 };
67
68
69 void nv10_vtxbuf_bind( struct nv10_context* nv10 )
70 {
71 int i;
72 for(i = 0; i < 8; i++) {
73 BEGIN_RING(celsius, NV10TCL_VERTEX_ARRAY_ATTRIB_OFFSET(i), 1);
74 OUT_RING(0/*nv10->vtxbuf*/);
75 BEGIN_RING(celsius, NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT(i) ,1);
76 OUT_RING(0/*XXX*/);
77 }
78 }
79
80 /**
81 * Basically a cast wrapper.
82 */
83 static INLINE struct nv10_vbuf_render *
84 nv10_vbuf_render( struct vbuf_render *render )
85 {
86 assert(render);
87 return (struct nv10_vbuf_render *)render;
88 }
89
90
91 static const struct vertex_info *
92 nv10_vbuf_render_get_vertex_info( struct vbuf_render *render )
93 {
94 struct nv10_vbuf_render *nv10_render = nv10_vbuf_render(render);
95 struct nv10_context *nv10 = nv10_render->nv10;
96
97 nv10_emit_hw_state(nv10);
98
99 return &nv10->vertex_info;
100 }
101
102 static boolean
103 nv10_vbuf_render_allocate_vertices( struct vbuf_render *render,
104 ushort vertex_size,
105 ushort nr_vertices )
106 {
107 struct nv10_vbuf_render *nv10_render = nv10_vbuf_render(render);
108 struct nv10_context *nv10 = nv10_render->nv10;
109 struct pipe_winsys *winsys = nv10->pipe.winsys;
110 size_t size = (size_t)vertex_size * (size_t)nr_vertices;
111
112 assert(!nv10_render->buffer);
113 nv10_render->buffer = winsys->buffer_create(winsys, 64, PIPE_BUFFER_USAGE_VERTEX, size);
114
115 nv10->dirty |= NV10_NEW_VTXARRAYS;
116
117 if (nv10_render->buffer)
118 return FALSE;
119 return TRUE;
120 }
121
122 static void *
123 nv10_vbuf_render_map_vertices( struct vbuf_render *render )
124 {
125 struct nv10_vbuf_render *nv10_render = nv10_vbuf_render(render);
126 struct nv10_context *nv10 = nv10_render->nv10;
127 struct pipe_winsys *winsys = nv10->pipe.winsys;
128
129 return winsys->buffer_map(winsys,
130 nv10_render->buffer,
131 PIPE_BUFFER_USAGE_CPU_WRITE);
132 }
133
134 static void
135 nv10_vbuf_render_unmap_vertices( struct vbuf_render *render,
136 ushort min_index,
137 ushort max_index )
138 {
139 struct nv10_vbuf_render *nv10_render = nv10_vbuf_render(render);
140 struct nv10_context *nv10 = nv10_render->nv10;
141 struct pipe_winsys *winsys = nv10->pipe.winsys;
142
143 assert(!nv10_render->buffer);
144 winsys->buffer_unmap(winsys, nv10_render->buffer);
145 }
146
147 static boolean
148 nv10_vbuf_render_set_primitive( struct vbuf_render *render,
149 unsigned prim )
150 {
151 struct nv10_vbuf_render *nv10_render = nv10_vbuf_render(render);
152 unsigned hwp = nvgl_primitive(prim);
153 if (hwp == 0)
154 return FALSE;
155
156 nv10_render->hwprim = hwp;
157 return TRUE;
158 }
159
160
161 static void
162 nv10_vbuf_render_draw( struct vbuf_render *render,
163 const ushort *indices,
164 uint nr_indices)
165 {
166 struct nv10_vbuf_render *nv10_render = nv10_vbuf_render(render);
167 struct nv10_context *nv10 = nv10_render->nv10;
168 int push, i;
169
170 nv10_emit_hw_state(nv10);
171
172 BEGIN_RING(celsius, NV10TCL_VERTEX_ARRAY_OFFSET_POS, 1);
173 OUT_RELOCl(nv10_render->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD);
174
175 BEGIN_RING(celsius, NV10TCL_VERTEX_BUFFER_BEGIN_END, 1);
176 OUT_RING(nv10_render->hwprim);
177
178 if (nr_indices & 1) {
179 BEGIN_RING(celsius, NV10TCL_VB_ELEMENT_U32, 1);
180 OUT_RING (indices[0]);
181 indices++; nr_indices--;
182 }
183
184 while (nr_indices) {
185 // XXX too big/small ? check the size
186 push = MIN2(nr_indices, 1200 * 2);
187
188 BEGIN_RING_NI(celsius, NV10TCL_VB_ELEMENT_U16, push >> 1);
189 for (i = 0; i < push; i+=2)
190 OUT_RING((indices[i+1] << 16) | indices[i]);
191
192 nr_indices -= push;
193 indices += push;
194 }
195
196 BEGIN_RING(celsius, NV10TCL_VERTEX_BUFFER_BEGIN_END, 1);
197 OUT_RING (0);
198 }
199
200
201 static void
202 nv10_vbuf_render_release_vertices( struct vbuf_render *render )
203 {
204 struct nv10_vbuf_render *nv10_render = nv10_vbuf_render(render);
205 struct nv10_context *nv10 = nv10_render->nv10;
206 struct pipe_screen *pscreen = &nv10->screen->pipe;
207
208 assert(nv10_render->buffer);
209 pipe_buffer_reference(pscreen, &nv10_render->buffer, NULL);
210 }
211
212
213 static void
214 nv10_vbuf_render_destroy( struct vbuf_render *render )
215 {
216 struct nv10_vbuf_render *nv10_render = nv10_vbuf_render(render);
217 FREE(nv10_render);
218 }
219
220
221 /**
222 * Create a new primitive render.
223 */
224 static struct vbuf_render *
225 nv10_vbuf_render_create( struct nv10_context *nv10 )
226 {
227 struct nv10_vbuf_render *nv10_render = CALLOC_STRUCT(nv10_vbuf_render);
228
229 nv10_render->nv10 = nv10;
230
231 nv10_render->base.max_vertex_buffer_bytes = 16*1024;
232 nv10_render->base.max_indices = 1024;
233 nv10_render->base.get_vertex_info = nv10_vbuf_render_get_vertex_info;
234 nv10_render->base.allocate_vertices = nv10_vbuf_render_allocate_vertices;
235 nv10_render->base.map_vertices = nv10_vbuf_render_map_vertices;
236 nv10_render->base.unmap_vertices = nv10_vbuf_render_unmap_vertices;
237 nv10_render->base.set_primitive = nv10_vbuf_render_set_primitive;
238 nv10_render->base.draw = nv10_vbuf_render_draw;
239 nv10_render->base.release_vertices = nv10_vbuf_render_release_vertices;
240 nv10_render->base.destroy = nv10_vbuf_render_destroy;
241
242 return &nv10_render->base;
243 }
244
245
246 /**
247 * Create a new primitive vbuf/render stage.
248 */
249 struct draw_stage *nv10_draw_vbuf_stage( struct nv10_context *nv10 )
250 {
251 struct vbuf_render *render;
252 struct draw_stage *stage;
253
254 render = nv10_vbuf_render_create(nv10);
255 if(!render)
256 return NULL;
257
258 stage = draw_vbuf_stage( nv10->draw, render );
259 if(!stage) {
260 render->destroy(render);
261 return NULL;
262 }
263
264 return stage;
265 }