src/gallium/drivers/nv10/nv10_state.c

   1 #include "pipe/p_state.h"
   2 #include "pipe/p_defines.h"
   3 #include "pipe/p_util.h"
   4 #include "pipe/p_shader_tokens.h"
   5
   6
   7 #include "nv10_context.h"
   8 #include "nv10_state.h"
   9
  10 static void nv10_vertex_layout(struct pipe_context* pipe)
  11 {
  12         struct nv10_context *nv10 = nv10_context(pipe);
  13         struct nv10_fragment_program *fp = nv10->fragprog.current;
  14         uint32_t src = 0;
  15         int i;
  16         struct vertex_info vinfo;
  17
  18         memset(&vinfo, 0, sizeof(vinfo));
  19
  20         for (i = 0; i < fp->info.num_inputs; i++) {
  21                 switch (fp->info.input_semantic_name[i]) {
  22                         case TGSI_SEMANTIC_POSITION:
  23                                 draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_LINEAR, src++);
  24                                 break;
  25                         case TGSI_SEMANTIC_COLOR:
  26                                 draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_LINEAR, src++);
  27                                 break;
  28                         default:
  29                         case TGSI_SEMANTIC_GENERIC:
  30                                 draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_PERSPECTIVE, src++);
  31                                 break;
  32                         case TGSI_SEMANTIC_FOG:
  33                                 draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_PERSPECTIVE, src++);
  34                                 break;
  35                 }
  36         }
  37         draw_compute_vertex_size(&vinfo);
  38 }
  39
  40 static void *
  41 nv10_blend_state_create(struct pipe_context *pipe,
  42                         const struct pipe_blend_state *cso)
  43 {
  44         struct nv10_blend_state *cb;
  45
  46         cb = malloc(sizeof(struct nv10_blend_state));
  47
  48         cb->b_enable = cso->blend_enable ? 1 : 0;
  49         cb->b_srcfunc = ((nvgl_blend_func(cso->alpha_src_factor)<<16) |
  50                          (nvgl_blend_func(cso->rgb_src_factor)));
  51         cb->b_dstfunc = ((nvgl_blend_func(cso->alpha_dst_factor)<<16) |
  52                          (nvgl_blend_func(cso->rgb_dst_factor)));
  53
  54         cb->c_mask = (((cso->colormask & PIPE_MASK_A) ? (0x01<<24) : 0) |
  55                       ((cso->colormask & PIPE_MASK_R) ? (0x01<<16) : 0) |
  56                       ((cso->colormask & PIPE_MASK_G) ? (0x01<< 8) : 0) |
  57                       ((cso->colormask & PIPE_MASK_B) ? (0x01<< 0) : 0));
  58
  59         cb->d_enable = cso->dither ? 1 : 0;
  60
  61         return (void *)cb;
  62 }
  63
  64 static void
  65 nv10_blend_state_bind(struct pipe_context *pipe, void *hwcso)
  66 {
  67         struct nv10_context *nv10 = nv10_context(pipe);
  68         struct nv10_blend_state *cb = hwcso;
  69
  70         BEGIN_RING(celsius, NV10TCL_DITHER_ENABLE, 1);
  71         OUT_RING  (cb->d_enable);
  72
  73         BEGIN_RING(celsius, NV10TCL_BLEND_FUNC_ENABLE, 3);
  74         OUT_RING  (cb->b_enable);
  75         OUT_RING  (cb->b_srcfunc);
  76         OUT_RING  (cb->b_dstfunc);
  77
  78         BEGIN_RING(celsius, NV10TCL_COLOR_MASK, 1);
  79         OUT_RING  (cb->c_mask);
  80 }
  81
  82 static void
  83 nv10_blend_state_delete(struct pipe_context *pipe, void *hwcso)
  84 {
  85         free(hwcso);
  86 }
  87
  88
  89 static INLINE unsigned
  90 wrap_mode(unsigned wrap) {
  91         unsigned ret;
  92
  93         switch (wrap) {
  94         case PIPE_TEX_WRAP_REPEAT:
  95                 ret = NV10TCL_TX_FORMAT_WRAP_S_REPEAT;
  96                 break;
  97         case PIPE_TEX_WRAP_MIRROR_REPEAT:
  98                 ret = NV10TCL_TX_FORMAT_WRAP_S_MIRRORED_REPEAT;
  99                 break;
 100         case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
 101                 ret = NV10TCL_TX_FORMAT_WRAP_S_CLAMP_TO_EDGE;
 102                 break;
 103         case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
 104                 ret = NV10TCL_TX_FORMAT_WRAP_S_CLAMP_TO_BORDER;
 105                 break;
 106         case PIPE_TEX_WRAP_CLAMP:
 107                 ret = NV10TCL_TX_FORMAT_WRAP_S_CLAMP;
 108                 break;
 109         case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
 110         case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
 111         case PIPE_TEX_WRAP_MIRROR_CLAMP:
 112         default:
 113                 NOUVEAU_ERR("unknown wrap mode: %d\n", wrap);
 114                 ret = NV10TCL_TX_FORMAT_WRAP_S_REPEAT;
 115                 break;
 116         }
 117
 118         return ret >> NV10TCL_TX_FORMAT_WRAP_S_SHIFT;
 119 }
 120
 121 static void *
 122 nv10_sampler_state_create(struct pipe_context *pipe,
 123                           const struct pipe_sampler_state *cso)
 124 {
 125         struct nv10_sampler_state *ps;
 126         uint32_t filter = 0;
 127
 128         ps = malloc(sizeof(struct nv10_sampler_state));
 129
 130         ps->wrap = ((wrap_mode(cso->wrap_s) << NV10TCL_TX_FORMAT_WRAP_S_SHIFT) |
 131                     (wrap_mode(cso->wrap_t) << NV10TCL_TX_FORMAT_WRAP_T_SHIFT));
 132
 133         ps->en = 0;
 134         if (cso->max_anisotropy > 1.0) {
 135                 /* no idea, binary driver sets it, works without it.. meh.. */
 136                 ps->wrap |= (1 << 5);
 137
 138 /*              if (cso->max_anisotropy >= 16.0) {
 139                         ps->en |= NV10TCL_TX_ENABLE_ANISO_16X;
 140                 } else
 141                 if (cso->max_anisotropy >= 12.0) {
 142                         ps->en |= NV10TCL_TX_ENABLE_ANISO_12X;
 143                 } else
 144                 if (cso->max_anisotropy >= 10.0) {
 145                         ps->en |= NV10TCL_TX_ENABLE_ANISO_10X;
 146                 } else
 147                 if (cso->max_anisotropy >= 8.0) {
 148                         ps->en |= NV10TCL_TX_ENABLE_ANISO_8X;
 149                 } else
 150                 if (cso->max_anisotropy >= 6.0) {
 151                         ps->en |= NV10TCL_TX_ENABLE_ANISO_6X;
 152                 } else
 153                 if (cso->max_anisotropy >= 4.0) {
 154                         ps->en |= NV10TCL_TX_ENABLE_ANISO_4X;
 155                 } else {
 156                         ps->en |= NV10TCL_TX_ENABLE_ANISO_2X;
 157                 }*/
 158         }
 159
 160         switch (cso->mag_img_filter) {
 161         case PIPE_TEX_FILTER_LINEAR:
 162                 filter |= NV10TCL_TX_FILTER_MAGNIFY_LINEAR;
 163                 break;
 164         case PIPE_TEX_FILTER_NEAREST:
 165         default:
 166                 filter |= NV10TCL_TX_FILTER_MAGNIFY_NEAREST;
 167                 break;
 168         }
 169
 170         switch (cso->min_img_filter) {
 171         case PIPE_TEX_FILTER_LINEAR:
 172                 switch (cso->min_mip_filter) {
 173                 case PIPE_TEX_MIPFILTER_NEAREST:
 174                         filter |= NV10TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST;
 175                         break;
 176                 case PIPE_TEX_MIPFILTER_LINEAR:
 177                         filter |= NV10TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR;
 178                         break;
 179                 case PIPE_TEX_MIPFILTER_NONE:
 180                 default:
 181                         filter |= NV10TCL_TX_FILTER_MINIFY_LINEAR;
 182                         break;
 183                 }
 184                 break;
 185         case PIPE_TEX_FILTER_NEAREST:
 186         default:
 187                 switch (cso->min_mip_filter) {
 188                 case PIPE_TEX_MIPFILTER_NEAREST:
 189                         filter |= NV10TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST;
 190                 break;
 191                 case PIPE_TEX_MIPFILTER_LINEAR:
 192                         filter |= NV10TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR;
 193                         break;
 194                 case PIPE_TEX_MIPFILTER_NONE:
 195                 default:
 196                         filter |= NV10TCL_TX_FILTER_MINIFY_NEAREST;
 197                         break;
 198                 }
 199                 break;
 200         }
 201
 202         ps->filt = filter;
 203
 204 /*      if (cso->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) {
 205                 switch (cso->compare_func) {
 206                 case PIPE_FUNC_NEVER:
 207                         ps->wrap |= NV10TCL_TX_WRAP_RCOMP_NEVER;
 208                         break;
 209                 case PIPE_FUNC_GREATER:
 210                         ps->wrap |= NV10TCL_TX_WRAP_RCOMP_GREATER;
 211                         break;
 212                 case PIPE_FUNC_EQUAL:
 213                         ps->wrap |= NV10TCL_TX_WRAP_RCOMP_EQUAL;
 214                         break;
 215                 case PIPE_FUNC_GEQUAL:
 216                         ps->wrap |= NV10TCL_TX_WRAP_RCOMP_GEQUAL;
 217                         break;
 218                 case PIPE_FUNC_LESS:
 219                         ps->wrap |= NV10TCL_TX_WRAP_RCOMP_LESS;
 220                         break;
 221                 case PIPE_FUNC_NOTEQUAL:
 222                         ps->wrap |= NV10TCL_TX_WRAP_RCOMP_NOTEQUAL;
 223                         break;
 224                 case PIPE_FUNC_LEQUAL:
 225                         ps->wrap |= NV10TCL_TX_WRAP_RCOMP_LEQUAL;
 226                         break;
 227                 case PIPE_FUNC_ALWAYS:
 228                         ps->wrap |= NV10TCL_TX_WRAP_RCOMP_ALWAYS;
 229                         break;
 230                 default:
 231                         break;
 232                 }
 233         }*/
 234
 235         ps->bcol = ((float_to_ubyte(cso->border_color[3]) << 24) |
 236                     (float_to_ubyte(cso->border_color[0]) << 16) |
 237                     (float_to_ubyte(cso->border_color[1]) <<  8) |
 238                     (float_to_ubyte(cso->border_color[2]) <<  0));
 239
 240         return (void *)ps;
 241 }
 242
 243 static void
 244 nv10_sampler_state_bind(struct pipe_context *pipe, unsigned nr, void **sampler)
 245 {
 246         struct nv10_context *nv10 = nv10_context(pipe);
 247         unsigned unit;
 248
 249         for (unit = 0; unit < nr; unit++) {
 250                 nv10->tex_sampler[unit] = sampler[unit];
 251                 nv10->dirty_samplers |= (1 << unit);
 252         }
 253 }
 254
 255 static void
 256 nv10_sampler_state_delete(struct pipe_context *pipe, void *hwcso)
 257 {
 258         free(hwcso);
 259 }
 260
 261 static void
 262 nv10_set_sampler_texture(struct pipe_context *pipe, unsigned nr,
 263                          struct pipe_texture **miptree)
 264 {
 265         struct nv10_context *nv10 = nv10_context(pipe);
 266         unsigned unit;
 267
 268         for (unit = 0; unit < nr; unit++) {
 269                 nv10->tex_miptree[unit] = (struct nv10_miptree *)miptree[unit];
 270                 nv10->dirty_samplers |= (1 << unit);
 271         }
 272 }
 273
 274 static void *
 275 nv10_rasterizer_state_create(struct pipe_context *pipe,
 276                              const struct pipe_rasterizer_state *cso)
 277 {
 278         struct nv10_rasterizer_state *rs;
 279         int i;
 280
 281         /*XXX: ignored:
 282          *      light_twoside
 283          *      offset_cw/ccw -nohw
 284          *      scissor
 285          *      point_smooth -nohw
 286          *      multisample
 287          *      offset_units / offset_scale
 288          */
 289         rs = malloc(sizeof(struct nv10_rasterizer_state));
 290
 291         rs->shade_model = cso->flatshade ? 0x1d00 : 0x1d01;
 292
 293         rs->line_width = (unsigned char)(cso->line_width * 8.0) & 0xff;
 294         rs->line_smooth_en = cso->line_smooth ? 1 : 0;
 295
 296         rs->point_size = *(uint32_t*)&cso->point_size;
 297
 298         rs->poly_smooth_en = cso->poly_smooth ? 1 : 0;
 299
 300         if (cso->front_winding == PIPE_WINDING_CCW) {
 301                 rs->front_face = NV10TCL_FRONT_FACE_CCW;
 302                 rs->poly_mode_front = nvgl_polygon_mode(cso->fill_ccw);
 303                 rs->poly_mode_back  = nvgl_polygon_mode(cso->fill_cw);
 304         } else {
 305                 rs->front_face = NV10TCL_FRONT_FACE_CW;
 306                 rs->poly_mode_front = nvgl_polygon_mode(cso->fill_cw);
 307                 rs->poly_mode_back  = nvgl_polygon_mode(cso->fill_ccw);
 308         }
 309
 310         switch (cso->cull_mode) {
 311         case PIPE_WINDING_CCW:
 312                 rs->cull_face_en = 1;
 313                 if (cso->front_winding == PIPE_WINDING_CCW)
 314                         rs->cull_face    = NV10TCL_CULL_FACE_FRONT;
 315                 else
 316                         rs->cull_face    = NV10TCL_CULL_FACE_BACK;
 317                 break;
 318         case PIPE_WINDING_CW:
 319                 rs->cull_face_en = 1;
 320                 if (cso->front_winding == PIPE_WINDING_CW)
 321                         rs->cull_face    = NV10TCL_CULL_FACE_FRONT;
 322                 else
 323                         rs->cull_face    = NV10TCL_CULL_FACE_BACK;
 324                 break;
 325         case PIPE_WINDING_BOTH:
 326                 rs->cull_face_en = 1;
 327                 rs->cull_face    = NV10TCL_CULL_FACE_FRONT_AND_BACK;
 328                 break;
 329         case PIPE_WINDING_NONE:
 330         default:
 331                 rs->cull_face_en = 0;
 332                 rs->cull_face    = 0;
 333                 break;
 334         }
 335
 336         if (cso->point_sprite) {
 337                 rs->point_sprite = (1 << 0);
 338                 for (i = 0; i < 8; i++) {
 339                         if (cso->sprite_coord_mode[i] != PIPE_SPRITE_COORD_NONE)
 340                                 rs->point_sprite |= (1 << (8 + i));
 341                 }
 342         } else {
 343                 rs->point_sprite = 0;
 344         }
 345
 346         return (void *)rs;
 347 }
 348
 349 static void
 350 nv10_rasterizer_state_bind(struct pipe_context *pipe, void *hwcso)
 351 {
 352         struct nv10_context *nv10 = nv10_context(pipe);
 353         struct nv10_rasterizer_state *rs = hwcso;
 354
 355         BEGIN_RING(celsius, NV10TCL_SHADE_MODEL, 2);
 356         OUT_RING  (rs->shade_model);
 357         OUT_RING  (rs->line_width);
 358
 359
 360         BEGIN_RING(celsius, NV10TCL_POINT_SIZE, 1);
 361         OUT_RING  (rs->point_size);
 362
 363         BEGIN_RING(celsius, NV10TCL_POLYGON_MODE_FRONT, 2);
 364         OUT_RING  (rs->poly_mode_front);
 365         OUT_RING  (rs->poly_mode_back);
 366
 367
 368         BEGIN_RING(celsius, NV10TCL_CULL_FACE, 2);
 369         OUT_RING  (rs->cull_face);
 370         OUT_RING  (rs->front_face);
 371
 372         BEGIN_RING(celsius, NV10TCL_LINE_SMOOTH_ENABLE, 2);
 373         OUT_RING  (rs->line_smooth_en);
 374         OUT_RING  (rs->poly_smooth_en);
 375
 376         BEGIN_RING(celsius, NV10TCL_CULL_FACE_ENABLE, 1);
 377         OUT_RING  (rs->cull_face_en);
 378
 379 /*      BEGIN_RING(celsius, NV10TCL_POINT_SPRITE, 1);
 380         OUT_RING  (rs->point_sprite);*/
 381 }
 382
 383 static void
 384 nv10_rasterizer_state_delete(struct pipe_context *pipe, void *hwcso)
 385 {
 386         free(hwcso);
 387 }
 388
 389 static void *
 390 nv10_depth_stencil_alpha_state_create(struct pipe_context *pipe,
 391                         const struct pipe_depth_stencil_alpha_state *cso)
 392 {
 393         struct nv10_depth_stencil_alpha_state *hw;
 394
 395         hw = malloc(sizeof(struct nv10_depth_stencil_alpha_state));
 396
 397         hw->depth.func          = nvgl_comparison_op(cso->depth.func);
 398         hw->depth.write_enable  = cso->depth.writemask ? 1 : 0;
 399         hw->depth.test_enable   = cso->depth.enabled ? 1 : 0;
 400
 401         hw->stencil.enable = cso->stencil[0].enabled ? 1 : 0;
 402         hw->stencil.wmask = cso->stencil[0].write_mask;
 403         hw->stencil.func = nvgl_comparison_op(cso->stencil[0].func);
 404         hw->stencil.ref = cso->stencil[0].ref_value;
 405         hw->stencil.vmask = cso->stencil[0].value_mask;
 406         hw->stencil.fail = nvgl_stencil_op(cso->stencil[0].fail_op);
 407         hw->stencil.zfail = nvgl_stencil_op(cso->stencil[0].zfail_op);
 408         hw->stencil.zpass = nvgl_stencil_op(cso->stencil[0].zpass_op);
 409
 410         hw->alpha.enabled = cso->alpha.enabled ? 1 : 0;
 411         hw->alpha.func = nvgl_comparison_op(cso->alpha.func);
 412         hw->alpha.ref  = float_to_ubyte(cso->alpha.ref);
 413
 414         return (void *)hw;
 415 }
 416
 417 static void
 418 nv10_depth_stencil_alpha_state_bind(struct pipe_context *pipe, void *hwcso)
 419 {
 420         struct nv10_context *nv10 = nv10_context(pipe);
 421         struct nv10_depth_stencil_alpha_state *hw = hwcso;
 422
 423         BEGIN_RING(celsius, NV10TCL_DEPTH_FUNC, 3);
 424         OUT_RINGp ((uint32_t *)&hw->depth, 3);
 425         BEGIN_RING(celsius, NV10TCL_STENCIL_ENABLE, 1);
 426         OUT_RING (hw->stencil.enable);
 427         BEGIN_RING(celsius, NV10TCL_STENCIL_MASK, 7);
 428         OUT_RINGp ((uint32_t *)&(hw->stencil.wmask), 7);
 429         BEGIN_RING(celsius, NV10TCL_ALPHA_FUNC_ENABLE, 3);
 430         OUT_RINGp ((uint32_t *)&hw->alpha.enabled, 3);
 431 }
 432
 433 static void
 434 nv10_depth_stencil_alpha_state_delete(struct pipe_context *pipe, void *hwcso)
 435 {
 436         free(hwcso);
 437 }
 438
 439 static void *
 440 nv10_vp_state_create(struct pipe_context *pipe,
 441                      const struct pipe_shader_state *cso)
 442 {
 443         struct nv10_vertex_program *vp;
 444
 445         vp = CALLOC(1, sizeof(struct nv10_vertex_program));
 446         vp->pipe = cso;
 447
 448         return (void *)vp;
 449 }
 450
 451 static void
 452 nv10_vp_state_bind(struct pipe_context *pipe, void *hwcso)
 453 {
 454         struct nv10_context *nv10 = nv10_context(pipe);
 455         struct nv10_vertex_program *vp = hwcso;
 456
 457         nv10->vertprog.current = vp;
 458         nv10->dirty |= NV10_NEW_VERTPROG;
 459 }
 460
 461 static void
 462 nv10_vp_state_delete(struct pipe_context *pipe, void *hwcso)
 463 {
 464         struct nv10_context *nv10 = nv10_context(pipe);
 465         struct nv10_vertex_program *vp = hwcso;
 466
 467         //nv10_vertprog_destroy(nv10, vp);
 468         free(vp);
 469 }
 470
 471 static void *
 472 nv10_fp_state_create(struct pipe_context *pipe,
 473                      const struct pipe_shader_state *cso)
 474 {
 475         struct nv10_fragment_program *fp;
 476
 477         fp = CALLOC(1, sizeof(struct nv10_fragment_program));
 478         fp->pipe = cso;
 479
 480         tgsi_scan_shader(cso->tokens, &fp->info);
 481
 482         return (void *)fp;
 483 }
 484
 485 static void
 486 nv10_fp_state_bind(struct pipe_context *pipe, void *hwcso)
 487 {
 488         struct nv10_context *nv10 = nv10_context(pipe);
 489         struct nv10_fragment_program *fp = hwcso;
 490
 491         nv10->fragprog.current = fp;
 492         nv10->dirty |= NV10_NEW_FRAGPROG;
 493 }
 494
 495 static void
 496 nv10_fp_state_delete(struct pipe_context *pipe, void *hwcso)
 497 {
 498         struct nv10_context *nv10 = nv10_context(pipe);
 499         struct nv10_fragment_program *fp = hwcso;
 500
 501         nv10_fragprog_destroy(nv10, fp);
 502         free(fp);
 503 }
 504
 505 static void
 506 nv10_set_blend_color(struct pipe_context *pipe,
 507                      const struct pipe_blend_color *bcol)
 508 {
 509         struct nv10_context *nv10 = nv10_context(pipe);
 510
 511         BEGIN_RING(celsius, NV10TCL_BLEND_COLOR, 1);
 512         OUT_RING  ((float_to_ubyte(bcol->color[3]) << 24) |
 513                    (float_to_ubyte(bcol->color[0]) << 16) |
 514                    (float_to_ubyte(bcol->color[1]) <<  8) |
 515                    (float_to_ubyte(bcol->color[2]) <<  0));
 516 }
 517
 518 static void
 519 nv10_set_clip_state(struct pipe_context *pipe,
 520                     const struct pipe_clip_state *clip)
 521 {
 522 }
 523
 524 static void
 525 nv10_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index,
 526                          const struct pipe_constant_buffer *buf )
 527 {
 528         struct nv10_context *nv10 = nv10_context(pipe);
 529
 530         if (shader == PIPE_SHADER_VERTEX) {
 531                 nv10->vertprog.constant_buf = buf->buffer;
 532                 nv10->dirty |= NV10_NEW_VERTPROG;
 533         } else
 534         if (shader == PIPE_SHADER_FRAGMENT) {
 535                 nv10->fragprog.constant_buf = buf->buffer;
 536                 nv10->dirty |= NV10_NEW_FRAGPROG;
 537         }
 538 }
 539
 540 static void
 541 nv10_set_framebuffer_state(struct pipe_context *pipe,
 542                            const struct pipe_framebuffer_state *fb)
 543 {
 544         struct nv10_context *nv10 = nv10_context(pipe);
 545         struct pipe_surface *rt, *zeta;
 546         uint32_t rt_format, w, h;
 547         int i, colour_format = 0, zeta_format = 0;
 548
 549         w = fb->cbufs[0]->width;
 550         h = fb->cbufs[0]->height;
 551         colour_format = fb->cbufs[0]->format;
 552         rt = fb->cbufs[0];
 553
 554         if (fb->zsbuf) {
 555                 if (colour_format) {
 556                         assert(w == fb->zsbuf->width);
 557                         assert(h == fb->zsbuf->height);
 558                 } else {
 559                         w = fb->zsbuf->width;
 560                         h = fb->zsbuf->height;
 561                 }
 562
 563                 zeta_format = fb->zsbuf->format;
 564                 zeta = fb->zsbuf;
 565         }
 566
 567         rt_format = NV10TCL_RT_FORMAT_TYPE_LINEAR;
 568
 569         switch (colour_format) {
 570         case PIPE_FORMAT_A8R8G8B8_UNORM:
 571         case 0:
 572                 rt_format |= NV10TCL_RT_FORMAT_COLOR_A8R8G8B8;
 573                 break;
 574         case PIPE_FORMAT_R5G6B5_UNORM:
 575                 rt_format |= NV10TCL_RT_FORMAT_COLOR_R5G6B5;
 576                 break;
 577         default:
 578                 assert(0);
 579         }
 580
 581         BEGIN_RING(celsius, NV10TCL_RT_PITCH, 1);
 582         OUT_RING  ( (rt->pitch * rt->cpp) | ( (zeta->pitch * zeta->cpp) << 16) );
 583         nv10->rt[0] = rt->buffer;
 584
 585         if (zeta_format)
 586         {
 587                 nv10->zeta = zeta->buffer;
 588         }
 589
 590         BEGIN_RING(celsius, NV10TCL_RT_HORIZ, 3);
 591         OUT_RING  ((w << 16) | 0);
 592         OUT_RING  ((h << 16) | 0);
 593         OUT_RING  (rt_format);
 594         BEGIN_RING(celsius, NV10TCL_VIEWPORT_CLIP_HORIZ(0), 2);
 595         OUT_RING  (((w - 1) << 16) | 0);
 596         OUT_RING  (((h - 1) << 16) | 0);
 597 }
 598
 599 static void
 600 nv10_set_polygon_stipple(struct pipe_context *pipe,
 601                          const struct pipe_poly_stipple *stipple)
 602 {
 603         NOUVEAU_ERR("line stipple hahaha\n");
 604 }
 605
 606 static void
 607 nv10_set_scissor_state(struct pipe_context *pipe,
 608                        const struct pipe_scissor_state *s)
 609 {
 610         struct nv10_context *nv10 = nv10_context(pipe);
 611
 612         // XXX
 613 /*      BEGIN_RING(celsius, NV10TCL_SCISSOR_HORIZ, 2);
 614         OUT_RING  (((s->maxx - s->minx) << 16) | s->minx);
 615         OUT_RING  (((s->maxy - s->miny) << 16) | s->miny);*/
 616 }
 617
 618 static void
 619 nv10_set_viewport_state(struct pipe_context *pipe,
 620                         const struct pipe_viewport_state *vpt)
 621 {
 622         struct nv10_context *nv10 = nv10_context(pipe);
 623
 624 /*      OUT_RINGf (vpt->translate[0]);
 625         OUT_RINGf (vpt->translate[1]);
 626         OUT_RINGf (vpt->translate[2]);
 627         OUT_RINGf (vpt->translate[3]);*/
 628         BEGIN_RING(celsius, NV10TCL_VIEWPORT_SCALE_X, 4);
 629         OUT_RINGf (vpt->scale[0]);
 630         OUT_RINGf (vpt->scale[1]);
 631         OUT_RINGf (vpt->scale[2]);
 632         OUT_RINGf (vpt->scale[3]);
 633 }
 634
 635 static void
 636 nv10_set_vertex_buffers(struct pipe_context *pipe, unsigned count,
 637                         const struct pipe_vertex_buffer *vb)
 638 {
 639         struct nv10_context *nv10 = nv10_context(pipe);
 640
 641         memcpy(nv10->vtxbuf, vb, sizeof(*vb) * count);
 642         nv10->dirty |= NV10_NEW_ARRAYS;
 643 }
 644
 645 static void
 646 nv10_set_vertex_elements(struct pipe_context *pipe, unsigned count,
 647                          const struct pipe_vertex_element *ve)
 648 {
 649         struct nv10_context *nv10 = nv10_context(pipe);
 650
 651         memcpy(nv10->vtxelt, ve, sizeof(*ve) * count);
 652         nv10->dirty |= NV10_NEW_ARRAYS;
 653 }
 654
 655 void
 656 nv10_init_state_functions(struct nv10_context *nv10)
 657 {
 658         nv10->pipe.create_blend_state = nv10_blend_state_create;
 659         nv10->pipe.bind_blend_state = nv10_blend_state_bind;
 660         nv10->pipe.delete_blend_state = nv10_blend_state_delete;
 661
 662         nv10->pipe.create_sampler_state = nv10_sampler_state_create;
 663         nv10->pipe.bind_sampler_states = nv10_sampler_state_bind;
 664         nv10->pipe.delete_sampler_state = nv10_sampler_state_delete;
 665         nv10->pipe.set_sampler_textures = nv10_set_sampler_texture;
 666
 667         nv10->pipe.create_rasterizer_state = nv10_rasterizer_state_create;
 668         nv10->pipe.bind_rasterizer_state = nv10_rasterizer_state_bind;
 669         nv10->pipe.delete_rasterizer_state = nv10_rasterizer_state_delete;
 670
 671         nv10->pipe.create_depth_stencil_alpha_state =
 672                 nv10_depth_stencil_alpha_state_create;
 673         nv10->pipe.bind_depth_stencil_alpha_state =
 674                 nv10_depth_stencil_alpha_state_bind;
 675         nv10->pipe.delete_depth_stencil_alpha_state =
 676                 nv10_depth_stencil_alpha_state_delete;
 677
 678         nv10->pipe.create_vs_state = nv10_vp_state_create;
 679         nv10->pipe.bind_vs_state = nv10_vp_state_bind;
 680         nv10->pipe.delete_vs_state = nv10_vp_state_delete;
 681
 682         nv10->pipe.create_fs_state = nv10_fp_state_create;
 683         nv10->pipe.bind_fs_state = nv10_fp_state_bind;
 684         nv10->pipe.delete_fs_state = nv10_fp_state_delete;
 685
 686         nv10->pipe.set_blend_color = nv10_set_blend_color;
 687         nv10->pipe.set_clip_state = nv10_set_clip_state;
 688         nv10->pipe.set_constant_buffer = nv10_set_constant_buffer;
 689         nv10->pipe.set_framebuffer_state = nv10_set_framebuffer_state;
 690         nv10->pipe.set_polygon_stipple = nv10_set_polygon_stipple;
 691         nv10->pipe.set_scissor_state = nv10_set_scissor_state;
 692         nv10->pipe.set_viewport_state = nv10_set_viewport_state;
 693
 694         nv10->pipe.set_vertex_buffers = nv10_set_vertex_buffers;
 695         nv10->pipe.set_vertex_elements = nv10_set_vertex_elements;
 696 }
 697