src/gallium/drivers/nv20/nv20_state_emit.c

   1 #include "nv20_context.h"
   2 #include "nv20_state.h"
   3 #include "draw/draw_context.h"
   4
   5 static void nv20_state_emit_blend(struct nv20_context* nv20)
   6 {
   7         struct nv20_blend_state *b = nv20->blend;
   8
   9         BEGIN_RING(kelvin, NV20TCL_DITHER_ENABLE, 1);
  10         OUT_RING  (b->d_enable);
  11
  12         BEGIN_RING(kelvin, NV20TCL_BLEND_FUNC_ENABLE, 1);
  13         OUT_RING  (b->b_enable);
  14
  15         BEGIN_RING(kelvin, NV20TCL_BLEND_FUNC_SRC, 2);
  16         OUT_RING  (b->b_srcfunc);
  17         OUT_RING  (b->b_dstfunc);
  18
  19         BEGIN_RING(kelvin, NV20TCL_COLOR_MASK, 1);
  20         OUT_RING  (b->c_mask);
  21 }
  22
  23 static void nv20_state_emit_blend_color(struct nv20_context* nv20)
  24 {
  25         struct pipe_blend_color *c = nv20->blend_color;
  26
  27         BEGIN_RING(kelvin, NV20TCL_BLEND_COLOR, 1);
  28         OUT_RING  ((float_to_ubyte(c->color[3]) << 24)|
  29                    (float_to_ubyte(c->color[0]) << 16)|
  30                    (float_to_ubyte(c->color[1]) << 8) |
  31                    (float_to_ubyte(c->color[2]) << 0));
  32 }
  33
  34 static void nv20_state_emit_rast(struct nv20_context* nv20)
  35 {
  36         struct nv20_rasterizer_state *r = nv20->rast;
  37
  38         BEGIN_RING(kelvin, NV20TCL_SHADE_MODEL, 2);
  39         OUT_RING  (r->shade_model);
  40         OUT_RING  (r->line_width);
  41
  42
  43         BEGIN_RING(kelvin, NV20TCL_POINT_SIZE, 1);
  44         OUT_RING  (r->point_size);
  45
  46         BEGIN_RING(kelvin, NV20TCL_POLYGON_MODE_FRONT, 2);
  47         OUT_RING  (r->poly_mode_front);
  48         OUT_RING  (r->poly_mode_back);
  49
  50
  51         BEGIN_RING(kelvin, NV20TCL_CULL_FACE, 2);
  52         OUT_RING  (r->cull_face);
  53         OUT_RING  (r->front_face);
  54
  55         BEGIN_RING(kelvin, NV20TCL_LINE_SMOOTH_ENABLE, 2);
  56         OUT_RING  (r->line_smooth_en);
  57         OUT_RING  (r->poly_smooth_en);
  58
  59         BEGIN_RING(kelvin, NV20TCL_CULL_FACE_ENABLE, 1);
  60         OUT_RING  (r->cull_face_en);
  61 }
  62
  63 static void nv20_state_emit_dsa(struct nv20_context* nv20)
  64 {
  65         struct nv20_depth_stencil_alpha_state *d = nv20->dsa;
  66
  67         BEGIN_RING(kelvin, NV20TCL_DEPTH_FUNC, 1);
  68         OUT_RING (d->depth.func);
  69
  70         BEGIN_RING(kelvin, NV20TCL_DEPTH_WRITE_ENABLE, 1);
  71         OUT_RING (d->depth.write_enable);
  72
  73         BEGIN_RING(kelvin, NV20TCL_DEPTH_TEST_ENABLE, 1);
  74         OUT_RING (d->depth.test_enable);
  75
  76         BEGIN_RING(kelvin, NV20TCL_DEPTH_UNK17D8, 1);
  77         OUT_RING (1);
  78
  79 #if 0
  80         BEGIN_RING(kelvin, NV20TCL_STENCIL_ENABLE, 1);
  81         OUT_RING (d->stencil.enable);
  82         BEGIN_RING(kelvin, NV20TCL_STENCIL_MASK, 7);
  83         OUT_RINGp ((uint32_t *)&(d->stencil.wmask), 7);
  84 #endif
  85
  86         BEGIN_RING(kelvin, NV20TCL_ALPHA_FUNC_ENABLE, 1);
  87         OUT_RING (d->alpha.enabled);
  88
  89         BEGIN_RING(kelvin, NV20TCL_ALPHA_FUNC_FUNC, 1);
  90         OUT_RING (d->alpha.func);
  91
  92         BEGIN_RING(kelvin, NV20TCL_ALPHA_FUNC_REF, 1);
  93         OUT_RING (d->alpha.ref);
  94 }
  95
  96 static void nv20_state_emit_viewport(struct nv20_context* nv20)
  97 {
  98 }
  99
 100 static void nv20_state_emit_scissor(struct nv20_context* nv20)
 101 {
 102         /* NV20TCL_SCISSOR_* is probably a software method */
 103 /*      struct pipe_scissor_state *s = nv20->scissor;
 104         BEGIN_RING(kelvin, NV20TCL_SCISSOR_HORIZ, 2);
 105         OUT_RING  (((s->maxx - s->minx) << 16) | s->minx);
 106         OUT_RING  (((s->maxy - s->miny) << 16) | s->miny);*/
 107 }
 108
 109 static void nv20_state_emit_framebuffer(struct nv20_context* nv20)
 110 {
 111         struct pipe_framebuffer_state* fb = nv20->framebuffer;
 112         struct pipe_surface *rt, *zeta = NULL;
 113         uint32_t rt_format, w, h;
 114         int colour_format = 0, zeta_format = 0;
 115
 116         w = fb->cbufs[0]->width;
 117         h = fb->cbufs[0]->height;
 118         colour_format = fb->cbufs[0]->format;
 119         rt = fb->cbufs[0];
 120
 121         if (fb->zsbuf) {
 122                 if (colour_format) {
 123                         assert(w == fb->zsbuf->width);
 124                         assert(h == fb->zsbuf->height);
 125                 } else {
 126                         w = fb->zsbuf->width;
 127                         h = fb->zsbuf->height;
 128                 }
 129
 130                 zeta_format = fb->zsbuf->format;
 131                 zeta = fb->zsbuf;
 132         }
 133
 134         rt_format = NV20TCL_RT_FORMAT_TYPE_LINEAR | 0x20;
 135
 136         switch (colour_format) {
 137         case PIPE_FORMAT_A8R8G8B8_UNORM:
 138         case 0:
 139                 rt_format |= NV20TCL_RT_FORMAT_COLOR_A8R8G8B8;
 140                 break;
 141         case PIPE_FORMAT_R5G6B5_UNORM:
 142                 rt_format |= NV20TCL_RT_FORMAT_COLOR_R5G6B5;
 143                 break;
 144         default:
 145                 assert(0);
 146         }
 147
 148         if (zeta) {
 149                 BEGIN_RING(kelvin, NV20TCL_RT_PITCH, 1);
 150                 OUT_RING  (rt->stride | (zeta->stride << 16));
 151         } else {
 152                 BEGIN_RING(kelvin, NV20TCL_RT_PITCH, 1);
 153                 OUT_RING  (rt->stride | (rt->stride << 16));
 154         }
 155
 156         nv20->rt[0] = rt->buffer;
 157
 158         if (zeta_format)
 159         {
 160                 nv20->zeta = zeta->buffer;
 161         }
 162
 163         BEGIN_RING(kelvin, NV20TCL_RT_HORIZ, 3);
 164         OUT_RING  ((w << 16) | 0);
 165         OUT_RING  ((h << 16) | 0); /*NV20TCL_RT_VERT */
 166         OUT_RING  (rt_format); /* NV20TCL_RT_FORMAT */
 167         BEGIN_RING(kelvin, NV20TCL_VIEWPORT_CLIP_HORIZ(0), 2);
 168         OUT_RING  (((w - 1) << 16) | 0);
 169         OUT_RING  (((h - 1) << 16) | 0);
 170 }
 171
 172 static void nv20_vertex_layout(struct nv20_context *nv20)
 173 {
 174         struct nv20_fragment_program *fp = nv20->fragprog.current;
 175         struct draw_context *dc = nv20->draw;
 176         int src;
 177         int i;
 178         struct vertex_info *vinfo = &nv20->vertex_info;
 179         const enum interp_mode colorInterp = INTERP_LINEAR;
 180         boolean colors[2] = { FALSE };
 181         boolean generics[12] = { FALSE };
 182         boolean fog = FALSE;
 183
 184         memset(vinfo, 0, sizeof(*vinfo));
 185
 186         /*
 187          * Assumed NV20 hardware vertex attribute order:
 188          * 0 position, 1 ?, 2 ?, 3 col0,
 189          * 4 col1?, 5 ?, 6 ?, 7 ?,
 190          * 8 ?, 9 tex0, 10 tex1, 11 tex2,
 191          * 12 tex3, 13 ?, 14 ?, 15 ?
 192          * unaccounted: wgh, nor, fog
 193          * There are total 16 attrs.
 194          * vinfo->hwfmt[0] has a used-bit corresponding to each of these.
 195          * relation to TGSI_SEMANTIC_*:
 196          * - POSITION: position (always used)
 197          * - COLOR: col1, col0
 198          * - GENERIC: tex3, tex2, tex1, tex0, normal, weight
 199          * - FOG: fog
 200          */
 201
 202         for (i = 0; i < fp->info.num_inputs; i++) {
 203                 int isn = fp->info.input_semantic_name[i];
 204                 int isi = fp->info.input_semantic_index[i];
 205                 switch (isn) {
 206                 case TGSI_SEMANTIC_POSITION:
 207                         break;
 208                 case TGSI_SEMANTIC_COLOR:
 209                         assert(isi < 2);
 210                         colors[isi] = TRUE;
 211                         break;
 212                 case TGSI_SEMANTIC_GENERIC:
 213                         assert(isi < 12);
 214                         generics[isi] = TRUE;
 215                         break;
 216                 case TGSI_SEMANTIC_FOG:
 217                         fog = TRUE;
 218                         break;
 219                 default:
 220                         assert(0 && "unknown input_semantic_name");
 221                 }
 222         }
 223
 224         /* always do position */ {
 225                 src = draw_find_vs_output(dc, TGSI_SEMANTIC_POSITION, 0);
 226                 draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_LINEAR, src);
 227                 vinfo->hwfmt[0] |= (1 << 0);
 228         }
 229
 230         /* two unnamed generics */
 231         for (i = 4; i < 6; i++) {
 232                 if (!generics[i])
 233                         continue;
 234                 src = draw_find_vs_output(dc, TGSI_SEMANTIC_GENERIC, i);
 235                 draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_PERSPECTIVE, src);
 236                 vinfo->hwfmt[0] |= (1 << (i - 3));
 237         }
 238
 239         if (colors[0]) {
 240                 src = draw_find_vs_output(dc, TGSI_SEMANTIC_COLOR, 0);
 241                 draw_emit_vertex_attr(vinfo, EMIT_4F, colorInterp, src);
 242                 vinfo->hwfmt[0] |= (1 << 3);
 243         }
 244
 245         if (colors[1]) {
 246                 src = draw_find_vs_output(dc, TGSI_SEMANTIC_COLOR, 1);
 247                 draw_emit_vertex_attr(vinfo, EMIT_4F, colorInterp, src);
 248                 vinfo->hwfmt[0] |= (1 << 4);
 249         }
 250
 251         /* four unnamed generics */
 252         for (i = 6; i < 10; i++) {
 253                 if (!generics[i])
 254                         continue;
 255                 src = draw_find_vs_output(dc, TGSI_SEMANTIC_GENERIC, i);
 256                 draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_PERSPECTIVE, src);
 257                 vinfo->hwfmt[0] |= (1 << (i - 1));
 258         }
 259
 260         /* tex0, tex1, tex2, tex3 */
 261         for (i = 0; i < 4; i++) {
 262                 if (!generics[i])
 263                         continue;
 264                 src = draw_find_vs_output(dc, TGSI_SEMANTIC_GENERIC, i);
 265                 draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_PERSPECTIVE, src);
 266                 vinfo->hwfmt[0] |= (1 << (i + 9));
 267         }
 268
 269         /* two unnamed generics */
 270         for (i = 10; i < 12; i++) {
 271                 if (!generics[i])
 272                         continue;
 273                 src = draw_find_vs_output(dc, TGSI_SEMANTIC_GENERIC, i);
 274                 draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_PERSPECTIVE, src);
 275                 vinfo->hwfmt[0] |= (1 << (i + 3));
 276         }
 277
 278         if (fog) {
 279                 src = draw_find_vs_output(dc, TGSI_SEMANTIC_FOG, 0);
 280                 draw_emit_vertex_attr(vinfo, EMIT_1F, INTERP_PERSPECTIVE, src);
 281                 vinfo->hwfmt[0] |= (1 << 15);
 282         }
 283
 284         draw_compute_vertex_size(vinfo);
 285 }
 286
 287 void
 288 nv20_emit_hw_state(struct nv20_context *nv20)
 289 {
 290         int i;
 291
 292         if (nv20->dirty & NV20_NEW_VERTPROG) {
 293                 //nv20_vertprog_bind(nv20, nv20->vertprog.current);
 294                 nv20->dirty &= ~NV20_NEW_VERTPROG;
 295         }
 296
 297         if (nv20->dirty & NV20_NEW_FRAGPROG) {
 298                 nv20_fragprog_bind(nv20, nv20->fragprog.current);
 299                 /*XXX: clear NV20_NEW_FRAGPROG if no new program uploaded */
 300                 nv20->dirty_samplers |= (1<<10);
 301                 nv20->dirty_samplers = 0;
 302         }
 303
 304         if (nv20->dirty_samplers || (nv20->dirty & NV20_NEW_FRAGPROG)) {
 305                 nv20_fragtex_bind(nv20);
 306                 nv20->dirty &= ~NV20_NEW_FRAGPROG;
 307         }
 308
 309         if (nv20->dirty & NV20_NEW_VTXARRAYS) {
 310                 nv20->dirty &= ~NV20_NEW_VTXARRAYS;
 311                 nv20_vertex_layout(nv20);
 312                 nv20_vtxbuf_bind(nv20);
 313         }
 314
 315         if (nv20->dirty & NV20_NEW_BLEND) {
 316                 nv20->dirty &= ~NV20_NEW_BLEND;
 317                 nv20_state_emit_blend(nv20);
 318         }
 319
 320         if (nv20->dirty & NV20_NEW_BLENDCOL) {
 321                 nv20->dirty &= ~NV20_NEW_BLENDCOL;
 322                 nv20_state_emit_blend_color(nv20);
 323         }
 324
 325         if (nv20->dirty & NV20_NEW_RAST) {
 326                 nv20->dirty &= ~NV20_NEW_RAST;
 327                 nv20_state_emit_rast(nv20);
 328         }
 329
 330         if (nv20->dirty & NV20_NEW_DSA) {
 331                 nv20->dirty &= ~NV20_NEW_DSA;
 332                 nv20_state_emit_dsa(nv20);
 333         }
 334
 335         if (nv20->dirty & NV20_NEW_VIEWPORT) {
 336                 nv20->dirty &= ~NV20_NEW_VIEWPORT;
 337                 nv20_state_emit_viewport(nv20);
 338         }
 339
 340         if (nv20->dirty & NV20_NEW_SCISSOR) {
 341                 nv20->dirty &= ~NV20_NEW_SCISSOR;
 342                 nv20_state_emit_scissor(nv20);
 343         }
 344
 345         if (nv20->dirty & NV20_NEW_FRAMEBUFFER) {
 346                 nv20->dirty &= ~NV20_NEW_FRAMEBUFFER;
 347                 nv20_state_emit_framebuffer(nv20);
 348         }
 349
 350         /* Emit relocs for every referenced buffer.
 351          * This is to ensure the bufmgr has an accurate idea of how
 352          * the buffer is used.  This isn't very efficient, but we don't
 353          * seem to take a significant performance hit.  Will be improved
 354          * at some point.  Vertex arrays are emitted by nv20_vbo.c
 355          */
 356
 357         /* Render target */
 358 /* XXX figre out who's who for NV10TCL_DMA_* and fill accordingly
 359  *      BEGIN_RING(kelvin, NV20TCL_DMA_COLOR0, 1);
 360  *      OUT_RELOCo(nv20->rt[0], NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); */
 361         BEGIN_RING(kelvin, NV20TCL_COLOR_OFFSET, 1);
 362         OUT_RELOCl(nv20->rt[0], 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
 363
 364         if (nv20->zeta) {
 365 /* XXX
 366  *              BEGIN_RING(kelvin, NV20TCL_DMA_ZETA, 1);
 367  *              OUT_RELOCo(nv20->zeta, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); */
 368                 BEGIN_RING(kelvin, NV20TCL_ZETA_OFFSET, 1);
 369                 OUT_RELOCl(nv20->zeta, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
 370                 /* XXX for when we allocate LMA on nv17 */
 371 /*              BEGIN_RING(kelvin, NV10TCL_LMA_DEPTH_BUFFER_OFFSET, 1);
 372                 OUT_RELOCl(nv20->zeta + lma_offset);*/
 373         }
 374
 375         /* Vertex buffer */
 376         BEGIN_RING(kelvin, NV20TCL_DMA_VTXBUF0, 1);
 377         OUT_RELOCo(nv20->rt[0], NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
 378         BEGIN_RING(kelvin, NV20TCL_COLOR_OFFSET, 1);
 379         OUT_RELOCl(nv20->rt[0], 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
 380
 381         /* Texture images */
 382         for (i = 0; i < 2; i++) {
 383                 if (!(nv20->fp_samplers & (1 << i)))
 384                         continue;
 385                 BEGIN_RING(kelvin, NV20TCL_TX_OFFSET(i), 1);
 386                 OUT_RELOCl(nv20->tex[i].buffer, 0, NOUVEAU_BO_VRAM |
 387                            NOUVEAU_BO_GART | NOUVEAU_BO_RD);
 388                 BEGIN_RING(kelvin, NV20TCL_TX_FORMAT(i), 1);
 389                 OUT_RELOCd(nv20->tex[i].buffer, nv20->tex[i].format,
 390                            NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD |
 391                            NOUVEAU_BO_OR, NV20TCL_TX_FORMAT_DMA0,
 392                            NV20TCL_TX_FORMAT_DMA1);
 393         }
 394 }
 395