Merge remote branch 'main/master' into radeon-rewrite
[mesa.git] / src / gallium / drivers / nv30 / nv30_fragtex.c
1 #include "nv30_context.h"
2 #include "nouveau/nouveau_util.h"
3
4 #define _(m,tf,ts0x,ts0y,ts0z,ts0w,ts1x,ts1y,ts1z,ts1w) \
5 { \
6 TRUE, \
7 PIPE_FORMAT_##m, \
8 NV34TCL_TX_FORMAT_FORMAT_##tf, \
9 (NV34TCL_TX_SWIZZLE_S0_X_##ts0x | NV34TCL_TX_SWIZZLE_S0_Y_##ts0y | \
10 NV34TCL_TX_SWIZZLE_S0_Z_##ts0z | NV34TCL_TX_SWIZZLE_S0_W_##ts0w | \
11 NV34TCL_TX_SWIZZLE_S1_X_##ts1x | NV34TCL_TX_SWIZZLE_S1_Y_##ts1y | \
12 NV34TCL_TX_SWIZZLE_S1_Z_##ts1z | NV34TCL_TX_SWIZZLE_S1_W_##ts1w) \
13 }
14
15 struct nv30_texture_format {
16 boolean defined;
17 uint pipe;
18 int format;
19 int swizzle;
20 };
21
22 static struct nv30_texture_format
23 nv30_texture_formats[] = {
24 _(A8R8G8B8_UNORM, A8R8G8B8, S1, S1, S1, S1, X, Y, Z, W),
25 _(A1R5G5B5_UNORM, A1R5G5B5, S1, S1, S1, S1, X, Y, Z, W),
26 _(A4R4G4B4_UNORM, A4R4G4B4, S1, S1, S1, S1, X, Y, Z, W),
27 _(R5G6B5_UNORM , R5G6B5 , S1, S1, S1, ONE, X, Y, Z, W),
28 _(L8_UNORM , L8 , S1, S1, S1, ONE, X, X, X, X),
29 _(A8_UNORM , L8 , ZERO, ZERO, ZERO, S1, X, X, X, X),
30 _(I8_UNORM , L8 , S1, S1, S1, S1, X, X, X, X),
31 _(A8L8_UNORM , A8L8 , S1, S1, S1, S1, X, X, X, Y),
32 // _(Z16_UNORM , Z16 , S1, S1, S1, ONE, X, X, X, X),
33 // _(Z24S8_UNORM , Z24 , S1, S1, S1, ONE, X, X, X, X),
34 _(DXT1_RGB , DXT1 , S1, S1, S1, ONE, X, Y, Z, W),
35 _(DXT1_RGBA , DXT1 , S1, S1, S1, S1, X, Y, Z, W),
36 _(DXT3_RGBA , DXT3 , S1, S1, S1, S1, X, Y, Z, W),
37 _(DXT5_RGBA , DXT5 , S1, S1, S1, S1, X, Y, Z, W),
38 {},
39 };
40
41 static struct nv30_texture_format *
42 nv30_fragtex_format(uint pipe_format)
43 {
44 struct nv30_texture_format *tf = nv30_texture_formats;
45 char fs[128];
46
47 while (tf->defined) {
48 if (tf->pipe == pipe_format)
49 return tf;
50 tf++;
51 }
52
53 NOUVEAU_ERR("unknown texture format %s\n", pf_name(pipe_format));
54 return NULL;
55 }
56
57
58 static struct nouveau_stateobj *
59 nv30_fragtex_build(struct nv30_context *nv30, int unit)
60 {
61 struct nv30_sampler_state *ps = nv30->tex_sampler[unit];
62 struct nv30_miptree *nv30mt = nv30->tex_miptree[unit];
63 struct pipe_texture *pt = &nv30mt->base;
64 struct nv30_texture_format *tf;
65 struct nouveau_stateobj *so;
66 uint32_t txf, txs , txp;
67 unsigned tex_flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD;
68
69 tf = nv30_fragtex_format(pt->format);
70 if (!tf)
71 assert(0);
72
73 txf = tf->format;
74 txf |= ((pt->last_level>0) ? NV34TCL_TX_FORMAT_MIPMAP : 0);
75 txf |= log2i(pt->width[0]) << 20;
76 txf |= log2i(pt->height[0]) << 24;
77 txf |= log2i(pt->depth[0]) << 28;
78 txf |= NV34TCL_TX_FORMAT_NO_BORDER | 0x10000;
79
80 switch (pt->target) {
81 case PIPE_TEXTURE_CUBE:
82 txf |= NV34TCL_TX_FORMAT_CUBIC;
83 /* fall-through */
84 case PIPE_TEXTURE_2D:
85 txf |= NV34TCL_TX_FORMAT_DIMS_2D;
86 break;
87 case PIPE_TEXTURE_3D:
88 txf |= NV34TCL_TX_FORMAT_DIMS_3D;
89 break;
90 case PIPE_TEXTURE_1D:
91 txf |= NV34TCL_TX_FORMAT_DIMS_1D;
92 break;
93 default:
94 NOUVEAU_ERR("Unknown target %d\n", pt->target);
95 return NULL;
96 }
97
98 if (!(pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)) {
99 txp = 0;
100 } else {
101 txp = nv30mt->level[0].pitch;
102 txf |= (1<<13) /*FIXME: NV34TCL_TX_FORMAT_LINEAR ? */;
103 }
104
105 txs = tf->swizzle;
106
107 so = so_new(16, 2);
108 so_method(so, nv30->screen->rankine, NV34TCL_TX_OFFSET(unit), 8);
109 so_reloc (so, nv30mt->buffer, 0, tex_flags | NOUVEAU_BO_LOW, 0, 0);
110 so_reloc (so, nv30mt->buffer, txf, tex_flags | NOUVEAU_BO_OR,
111 NV34TCL_TX_FORMAT_DMA0, NV34TCL_TX_FORMAT_DMA1);
112 so_data (so, ps->wrap);
113 so_data (so, NV34TCL_TX_ENABLE_ENABLE | ps->en);
114 so_data (so, txs);
115 so_data (so, ps->filt | 0x2000 /*voodoo*/);
116 so_data (so, (pt->width[0] << NV34TCL_TX_NPOT_SIZE_W_SHIFT) |
117 pt->height[0]);
118 so_data (so, ps->bcol);
119
120 return so;
121 }
122
123 static boolean
124 nv30_fragtex_validate(struct nv30_context *nv30)
125 {
126 struct nv30_fragment_program *fp = nv30->fragprog;
127 struct nv30_state *state = &nv30->state;
128 struct nouveau_stateobj *so;
129 unsigned samplers, unit;
130
131 samplers = state->fp_samplers & ~fp->samplers;
132 while (samplers) {
133 unit = ffs(samplers) - 1;
134 samplers &= ~(1 << unit);
135
136 so = so_new(2, 0);
137 so_method(so, nv30->screen->rankine, NV34TCL_TX_ENABLE(unit), 1);
138 so_data (so, 0);
139 so_ref(so, &nv30->state.hw[NV30_STATE_FRAGTEX0 + unit]);
140 so_ref(NULL, &so);
141 state->dirty |= (1ULL << (NV30_STATE_FRAGTEX0 + unit));
142 }
143
144 samplers = nv30->dirty_samplers & fp->samplers;
145 while (samplers) {
146 unit = ffs(samplers) - 1;
147 samplers &= ~(1 << unit);
148
149 so = nv30_fragtex_build(nv30, unit);
150 so_ref(so, &nv30->state.hw[NV30_STATE_FRAGTEX0 + unit]);
151 so_ref(NULL, &so);
152 state->dirty |= (1ULL << (NV30_STATE_FRAGTEX0 + unit));
153 }
154
155 nv30->state.fp_samplers = fp->samplers;
156 return FALSE;
157 }
158
159 struct nv30_state_entry nv30_state_fragtex = {
160 .validate = nv30_fragtex_validate,
161 .dirty = {
162 .pipe = NV30_NEW_SAMPLER | NV30_NEW_FRAGPROG,
163 .hw = 0
164 }
165 };