src/gallium/drivers/nv30/nv30_state.c

   1 #include "pipe/p_state.h"
   2 #include "pipe/p_defines.h"
   3 #include "pipe/p_util.h"
   4
   5 #include "nv30_context.h"
   6 #include "nv30_state.h"
   7
   8 static void *
   9 nv30_blend_state_create(struct pipe_context *pipe,
  10                         const struct pipe_blend_state *cso)
  11 {
  12         struct nv30_blend_state *cb;
  13
  14         cb = malloc(sizeof(struct nv30_blend_state));
  15
  16         cb->b_enable = cso->blend_enable ? 1 : 0;
  17         cb->b_srcfunc = ((nvgl_blend_func(cso->alpha_src_factor)<<16) |
  18                          (nvgl_blend_func(cso->rgb_src_factor)));
  19         cb->b_dstfunc = ((nvgl_blend_func(cso->alpha_dst_factor)<<16) |
  20                          (nvgl_blend_func(cso->rgb_dst_factor)));
  21         cb->b_eqn = ((nvgl_blend_eqn(cso->alpha_func) << 16) |
  22                      (nvgl_blend_eqn(cso->rgb_func)));
  23
  24         cb->l_enable = cso->logicop_enable ? 1 : 0;
  25         cb->l_op = nvgl_logicop_func(cso->logicop_func);
  26
  27         cb->c_mask = (((cso->colormask & PIPE_MASK_A) ? (0x01<<24) : 0) |
  28                       ((cso->colormask & PIPE_MASK_R) ? (0x01<<16) : 0) |
  29                       ((cso->colormask & PIPE_MASK_G) ? (0x01<< 8) : 0) |
  30                       ((cso->colormask & PIPE_MASK_B) ? (0x01<< 0) : 0));
  31
  32         cb->d_enable = cso->dither ? 1 : 0;
  33
  34         return (void *)cb;
  35 }
  36
  37 static void
  38 nv30_blend_state_bind(struct pipe_context *pipe, void *hwcso)
  39 {
  40         struct nv30_context *nv30 = nv30_context(pipe);
  41         struct nv30_blend_state *cb = hwcso;
  42
  43         BEGIN_RING(rankine, NV34TCL_DITHER_ENABLE, 1);
  44         OUT_RING  (cb->d_enable);
  45
  46         BEGIN_RING(rankine, NV34TCL_BLEND_FUNC_ENABLE, 3);
  47         OUT_RING  (cb->b_enable);
  48         OUT_RING  (cb->b_srcfunc);
  49         OUT_RING  (cb->b_dstfunc);
  50         BEGIN_RING(rankine, NV34TCL_BLEND_FUNC_EQUATION, 1);
  51         OUT_RING  (cb->b_eqn);
  52
  53         BEGIN_RING(rankine, NV34TCL_COLOR_MASK, 1);
  54         OUT_RING  (cb->c_mask);
  55
  56         BEGIN_RING(rankine, NV34TCL_COLOR_LOGIC_OP_ENABLE, 2);
  57         OUT_RING  (cb->l_enable);
  58         OUT_RING  (cb->l_op);
  59 }
  60
  61 static void
  62 nv30_blend_state_delete(struct pipe_context *pipe, void *hwcso)
  63 {
  64         free(hwcso);
  65 }
  66
  67
  68 static INLINE unsigned
  69 wrap_mode(unsigned wrap) {
  70         unsigned ret;
  71
  72         switch (wrap) {
  73         case PIPE_TEX_WRAP_REPEAT:
  74                 ret = NV34TCL_TX_WRAP_S_REPEAT;
  75                 break;
  76         case PIPE_TEX_WRAP_MIRROR_REPEAT:
  77                 ret = NV34TCL_TX_WRAP_S_MIRRORED_REPEAT;
  78                 break;
  79         case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
  80                 ret = NV34TCL_TX_WRAP_S_CLAMP_TO_EDGE;
  81                 break;
  82         case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
  83                 ret = NV34TCL_TX_WRAP_S_CLAMP_TO_BORDER;
  84                 break;
  85         case PIPE_TEX_WRAP_CLAMP:
  86                 ret = NV34TCL_TX_WRAP_S_CLAMP;
  87                 break;
  88 /*      case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
  89                 ret = NV34TCL_TX_WRAP_S_MIRROR_CLAMP_TO_EDGE;
  90                 break;
  91         case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
  92                 ret = NV34TCL_TX_WRAP_S_MIRROR_CLAMP_TO_BORDER;
  93                 break;
  94         case PIPE_TEX_WRAP_MIRROR_CLAMP:
  95                 ret = NV34TCL_TX_WRAP_S_MIRROR_CLAMP;
  96                 break;*/
  97         default:
  98                 NOUVEAU_ERR("unknown wrap mode: %d\n", wrap);
  99                 ret = NV34TCL_TX_WRAP_S_REPEAT;
 100                 break;
 101         }
 102
 103         return ret >> NV34TCL_TX_WRAP_S_SHIFT;
 104 }
 105
 106 static void *
 107 nv30_sampler_state_create(struct pipe_context *pipe,
 108                           const struct pipe_sampler_state *cso)
 109 {
 110         struct nv30_sampler_state *ps;
 111         uint32_t filter = 0;
 112
 113         ps = malloc(sizeof(struct nv30_sampler_state));
 114
 115         ps->fmt = 0;
 116         if (!cso->normalized_coords)
 117                 ps->fmt |= NV34TCL_TX_FORMAT_RECT;
 118
 119         ps->wrap = ((wrap_mode(cso->wrap_s) << NV34TCL_TX_WRAP_S_SHIFT) |
 120                     (wrap_mode(cso->wrap_t) << NV34TCL_TX_WRAP_T_SHIFT) |
 121                     (wrap_mode(cso->wrap_r) << NV34TCL_TX_WRAP_R_SHIFT));
 122
 123         ps->en = 0;
 124         if (cso->max_anisotropy >= 2.0) {
 125                 /* no idea, binary driver sets it, works without it.. meh.. */
 126                 ps->wrap |= (1 << 5);
 127
 128 /*              if (cso->max_anisotropy >= 16.0) {
 129                         ps->en |= NV34TCL_TX_ENABLE_ANISO_16X;
 130                 } else
 131                 if (cso->max_anisotropy >= 12.0) {
 132                         ps->en |= NV34TCL_TX_ENABLE_ANISO_12X;
 133                 } else
 134                 if (cso->max_anisotropy >= 10.0) {
 135                         ps->en |= NV34TCL_TX_ENABLE_ANISO_10X;
 136                 } else
 137                 if (cso->max_anisotropy >= 8.0) {
 138                         ps->en |= NV34TCL_TX_ENABLE_ANISO_8X;
 139                 } else
 140                 if (cso->max_anisotropy >= 6.0) {
 141                         ps->en |= NV34TCL_TX_ENABLE_ANISO_6X;
 142                 } else
 143                 if (cso->max_anisotropy >= 4.0) {
 144                         ps->en |= NV34TCL_TX_ENABLE_ANISO_4X;
 145                 } else {
 146                         ps->en |= NV34TCL_TX_ENABLE_ANISO_2X;
 147                 }*/
 148         }
 149
 150         switch (cso->mag_img_filter) {
 151         case PIPE_TEX_FILTER_LINEAR:
 152                 filter |= NV34TCL_TX_FILTER_MAGNIFY_LINEAR;
 153                 break;
 154         case PIPE_TEX_FILTER_NEAREST:
 155         default:
 156                 filter |= NV34TCL_TX_FILTER_MAGNIFY_NEAREST;
 157                 break;
 158         }
 159
 160         switch (cso->min_img_filter) {
 161         case PIPE_TEX_FILTER_LINEAR:
 162                 switch (cso->min_mip_filter) {
 163                 case PIPE_TEX_MIPFILTER_NEAREST:
 164                         filter |= NV34TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST;
 165                         break;
 166                 case PIPE_TEX_MIPFILTER_LINEAR:
 167                         filter |= NV34TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR;
 168                         break;
 169                 case PIPE_TEX_MIPFILTER_NONE:
 170                 default:
 171                         filter |= NV34TCL_TX_FILTER_MINIFY_LINEAR;
 172                         break;
 173                 }
 174                 break;
 175         case PIPE_TEX_FILTER_NEAREST:
 176         default:
 177                 switch (cso->min_mip_filter) {
 178                 case PIPE_TEX_MIPFILTER_NEAREST:
 179                         filter |= NV34TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST;
 180                 break;
 181                 case PIPE_TEX_MIPFILTER_LINEAR:
 182                         filter |= NV34TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR;
 183                         break;
 184                 case PIPE_TEX_MIPFILTER_NONE:
 185                 default:
 186                         filter |= NV34TCL_TX_FILTER_MINIFY_NEAREST;
 187                         break;
 188                 }
 189                 break;
 190         }
 191
 192         ps->filt = filter;
 193
 194 /*      if (cso->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) {
 195                 switch (cso->compare_func) {
 196                 case PIPE_FUNC_NEVER:
 197                         ps->wrap |= NV34TCL_TX_WRAP_RCOMP_NEVER;
 198                         break;
 199                 case PIPE_FUNC_GREATER:
 200                         ps->wrap |= NV34TCL_TX_WRAP_RCOMP_GREATER;
 201                         break;
 202                 case PIPE_FUNC_EQUAL:
 203                         ps->wrap |= NV34TCL_TX_WRAP_RCOMP_EQUAL;
 204                         break;
 205                 case PIPE_FUNC_GEQUAL:
 206                         ps->wrap |= NV34TCL_TX_WRAP_RCOMP_GEQUAL;
 207                         break;
 208                 case PIPE_FUNC_LESS:
 209                         ps->wrap |= NV34TCL_TX_WRAP_RCOMP_LESS;
 210                         break;
 211                 case PIPE_FUNC_NOTEQUAL:
 212                         ps->wrap |= NV34TCL_TX_WRAP_RCOMP_NOTEQUAL;
 213                         break;
 214                 case PIPE_FUNC_LEQUAL:
 215                         ps->wrap |= NV34TCL_TX_WRAP_RCOMP_LEQUAL;
 216                         break;
 217                 case PIPE_FUNC_ALWAYS:
 218                         ps->wrap |= NV34TCL_TX_WRAP_RCOMP_ALWAYS;
 219                         break;
 220                 default:
 221                         break;
 222                 }
 223         }*/
 224
 225         ps->bcol = ((float_to_ubyte(cso->border_color[3]) << 24) |
 226                     (float_to_ubyte(cso->border_color[0]) << 16) |
 227                     (float_to_ubyte(cso->border_color[1]) <<  8) |
 228                     (float_to_ubyte(cso->border_color[2]) <<  0));
 229
 230         return (void *)ps;
 231 }
 232
 233 static void
 234 nv30_sampler_state_bind(struct pipe_context *pipe, unsigned unit,
 235                         void *hwcso)
 236 {
 237         struct nv30_context *nv30 = nv30_context(pipe);
 238         struct nv30_sampler_state *ps = hwcso;
 239
 240         nv30->tex_sampler[unit] = ps;
 241         nv30->dirty_samplers |= (1 << unit);
 242 }
 243
 244 static void
 245 nv30_sampler_state_delete(struct pipe_context *pipe, void *hwcso)
 246 {
 247         free(hwcso);
 248 }
 249
 250 static void
 251 nv30_set_sampler_texture(struct pipe_context *pipe, unsigned unit,
 252                          struct pipe_texture *miptree)
 253 {
 254         struct nv30_context *nv30 = nv30_context(pipe);
 255
 256         nv30->tex_miptree[unit] = (struct nv30_miptree *)miptree;
 257         nv30->dirty_samplers |= (1 << unit);
 258 }
 259
 260 static void *
 261 nv30_rasterizer_state_create(struct pipe_context *pipe,
 262                              const struct pipe_rasterizer_state *cso)
 263 {
 264         struct nv30_rasterizer_state *rs;
 265         int i;
 266
 267         /*XXX: ignored:
 268          *      light_twoside
 269          *      offset_cw/ccw -nohw
 270          *      scissor
 271          *      point_smooth -nohw
 272          *      multisample
 273          *      offset_units / offset_scale
 274          */
 275         rs = malloc(sizeof(struct nv30_rasterizer_state));
 276
 277         rs->shade_model = cso->flatshade ? 0x1d00 : 0x1d01;
 278
 279         rs->line_width = (unsigned char)(cso->line_width * 8.0) & 0xff;
 280         rs->line_smooth_en = cso->line_smooth ? 1 : 0;
 281         rs->line_stipple_en = cso->line_stipple_enable ? 1 : 0;
 282         rs->line_stipple = (cso->line_stipple_pattern << 16) |
 283                             cso->line_stipple_factor;
 284
 285         rs->point_size = *(uint32_t*)&cso->point_size;
 286
 287         rs->poly_smooth_en = cso->poly_smooth ? 1 : 0;
 288         rs->poly_stipple_en = cso->poly_stipple_enable ? 1 : 0;
 289
 290         if (cso->front_winding == PIPE_WINDING_CCW) {
 291                 rs->front_face = NV34TCL_FRONT_FACE_CCW;
 292                 rs->poly_mode_front = nvgl_polygon_mode(cso->fill_ccw);
 293                 rs->poly_mode_back  = nvgl_polygon_mode(cso->fill_cw);
 294         } else {
 295                 rs->front_face = NV34TCL_FRONT_FACE_CW;
 296                 rs->poly_mode_front = nvgl_polygon_mode(cso->fill_cw);
 297                 rs->poly_mode_back  = nvgl_polygon_mode(cso->fill_ccw);
 298         }
 299
 300         switch (cso->cull_mode) {
 301         case PIPE_WINDING_CCW:
 302                 rs->cull_face_en = 1;
 303                 if (cso->front_winding == PIPE_WINDING_CCW)
 304                         rs->cull_face    = NV34TCL_CULL_FACE_FRONT;
 305                 else
 306                         rs->cull_face    = NV34TCL_CULL_FACE_BACK;
 307                 break;
 308         case PIPE_WINDING_CW:
 309                 rs->cull_face_en = 1;
 310                 if (cso->front_winding == PIPE_WINDING_CW)
 311                         rs->cull_face    = NV34TCL_CULL_FACE_FRONT;
 312                 else
 313                         rs->cull_face    = NV34TCL_CULL_FACE_BACK;
 314                 break;
 315         case PIPE_WINDING_BOTH:
 316                 rs->cull_face_en = 1;
 317                 rs->cull_face    = NV34TCL_CULL_FACE_FRONT_AND_BACK;
 318                 break;
 319         case PIPE_WINDING_NONE:
 320         default:
 321                 rs->cull_face_en = 0;
 322                 rs->cull_face    = 0;
 323                 break;
 324         }
 325
 326         if (cso->point_sprite) {
 327                 rs->point_sprite = (1 << 0);
 328                 for (i = 0; i < 8; i++) {
 329                         if (cso->sprite_coord_mode[i] != PIPE_SPRITE_COORD_NONE)
 330                                 rs->point_sprite |= (1 << (8 + i));
 331                 }
 332         } else {
 333                 rs->point_sprite = 0;
 334         }
 335
 336         return (void *)rs;
 337 }
 338
 339 static void
 340 nv30_rasterizer_state_bind(struct pipe_context *pipe, void *hwcso)
 341 {
 342         struct nv30_context *nv30 = nv30_context(pipe);
 343         struct nv30_rasterizer_state *rs = hwcso;
 344
 345         BEGIN_RING(rankine, NV34TCL_SHADE_MODEL, 1);
 346         OUT_RING  (rs->shade_model);
 347
 348         BEGIN_RING(rankine, NV34TCL_LINE_WIDTH, 2);
 349         OUT_RING  (rs->line_width);
 350         OUT_RING  (rs->line_smooth_en);
 351         BEGIN_RING(rankine, NV34TCL_LINE_STIPPLE_ENABLE, 2);
 352         OUT_RING  (rs->line_stipple_en);
 353         OUT_RING  (rs->line_stipple);
 354
 355         BEGIN_RING(rankine, NV34TCL_POINT_SIZE, 1);
 356         OUT_RING  (rs->point_size);
 357
 358         BEGIN_RING(rankine, NV34TCL_POLYGON_MODE_FRONT, 6);
 359         OUT_RING  (rs->poly_mode_front);
 360         OUT_RING  (rs->poly_mode_back);
 361         OUT_RING  (rs->cull_face);
 362         OUT_RING  (rs->front_face);
 363         OUT_RING  (rs->poly_smooth_en);
 364         OUT_RING  (rs->cull_face_en);
 365
 366         BEGIN_RING(rankine, NV34TCL_POLYGON_STIPPLE_ENABLE, 1);
 367         OUT_RING  (rs->poly_stipple_en);
 368
 369         BEGIN_RING(rankine, NV34TCL_POINT_SPRITE, 1);
 370         OUT_RING  (rs->point_sprite);
 371 }
 372
 373 static void
 374 nv30_rasterizer_state_delete(struct pipe_context *pipe, void *hwcso)
 375 {
 376         free(hwcso);
 377 }
 378
 379 static void
 380 nv30_translate_stencil(const struct pipe_depth_stencil_alpha_state *cso,
 381                        unsigned idx, struct nv30_stencil_push *hw)
 382 {
 383         hw->enable = cso->stencil[idx].enabled ? 1 : 0;
 384         hw->wmask = cso->stencil[idx].write_mask;
 385         hw->func = nvgl_comparison_op(cso->stencil[idx].func);
 386         hw->ref = cso->stencil[idx].ref_value;
 387         hw->vmask = cso->stencil[idx].value_mask;
 388         hw->fail = nvgl_stencil_op(cso->stencil[idx].fail_op);
 389         hw->zfail = nvgl_stencil_op(cso->stencil[idx].zfail_op);
 390         hw->zpass = nvgl_stencil_op(cso->stencil[idx].zpass_op);
 391 }
 392
 393 static void *
 394 nv30_depth_stencil_alpha_state_create(struct pipe_context *pipe,
 395                         const struct pipe_depth_stencil_alpha_state *cso)
 396 {
 397         struct nv30_depth_stencil_alpha_state *hw;
 398
 399         hw = malloc(sizeof(struct nv30_depth_stencil_alpha_state));
 400
 401         hw->depth.func          = nvgl_comparison_op(cso->depth.func);
 402         hw->depth.write_enable  = cso->depth.writemask ? 1 : 0;
 403         hw->depth.test_enable   = cso->depth.enabled ? 1 : 0;
 404
 405         nv30_translate_stencil(cso, 0, &hw->stencil.front);
 406         nv30_translate_stencil(cso, 1, &hw->stencil.back);
 407
 408         hw->alpha.enabled = cso->alpha.enabled ? 1 : 0;
 409         hw->alpha.func = nvgl_comparison_op(cso->alpha.func);
 410         hw->alpha.ref  = float_to_ubyte(cso->alpha.ref);
 411
 412         return (void *)hw;
 413 }
 414
 415 static void
 416 nv30_depth_stencil_alpha_state_bind(struct pipe_context *pipe, void *hwcso)
 417 {
 418         struct nv30_context *nv30 = nv30_context(pipe);
 419         struct nv30_depth_stencil_alpha_state *hw = hwcso;
 420
 421         BEGIN_RING(rankine, NV34TCL_DEPTH_FUNC, 3);
 422         OUT_RINGp ((uint32_t *)&hw->depth, 3);
 423         BEGIN_RING(rankine, NV34TCL_STENCIL_BACK_ENABLE, 16);
 424         OUT_RINGp ((uint32_t *)&hw->stencil.back, 8);
 425         OUT_RINGp ((uint32_t *)&hw->stencil.front, 8);
 426         BEGIN_RING(rankine, NV34TCL_ALPHA_FUNC_ENABLE, 3);
 427         OUT_RINGp ((uint32_t *)&hw->alpha.enabled, 3);
 428 }
 429
 430 static void
 431 nv30_depth_stencil_alpha_state_delete(struct pipe_context *pipe, void *hwcso)
 432 {
 433         free(hwcso);
 434 }
 435
 436 static void *
 437 nv30_vp_state_create(struct pipe_context *pipe,
 438                      const struct pipe_shader_state *cso)
 439 {
 440         struct nv30_vertex_program *vp;
 441
 442         vp = CALLOC(1, sizeof(struct nv30_vertex_program));
 443         vp->pipe = cso;
 444
 445         return (void *)vp;
 446 }
 447
 448 static void
 449 nv30_vp_state_bind(struct pipe_context *pipe, void *hwcso)
 450 {
 451         struct nv30_context *nv30 = nv30_context(pipe);
 452         struct nv30_vertex_program *vp = hwcso;
 453
 454         nv30->vertprog.current = vp;
 455         nv30->dirty |= NV30_NEW_VERTPROG;
 456 }
 457
 458 static void
 459 nv30_vp_state_delete(struct pipe_context *pipe, void *hwcso)
 460 {
 461         struct nv30_context *nv30 = nv30_context(pipe);
 462         struct nv30_vertex_program *vp = hwcso;
 463
 464         nv30_vertprog_destroy(nv30, vp);
 465         free(vp);
 466 }
 467
 468 static void *
 469 nv30_fp_state_create(struct pipe_context *pipe,
 470                      const struct pipe_shader_state *cso)
 471 {
 472         struct nv30_fragment_program *fp;
 473
 474         fp = CALLOC(1, sizeof(struct nv30_fragment_program));
 475         fp->pipe = cso;
 476
 477         return (void *)fp;
 478 }
 479
 480 static void
 481 nv30_fp_state_bind(struct pipe_context *pipe, void *hwcso)
 482 {
 483         struct nv30_context *nv30 = nv30_context(pipe);
 484         struct nv30_fragment_program *fp = hwcso;
 485
 486         nv30->fragprog.current = fp;
 487         nv30->dirty |= NV30_NEW_FRAGPROG;
 488 }
 489
 490 static void
 491 nv30_fp_state_delete(struct pipe_context *pipe, void *hwcso)
 492 {
 493         struct nv30_context *nv30 = nv30_context(pipe);
 494         struct nv30_fragment_program *fp = hwcso;
 495
 496         nv30_fragprog_destroy(nv30, fp);
 497         free(fp);
 498 }
 499
 500 static void
 501 nv30_set_blend_color(struct pipe_context *pipe,
 502                      const struct pipe_blend_color *bcol)
 503 {
 504         struct nv30_context *nv30 = nv30_context(pipe);
 505
 506         BEGIN_RING(rankine, NV34TCL_BLEND_FUNC_COLOR, 1);
 507         OUT_RING  ((float_to_ubyte(bcol->color[3]) << 24) |
 508                    (float_to_ubyte(bcol->color[0]) << 16) |
 509                    (float_to_ubyte(bcol->color[1]) <<  8) |
 510                    (float_to_ubyte(bcol->color[2]) <<  0));
 511 }
 512
 513 static void
 514 nv30_set_clip_state(struct pipe_context *pipe,
 515                     const struct pipe_clip_state *clip)
 516 {
 517 }
 518
 519 static void
 520 nv30_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index,
 521                          const struct pipe_constant_buffer *buf )
 522 {
 523         struct nv30_context *nv30 = nv30_context(pipe);
 524
 525         if (shader == PIPE_SHADER_VERTEX) {
 526                 nv30->vertprog.constant_buf = buf->buffer;
 527                 nv30->dirty |= NV30_NEW_VERTPROG;
 528         } else
 529         if (shader == PIPE_SHADER_FRAGMENT) {
 530                 nv30->fragprog.constant_buf = buf->buffer;
 531                 nv30->dirty |= NV30_NEW_FRAGPROG;
 532         }
 533 }
 534
 535 static void
 536 nv30_set_framebuffer_state(struct pipe_context *pipe,
 537                            const struct pipe_framebuffer_state *fb)
 538 {
 539         struct nv30_context *nv30 = nv30_context(pipe);
 540         struct pipe_surface *rt[4], *zeta;
 541         uint32_t rt_enable, rt_format, w, h;
 542         int i, colour_format = 0, zeta_format = 0;
 543
 544         rt_enable = 0;
 545         for (i = 0; i < 4; i++) {
 546                 if (!fb->cbufs[i])
 547                         continue;
 548
 549                 if (colour_format) {
 550                         assert(w == fb->cbufs[i]->width);
 551                         assert(h == fb->cbufs[i]->height);
 552                         assert(colour_format == fb->cbufs[i]->format);
 553                 } else {
 554                         w = fb->cbufs[i]->width;
 555                         h = fb->cbufs[i]->height;
 556                         colour_format = fb->cbufs[i]->format;
 557                         rt_enable |= (NV34TCL_RT_ENABLE_COLOR0 << i);
 558                         rt[i] = fb->cbufs[i];
 559                 }
 560         }
 561
 562         if (rt_enable & (NV34TCL_RT_ENABLE_COLOR1 | NV34TCL_RT_ENABLE_COLOR2 |
 563                          NV34TCL_RT_ENABLE_COLOR3))
 564                 rt_enable |= NV34TCL_RT_ENABLE_MRT;
 565
 566         if (fb->zsbuf) {
 567                 if (colour_format) {
 568                         assert(w == fb->zsbuf->width);
 569                         assert(h == fb->zsbuf->height);
 570                 } else {
 571                         w = fb->zsbuf->width;
 572                         h = fb->zsbuf->height;
 573                 }
 574
 575                 zeta_format = fb->zsbuf->format;
 576                 zeta = fb->zsbuf;
 577         }
 578
 579         rt_format = NV34TCL_RT_FORMAT_TYPE_LINEAR;
 580
 581         switch (colour_format) {
 582         case PIPE_FORMAT_A8R8G8B8_UNORM:
 583         case 0:
 584                 rt_format |= NV34TCL_RT_FORMAT_COLOR_A8R8G8B8;
 585                 break;
 586         case PIPE_FORMAT_R5G6B5_UNORM:
 587                 rt_format |= NV34TCL_RT_FORMAT_COLOR_R5G6B5;
 588                 break;
 589         default:
 590                 assert(0);
 591         }
 592
 593         switch (zeta_format) {
 594         case PIPE_FORMAT_Z16_UNORM:
 595                 rt_format |= NV34TCL_RT_FORMAT_ZETA_Z16;
 596                 break;
 597         case PIPE_FORMAT_Z24S8_UNORM:
 598         case 0:
 599                 rt_format |= NV34TCL_RT_FORMAT_ZETA_Z24S8;
 600                 break;
 601         default:
 602                 assert(0);
 603         }
 604
 605         if (rt_enable & NV34TCL_RT_ENABLE_COLOR0) {
 606                 BEGIN_RING(rankine, NV34TCL_COLOR0_PITCH, 1);
 607                 OUT_RING  ( (rt[0]->pitch * rt[0]->cpp) | ( (zeta->pitch * zeta->cpp) << 16) );
 608                 nv30->rt[0] = rt[0]->buffer;
 609         }
 610
 611         if (rt_enable & NV34TCL_RT_ENABLE_COLOR1) {
 612                 BEGIN_RING(rankine, NV34TCL_COLOR1_PITCH, 2);
 613                 OUT_RING  (rt[1]->pitch * rt[1]->cpp);
 614                 nv30->rt[1] = rt[1]->buffer;
 615         }
 616
 617         if (zeta_format)
 618         {
 619                 nv30->zeta = zeta->buffer;
 620         }
 621
 622         nv30->rt_enable = rt_enable;
 623         BEGIN_RING(rankine, NV34TCL_RT_ENABLE, 1);
 624         OUT_RING  (rt_enable);
 625         BEGIN_RING(rankine, NV34TCL_RT_HORIZ, 3);
 626         OUT_RING  ((w << 16) | 0);
 627         OUT_RING  ((h << 16) | 0);
 628         OUT_RING  (rt_format);
 629         BEGIN_RING(rankine, NV34TCL_VIEWPORT_HORIZ, 2);
 630         OUT_RING  ((w << 16) | 0);
 631         OUT_RING  ((h << 16) | 0);
 632         BEGIN_RING(rankine, NV34TCL_VIEWPORT_CLIP_HORIZ(0), 2);
 633         OUT_RING  (((w - 1) << 16) | 0);
 634         OUT_RING  (((h - 1) << 16) | 0);
 635 }
 636
 637 static void
 638 nv30_set_polygon_stipple(struct pipe_context *pipe,
 639                          const struct pipe_poly_stipple *stipple)
 640 {
 641         struct nv30_context *nv30 = nv30_context(pipe);
 642
 643         BEGIN_RING(rankine, NV34TCL_POLYGON_STIPPLE_PATTERN(0), 32);
 644         OUT_RINGp ((uint32_t *)stipple->stipple, 32);
 645 }
 646
 647 static void
 648 nv30_set_scissor_state(struct pipe_context *pipe,
 649                        const struct pipe_scissor_state *s)
 650 {
 651         struct nv30_context *nv30 = nv30_context(pipe);
 652
 653         BEGIN_RING(rankine, NV34TCL_SCISSOR_HORIZ, 2);
 654         OUT_RING  (((s->maxx - s->minx) << 16) | s->minx);
 655         OUT_RING  (((s->maxy - s->miny) << 16) | s->miny);
 656 }
 657
 658 static void
 659 nv30_set_viewport_state(struct pipe_context *pipe,
 660                         const struct pipe_viewport_state *vpt)
 661 {
 662         struct nv30_context *nv30 = nv30_context(pipe);
 663
 664         BEGIN_RING(rankine, NV34TCL_VIEWPORT_TRANSLATE_X, 8);
 665         OUT_RINGf (vpt->translate[0]);
 666         OUT_RINGf (vpt->translate[1]);
 667         OUT_RINGf (vpt->translate[2]);
 668         OUT_RINGf (vpt->translate[3]);
 669         OUT_RINGf (vpt->scale[0]);
 670         OUT_RINGf (vpt->scale[1]);
 671         OUT_RINGf (vpt->scale[2]);
 672         OUT_RINGf (vpt->scale[3]);
 673 }
 674
 675 static void
 676 nv30_set_vertex_buffer(struct pipe_context *pipe, unsigned index,
 677                        const struct pipe_vertex_buffer *vb)
 678 {
 679         struct nv30_context *nv30 = nv30_context(pipe);
 680
 681         nv30->vtxbuf[index] = *vb;
 682
 683         nv30->dirty |= NV30_NEW_ARRAYS;
 684 }
 685
 686 static void
 687 nv30_set_vertex_element(struct pipe_context *pipe, unsigned index,
 688                         const struct pipe_vertex_element *ve)
 689 {
 690         struct nv30_context *nv30 = nv30_context(pipe);
 691
 692         nv30->vtxelt[index] = *ve;
 693
 694         nv30->dirty |= NV30_NEW_ARRAYS;
 695 }
 696
 697 void
 698 nv30_init_state_functions(struct nv30_context *nv30)
 699 {
 700         nv30->pipe.create_blend_state = nv30_blend_state_create;
 701         nv30->pipe.bind_blend_state = nv30_blend_state_bind;
 702         nv30->pipe.delete_blend_state = nv30_blend_state_delete;
 703
 704         nv30->pipe.create_sampler_state = nv30_sampler_state_create;
 705         nv30->pipe.bind_sampler_state = nv30_sampler_state_bind;
 706         nv30->pipe.delete_sampler_state = nv30_sampler_state_delete;
 707         nv30->pipe.set_sampler_texture = nv30_set_sampler_texture;
 708
 709         nv30->pipe.create_rasterizer_state = nv30_rasterizer_state_create;
 710         nv30->pipe.bind_rasterizer_state = nv30_rasterizer_state_bind;
 711         nv30->pipe.delete_rasterizer_state = nv30_rasterizer_state_delete;
 712
 713         nv30->pipe.create_depth_stencil_alpha_state =
 714                 nv30_depth_stencil_alpha_state_create;
 715         nv30->pipe.bind_depth_stencil_alpha_state =
 716                 nv30_depth_stencil_alpha_state_bind;
 717         nv30->pipe.delete_depth_stencil_alpha_state =
 718                 nv30_depth_stencil_alpha_state_delete;
 719
 720         nv30->pipe.create_vs_state = nv30_vp_state_create;
 721         nv30->pipe.bind_vs_state = nv30_vp_state_bind;
 722         nv30->pipe.delete_vs_state = nv30_vp_state_delete;
 723
 724         nv30->pipe.create_fs_state = nv30_fp_state_create;
 725         nv30->pipe.bind_fs_state = nv30_fp_state_bind;
 726         nv30->pipe.delete_fs_state = nv30_fp_state_delete;
 727
 728         nv30->pipe.set_blend_color = nv30_set_blend_color;
 729         nv30->pipe.set_clip_state = nv30_set_clip_state;
 730         nv30->pipe.set_constant_buffer = nv30_set_constant_buffer;
 731         nv30->pipe.set_framebuffer_state = nv30_set_framebuffer_state;
 732         nv30->pipe.set_polygon_stipple = nv30_set_polygon_stipple;
 733         nv30->pipe.set_scissor_state = nv30_set_scissor_state;
 734         nv30->pipe.set_viewport_state = nv30_set_viewport_state;
 735
 736         nv30->pipe.set_vertex_buffer = nv30_set_vertex_buffer;
 737         nv30->pipe.set_vertex_element = nv30_set_vertex_element;
 738 }
 739