1 #include "pipe/p_state.h"
2 #include "pipe/p_defines.h"
3 #include "util/u_inlines.h"
5 #include "tgsi/tgsi_parse.h"
7 #include "nv30_context.h"
8 #include "nv30_state.h"
11 nv30_blend_state_create(struct pipe_context
*pipe
,
12 const struct pipe_blend_state
*cso
)
14 struct nv30_context
*nv30
= nv30_context(pipe
);
15 struct nouveau_grobj
*rankine
= nv30
->screen
->rankine
;
16 struct nv30_blend_state
*bso
= CALLOC(1, sizeof(*bso
));
17 struct nouveau_stateobj
*so
= so_new(5, 8, 0);
19 if (cso
->rt
[0].blend_enable
) {
20 so_method(so
, rankine
, NV34TCL_BLEND_FUNC_ENABLE
, 3);
22 so_data (so
, (nvgl_blend_func(cso
->rt
[0].alpha_src_factor
) << 16) |
23 nvgl_blend_func(cso
->rt
[0].rgb_src_factor
));
24 so_data (so
, nvgl_blend_func(cso
->rt
[0].alpha_dst_factor
) << 16 |
25 nvgl_blend_func(cso
->rt
[0].rgb_dst_factor
));
26 /* FIXME: Gallium assumes GL_EXT_blend_func_separate.
27 It is not the case for NV30 */
28 so_method(so
, rankine
, NV34TCL_BLEND_EQUATION
, 1);
29 so_data (so
, nvgl_blend_eqn(cso
->rt
[0].rgb_func
));
31 so_method(so
, rankine
, NV34TCL_BLEND_FUNC_ENABLE
, 1);
35 so_method(so
, rankine
, NV34TCL_COLOR_MASK
, 1);
36 so_data (so
, (((cso
->rt
[0].colormask
& PIPE_MASK_A
) ? (0x01 << 24) : 0) |
37 ((cso
->rt
[0].colormask
& PIPE_MASK_R
) ? (0x01 << 16) : 0) |
38 ((cso
->rt
[0].colormask
& PIPE_MASK_G
) ? (0x01 << 8) : 0) |
39 ((cso
->rt
[0].colormask
& PIPE_MASK_B
) ? (0x01 << 0) : 0)));
41 if (cso
->logicop_enable
) {
42 so_method(so
, rankine
, NV34TCL_COLOR_LOGIC_OP_ENABLE
, 2);
44 so_data (so
, nvgl_logicop_func(cso
->logicop_func
));
46 so_method(so
, rankine
, NV34TCL_COLOR_LOGIC_OP_ENABLE
, 1);
50 so_method(so
, rankine
, NV34TCL_DITHER_ENABLE
, 1);
51 so_data (so
, cso
->dither
? 1 : 0);
60 nv30_blend_state_bind(struct pipe_context
*pipe
, void *hwcso
)
62 struct nv30_context
*nv30
= nv30_context(pipe
);
65 nv30
->dirty
|= NV30_NEW_BLEND
;
69 nv30_blend_state_delete(struct pipe_context
*pipe
, void *hwcso
)
71 struct nv30_blend_state
*bso
= hwcso
;
73 so_ref(NULL
, &bso
->so
);
78 static INLINE
unsigned
79 wrap_mode(unsigned wrap
) {
83 case PIPE_TEX_WRAP_REPEAT
:
84 ret
= NV34TCL_TX_WRAP_S_REPEAT
;
86 case PIPE_TEX_WRAP_MIRROR_REPEAT
:
87 ret
= NV34TCL_TX_WRAP_S_MIRRORED_REPEAT
;
89 case PIPE_TEX_WRAP_CLAMP_TO_EDGE
:
90 ret
= NV34TCL_TX_WRAP_S_CLAMP_TO_EDGE
;
92 case PIPE_TEX_WRAP_CLAMP_TO_BORDER
:
93 ret
= NV34TCL_TX_WRAP_S_CLAMP_TO_BORDER
;
95 case PIPE_TEX_WRAP_CLAMP
:
96 ret
= NV34TCL_TX_WRAP_S_CLAMP
;
98 /* case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
99 ret = NV34TCL_TX_WRAP_S_MIRROR_CLAMP_TO_EDGE;
101 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
102 ret = NV34TCL_TX_WRAP_S_MIRROR_CLAMP_TO_BORDER;
104 case PIPE_TEX_WRAP_MIRROR_CLAMP:
105 ret = NV34TCL_TX_WRAP_S_MIRROR_CLAMP;
108 NOUVEAU_ERR("unknown wrap mode: %d\n", wrap
);
109 ret
= NV34TCL_TX_WRAP_S_REPEAT
;
113 return ret
>> NV34TCL_TX_WRAP_S_SHIFT
;
117 nv30_sampler_state_create(struct pipe_context
*pipe
,
118 const struct pipe_sampler_state
*cso
)
120 struct nv30_sampler_state
*ps
;
123 ps
= MALLOC(sizeof(struct nv30_sampler_state
));
126 /* TODO: Not all RECTs formats have this bit set, bits 15-8 of format
127 are the tx format to use. We should store normalized coord flag
128 in sampler state structure, and set appropriate format in
131 /*NV34TCL_TX_FORMAT_RECT*/
132 /*if (!cso->normalized_coords) {
136 ps
->wrap
= ((wrap_mode(cso
->wrap_s
) << NV34TCL_TX_WRAP_S_SHIFT
) |
137 (wrap_mode(cso
->wrap_t
) << NV34TCL_TX_WRAP_T_SHIFT
) |
138 (wrap_mode(cso
->wrap_r
) << NV34TCL_TX_WRAP_R_SHIFT
));
142 if (cso
->max_anisotropy
>= 8) {
143 ps
->en
|= NV34TCL_TX_ENABLE_ANISO_8X
;
145 if (cso
->max_anisotropy
>= 4) {
146 ps
->en
|= NV34TCL_TX_ENABLE_ANISO_4X
;
148 if (cso
->max_anisotropy
>= 2) {
149 ps
->en
|= NV34TCL_TX_ENABLE_ANISO_2X
;
152 switch (cso
->mag_img_filter
) {
153 case PIPE_TEX_FILTER_LINEAR
:
154 filter
|= NV34TCL_TX_FILTER_MAGNIFY_LINEAR
;
156 case PIPE_TEX_FILTER_NEAREST
:
158 filter
|= NV34TCL_TX_FILTER_MAGNIFY_NEAREST
;
162 switch (cso
->min_img_filter
) {
163 case PIPE_TEX_FILTER_LINEAR
:
164 switch (cso
->min_mip_filter
) {
165 case PIPE_TEX_MIPFILTER_NEAREST
:
166 filter
|= NV34TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST
;
168 case PIPE_TEX_MIPFILTER_LINEAR
:
169 filter
|= NV34TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR
;
171 case PIPE_TEX_MIPFILTER_NONE
:
173 filter
|= NV34TCL_TX_FILTER_MINIFY_LINEAR
;
177 case PIPE_TEX_FILTER_NEAREST
:
179 switch (cso
->min_mip_filter
) {
180 case PIPE_TEX_MIPFILTER_NEAREST
:
181 filter
|= NV34TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST
;
183 case PIPE_TEX_MIPFILTER_LINEAR
:
184 filter
|= NV34TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR
;
186 case PIPE_TEX_MIPFILTER_NONE
:
188 filter
|= NV34TCL_TX_FILTER_MINIFY_NEAREST
;
199 limit
= CLAMP(cso
->lod_bias
, -16.0, 15.0);
200 ps
->filt
|= (int)(cso
->lod_bias
* 256.0) & 0x1fff;
202 limit
= CLAMP(cso
->max_lod
, 0.0, 15.0);
203 ps
->en
|= (int)(limit
) << 14 /*NV34TCL_TX_ENABLE_MIPMAP_MAX_LOD_SHIFT*/;
205 limit
= CLAMP(cso
->min_lod
, 0.0, 15.0);
206 ps
->en
|= (int)(limit
) << 26 /*NV34TCL_TX_ENABLE_MIPMAP_MIN_LOD_SHIFT*/;
209 if (cso
->compare_mode
== PIPE_TEX_COMPARE_R_TO_TEXTURE
) {
210 switch (cso
->compare_func
) {
211 case PIPE_FUNC_NEVER
:
212 ps
->wrap
|= NV34TCL_TX_WRAP_RCOMP_NEVER
;
214 case PIPE_FUNC_GREATER
:
215 ps
->wrap
|= NV34TCL_TX_WRAP_RCOMP_GREATER
;
217 case PIPE_FUNC_EQUAL
:
218 ps
->wrap
|= NV34TCL_TX_WRAP_RCOMP_EQUAL
;
220 case PIPE_FUNC_GEQUAL
:
221 ps
->wrap
|= NV34TCL_TX_WRAP_RCOMP_GEQUAL
;
224 ps
->wrap
|= NV34TCL_TX_WRAP_RCOMP_LESS
;
226 case PIPE_FUNC_NOTEQUAL
:
227 ps
->wrap
|= NV34TCL_TX_WRAP_RCOMP_NOTEQUAL
;
229 case PIPE_FUNC_LEQUAL
:
230 ps
->wrap
|= NV34TCL_TX_WRAP_RCOMP_LEQUAL
;
232 case PIPE_FUNC_ALWAYS
:
233 ps
->wrap
|= NV34TCL_TX_WRAP_RCOMP_ALWAYS
;
240 ps
->bcol
= ((float_to_ubyte(cso
->border_color
[3]) << 24) |
241 (float_to_ubyte(cso
->border_color
[0]) << 16) |
242 (float_to_ubyte(cso
->border_color
[1]) << 8) |
243 (float_to_ubyte(cso
->border_color
[2]) << 0));
249 nv30_sampler_state_bind(struct pipe_context
*pipe
, unsigned nr
, void **sampler
)
251 struct nv30_context
*nv30
= nv30_context(pipe
);
254 for (unit
= 0; unit
< nr
; unit
++) {
255 nv30
->tex_sampler
[unit
] = sampler
[unit
];
256 nv30
->dirty_samplers
|= (1 << unit
);
259 for (unit
= nr
; unit
< nv30
->nr_samplers
; unit
++) {
260 nv30
->tex_sampler
[unit
] = NULL
;
261 nv30
->dirty_samplers
|= (1 << unit
);
264 nv30
->nr_samplers
= nr
;
265 nv30
->dirty
|= NV30_NEW_SAMPLER
;
269 nv30_sampler_state_delete(struct pipe_context
*pipe
, void *hwcso
)
275 nv30_set_sampler_texture(struct pipe_context
*pipe
, unsigned nr
,
276 struct pipe_texture
**miptree
)
278 struct nv30_context
*nv30
= nv30_context(pipe
);
281 for (unit
= 0; unit
< nr
; unit
++) {
282 pipe_texture_reference((struct pipe_texture
**)
283 &nv30
->tex_miptree
[unit
], miptree
[unit
]);
284 nv30
->dirty_samplers
|= (1 << unit
);
287 for (unit
= nr
; unit
< nv30
->nr_textures
; unit
++) {
288 pipe_texture_reference((struct pipe_texture
**)
289 &nv30
->tex_miptree
[unit
], NULL
);
290 nv30
->dirty_samplers
|= (1 << unit
);
293 nv30
->nr_textures
= nr
;
294 nv30
->dirty
|= NV30_NEW_SAMPLER
;
298 nv30_rasterizer_state_create(struct pipe_context
*pipe
,
299 const struct pipe_rasterizer_state
*cso
)
301 struct nv30_context
*nv30
= nv30_context(pipe
);
302 struct nv30_rasterizer_state
*rsso
= CALLOC(1, sizeof(*rsso
));
303 struct nouveau_stateobj
*so
= so_new(9, 19, 0);
304 struct nouveau_grobj
*rankine
= nv30
->screen
->rankine
;
312 so_method(so
, rankine
, NV34TCL_SHADE_MODEL
, 1);
313 so_data (so
, cso
->flatshade
? NV34TCL_SHADE_MODEL_FLAT
:
314 NV34TCL_SHADE_MODEL_SMOOTH
);
316 so_method(so
, rankine
, NV34TCL_LINE_WIDTH
, 2);
317 so_data (so
, (unsigned char)(cso
->line_width
* 8.0) & 0xff);
318 so_data (so
, cso
->line_smooth
? 1 : 0);
319 so_method(so
, rankine
, NV34TCL_LINE_STIPPLE_ENABLE
, 2);
320 so_data (so
, cso
->line_stipple_enable
? 1 : 0);
321 so_data (so
, (cso
->line_stipple_pattern
<< 16) |
322 cso
->line_stipple_factor
);
324 so_method(so
, rankine
, NV34TCL_POINT_SIZE
, 1);
325 so_data (so
, fui(cso
->point_size
));
327 so_method(so
, rankine
, NV34TCL_POLYGON_MODE_FRONT
, 6);
328 if (cso
->front_winding
== PIPE_WINDING_CCW
) {
329 so_data(so
, nvgl_polygon_mode(cso
->fill_ccw
));
330 so_data(so
, nvgl_polygon_mode(cso
->fill_cw
));
331 switch (cso
->cull_mode
) {
332 case PIPE_WINDING_CCW
:
333 so_data(so
, NV34TCL_CULL_FACE_FRONT
);
335 case PIPE_WINDING_CW
:
336 so_data(so
, NV34TCL_CULL_FACE_BACK
);
338 case PIPE_WINDING_BOTH
:
339 so_data(so
, NV34TCL_CULL_FACE_FRONT_AND_BACK
);
342 so_data(so
, NV34TCL_CULL_FACE_BACK
);
345 so_data(so
, NV34TCL_FRONT_FACE_CCW
);
347 so_data(so
, nvgl_polygon_mode(cso
->fill_cw
));
348 so_data(so
, nvgl_polygon_mode(cso
->fill_ccw
));
349 switch (cso
->cull_mode
) {
350 case PIPE_WINDING_CCW
:
351 so_data(so
, NV34TCL_CULL_FACE_BACK
);
353 case PIPE_WINDING_CW
:
354 so_data(so
, NV34TCL_CULL_FACE_FRONT
);
356 case PIPE_WINDING_BOTH
:
357 so_data(so
, NV34TCL_CULL_FACE_FRONT_AND_BACK
);
360 so_data(so
, NV34TCL_CULL_FACE_BACK
);
363 so_data(so
, NV34TCL_FRONT_FACE_CW
);
365 so_data(so
, cso
->poly_smooth
? 1 : 0);
366 so_data(so
, (cso
->cull_mode
!= PIPE_WINDING_NONE
) ? 1 : 0);
368 so_method(so
, rankine
, NV34TCL_POLYGON_STIPPLE_ENABLE
, 1);
369 so_data (so
, cso
->poly_stipple_enable
? 1 : 0);
371 so_method(so
, rankine
, NV34TCL_POLYGON_OFFSET_POINT_ENABLE
, 3);
372 if ((cso
->offset_cw
&& cso
->fill_cw
== PIPE_POLYGON_MODE_POINT
) ||
373 (cso
->offset_ccw
&& cso
->fill_ccw
== PIPE_POLYGON_MODE_POINT
))
377 if ((cso
->offset_cw
&& cso
->fill_cw
== PIPE_POLYGON_MODE_LINE
) ||
378 (cso
->offset_ccw
&& cso
->fill_ccw
== PIPE_POLYGON_MODE_LINE
))
382 if ((cso
->offset_cw
&& cso
->fill_cw
== PIPE_POLYGON_MODE_FILL
) ||
383 (cso
->offset_ccw
&& cso
->fill_ccw
== PIPE_POLYGON_MODE_FILL
))
387 if (cso
->offset_cw
|| cso
->offset_ccw
) {
388 so_method(so
, rankine
, NV34TCL_POLYGON_OFFSET_FACTOR
, 2);
389 so_data (so
, fui(cso
->offset_scale
));
390 so_data (so
, fui(cso
->offset_units
* 2));
393 so_method(so
, rankine
, NV34TCL_POINT_SPRITE
, 1);
394 if (cso
->point_quad_rasterization
) {
395 unsigned psctl
= (1 << 0), i
;
397 for (i
= 0; i
< 8; i
++) {
398 if ((cso
->sprite_coord_enable
>> i
) & 1)
399 psctl
|= (1 << (8 + i
));
407 so_ref(so
, &rsso
->so
);
414 nv30_rasterizer_state_bind(struct pipe_context
*pipe
, void *hwcso
)
416 struct nv30_context
*nv30
= nv30_context(pipe
);
418 nv30
->rasterizer
= hwcso
;
419 nv30
->dirty
|= NV30_NEW_RAST
;
420 /*nv30->draw_dirty |= NV30_NEW_RAST;*/
424 nv30_rasterizer_state_delete(struct pipe_context
*pipe
, void *hwcso
)
426 struct nv30_rasterizer_state
*rsso
= hwcso
;
428 so_ref(NULL
, &rsso
->so
);
433 nv30_depth_stencil_alpha_state_create(struct pipe_context
*pipe
,
434 const struct pipe_depth_stencil_alpha_state
*cso
)
436 struct nv30_context
*nv30
= nv30_context(pipe
);
437 struct nv30_zsa_state
*zsaso
= CALLOC(1, sizeof(*zsaso
));
438 struct nouveau_stateobj
*so
= so_new(6, 20, 0);
439 struct nouveau_grobj
*rankine
= nv30
->screen
->rankine
;
441 so_method(so
, rankine
, NV34TCL_DEPTH_FUNC
, 3);
442 so_data (so
, nvgl_comparison_op(cso
->depth
.func
));
443 so_data (so
, cso
->depth
.writemask
? 1 : 0);
444 so_data (so
, cso
->depth
.enabled
? 1 : 0);
446 so_method(so
, rankine
, NV34TCL_ALPHA_FUNC_ENABLE
, 3);
447 so_data (so
, cso
->alpha
.enabled
? 1 : 0);
448 so_data (so
, nvgl_comparison_op(cso
->alpha
.func
));
449 so_data (so
, float_to_ubyte(cso
->alpha
.ref_value
));
451 if (cso
->stencil
[0].enabled
) {
452 so_method(so
, rankine
, NV34TCL_STENCIL_FRONT_ENABLE
, 3);
453 so_data (so
, cso
->stencil
[0].enabled
? 1 : 0);
454 so_data (so
, cso
->stencil
[0].writemask
);
455 so_data (so
, nvgl_comparison_op(cso
->stencil
[0].func
));
456 so_method(so
, rankine
, NV34TCL_STENCIL_FRONT_FUNC_MASK
, 4);
457 so_data (so
, cso
->stencil
[0].valuemask
);
458 so_data (so
, nvgl_stencil_op(cso
->stencil
[0].fail_op
));
459 so_data (so
, nvgl_stencil_op(cso
->stencil
[0].zfail_op
));
460 so_data (so
, nvgl_stencil_op(cso
->stencil
[0].zpass_op
));
462 so_method(so
, rankine
, NV34TCL_STENCIL_FRONT_ENABLE
, 1);
466 if (cso
->stencil
[1].enabled
) {
467 so_method(so
, rankine
, NV34TCL_STENCIL_BACK_ENABLE
, 3);
468 so_data (so
, cso
->stencil
[1].enabled
? 1 : 0);
469 so_data (so
, cso
->stencil
[1].writemask
);
470 so_data (so
, nvgl_comparison_op(cso
->stencil
[1].func
));
471 so_method(so
, rankine
, NV34TCL_STENCIL_BACK_FUNC_MASK
, 4);
472 so_data (so
, cso
->stencil
[1].valuemask
);
473 so_data (so
, nvgl_stencil_op(cso
->stencil
[1].fail_op
));
474 so_data (so
, nvgl_stencil_op(cso
->stencil
[1].zfail_op
));
475 so_data (so
, nvgl_stencil_op(cso
->stencil
[1].zpass_op
));
477 so_method(so
, rankine
, NV34TCL_STENCIL_BACK_ENABLE
, 1);
481 so_ref(so
, &zsaso
->so
);
484 return (void *)zsaso
;
488 nv30_depth_stencil_alpha_state_bind(struct pipe_context
*pipe
, void *hwcso
)
490 struct nv30_context
*nv30
= nv30_context(pipe
);
493 nv30
->dirty
|= NV30_NEW_ZSA
;
497 nv30_depth_stencil_alpha_state_delete(struct pipe_context
*pipe
, void *hwcso
)
499 struct nv30_zsa_state
*zsaso
= hwcso
;
501 so_ref(NULL
, &zsaso
->so
);
506 nv30_vp_state_create(struct pipe_context
*pipe
,
507 const struct pipe_shader_state
*cso
)
509 /*struct nv30_context *nv30 = nv30_context(pipe);*/
510 struct nv30_vertex_program
*vp
;
512 vp
= CALLOC(1, sizeof(struct nv30_vertex_program
));
513 vp
->pipe
.tokens
= tgsi_dup_tokens(cso
->tokens
);
514 /*vp->draw = draw_create_vertex_shader(nv30->draw, &vp->pipe);*/
520 nv30_vp_state_bind(struct pipe_context
*pipe
, void *hwcso
)
522 struct nv30_context
*nv30
= nv30_context(pipe
);
524 nv30
->vertprog
= hwcso
;
525 nv30
->dirty
|= NV30_NEW_VERTPROG
;
526 /*nv30->draw_dirty |= NV30_NEW_VERTPROG;*/
530 nv30_vp_state_delete(struct pipe_context
*pipe
, void *hwcso
)
532 struct nv30_context
*nv30
= nv30_context(pipe
);
533 struct nv30_vertex_program
*vp
= hwcso
;
535 /*draw_delete_vertex_shader(nv30->draw, vp->draw);*/
536 nv30_vertprog_destroy(nv30
, vp
);
537 FREE((void*)vp
->pipe
.tokens
);
542 nv30_fp_state_create(struct pipe_context
*pipe
,
543 const struct pipe_shader_state
*cso
)
545 struct nv30_fragment_program
*fp
;
547 fp
= CALLOC(1, sizeof(struct nv30_fragment_program
));
548 fp
->pipe
.tokens
= tgsi_dup_tokens(cso
->tokens
);
550 tgsi_scan_shader(fp
->pipe
.tokens
, &fp
->info
);
556 nv30_fp_state_bind(struct pipe_context
*pipe
, void *hwcso
)
558 struct nv30_context
*nv30
= nv30_context(pipe
);
560 nv30
->fragprog
= hwcso
;
561 nv30
->dirty
|= NV30_NEW_FRAGPROG
;
565 nv30_fp_state_delete(struct pipe_context
*pipe
, void *hwcso
)
567 struct nv30_context
*nv30
= nv30_context(pipe
);
568 struct nv30_fragment_program
*fp
= hwcso
;
570 nv30_fragprog_destroy(nv30
, fp
);
571 FREE((void*)fp
->pipe
.tokens
);
576 nv30_set_blend_color(struct pipe_context
*pipe
,
577 const struct pipe_blend_color
*bcol
)
579 struct nv30_context
*nv30
= nv30_context(pipe
);
581 nv30
->blend_colour
= *bcol
;
582 nv30
->dirty
|= NV30_NEW_BCOL
;
586 nv30_set_stencil_ref(struct pipe_context
*pipe
,
587 const struct pipe_stencil_ref
*sr
)
589 struct nv30_context
*nv30
= nv30_context(pipe
);
591 nv30
->stencil_ref
= *sr
;
592 nv30
->dirty
|= NV30_NEW_SR
;
596 nv30_set_clip_state(struct pipe_context
*pipe
,
597 const struct pipe_clip_state
*clip
)
602 nv30_set_constant_buffer(struct pipe_context
*pipe
, uint shader
, uint index
,
603 struct pipe_buffer
*buf
)
605 struct nv30_context
*nv30
= nv30_context(pipe
);
607 nv30
->constbuf
[shader
] = buf
;
608 nv30
->constbuf_nr
[shader
] = buf
->size
/ (4 * sizeof(float));
610 if (shader
== PIPE_SHADER_VERTEX
) {
611 nv30
->dirty
|= NV30_NEW_VERTPROG
;
613 if (shader
== PIPE_SHADER_FRAGMENT
) {
614 nv30
->dirty
|= NV30_NEW_FRAGPROG
;
619 nv30_set_framebuffer_state(struct pipe_context
*pipe
,
620 const struct pipe_framebuffer_state
*fb
)
622 struct nv30_context
*nv30
= nv30_context(pipe
);
624 nv30
->framebuffer
= *fb
;
625 nv30
->dirty
|= NV30_NEW_FB
;
629 nv30_set_polygon_stipple(struct pipe_context
*pipe
,
630 const struct pipe_poly_stipple
*stipple
)
632 struct nv30_context
*nv30
= nv30_context(pipe
);
634 memcpy(nv30
->stipple
, stipple
->stipple
, 4 * 32);
635 nv30
->dirty
|= NV30_NEW_STIPPLE
;
639 nv30_set_scissor_state(struct pipe_context
*pipe
,
640 const struct pipe_scissor_state
*s
)
642 struct nv30_context
*nv30
= nv30_context(pipe
);
645 nv30
->dirty
|= NV30_NEW_SCISSOR
;
649 nv30_set_viewport_state(struct pipe_context
*pipe
,
650 const struct pipe_viewport_state
*vpt
)
652 struct nv30_context
*nv30
= nv30_context(pipe
);
654 nv30
->viewport
= *vpt
;
655 nv30
->dirty
|= NV30_NEW_VIEWPORT
;
656 /*nv30->draw_dirty |= NV30_NEW_VIEWPORT;*/
660 nv30_set_vertex_buffers(struct pipe_context
*pipe
, unsigned count
,
661 const struct pipe_vertex_buffer
*vb
)
663 struct nv30_context
*nv30
= nv30_context(pipe
);
665 memcpy(nv30
->vtxbuf
, vb
, sizeof(*vb
) * count
);
666 nv30
->vtxbuf_nr
= count
;
668 nv30
->dirty
|= NV30_NEW_ARRAYS
;
669 /*nv30->draw_dirty |= NV30_NEW_ARRAYS;*/
673 nv30_vtxelts_state_create(struct pipe_context
*pipe
,
674 unsigned num_elements
,
675 const struct pipe_vertex_element
*elements
)
677 struct nv30_vtxelt_state
*cso
= CALLOC_STRUCT(nv30_vtxelt_state
);
679 assert(num_elements
< 16); /* not doing fallbacks yet */
680 cso
->num_elements
= num_elements
;
681 memcpy(cso
->pipe
, elements
, num_elements
* sizeof(*elements
));
683 /* nv30_vtxelt_construct(cso);*/
689 nv30_vtxelts_state_delete(struct pipe_context
*pipe
, void *hwcso
)
695 nv30_vtxelts_state_bind(struct pipe_context
*pipe
, void *hwcso
)
697 struct nv30_context
*nv30
= nv30_context(pipe
);
699 nv30
->vtxelt
= hwcso
;
700 nv30
->dirty
|= NV30_NEW_ARRAYS
;
701 /*nv30->draw_dirty |= NV30_NEW_ARRAYS;*/
705 nv30_init_state_functions(struct nv30_context
*nv30
)
707 nv30
->pipe
.create_blend_state
= nv30_blend_state_create
;
708 nv30
->pipe
.bind_blend_state
= nv30_blend_state_bind
;
709 nv30
->pipe
.delete_blend_state
= nv30_blend_state_delete
;
711 nv30
->pipe
.create_sampler_state
= nv30_sampler_state_create
;
712 nv30
->pipe
.bind_fragment_sampler_states
= nv30_sampler_state_bind
;
713 nv30
->pipe
.delete_sampler_state
= nv30_sampler_state_delete
;
714 nv30
->pipe
.set_fragment_sampler_textures
= nv30_set_sampler_texture
;
716 nv30
->pipe
.create_rasterizer_state
= nv30_rasterizer_state_create
;
717 nv30
->pipe
.bind_rasterizer_state
= nv30_rasterizer_state_bind
;
718 nv30
->pipe
.delete_rasterizer_state
= nv30_rasterizer_state_delete
;
720 nv30
->pipe
.create_depth_stencil_alpha_state
=
721 nv30_depth_stencil_alpha_state_create
;
722 nv30
->pipe
.bind_depth_stencil_alpha_state
=
723 nv30_depth_stencil_alpha_state_bind
;
724 nv30
->pipe
.delete_depth_stencil_alpha_state
=
725 nv30_depth_stencil_alpha_state_delete
;
727 nv30
->pipe
.create_vs_state
= nv30_vp_state_create
;
728 nv30
->pipe
.bind_vs_state
= nv30_vp_state_bind
;
729 nv30
->pipe
.delete_vs_state
= nv30_vp_state_delete
;
731 nv30
->pipe
.create_fs_state
= nv30_fp_state_create
;
732 nv30
->pipe
.bind_fs_state
= nv30_fp_state_bind
;
733 nv30
->pipe
.delete_fs_state
= nv30_fp_state_delete
;
735 nv30
->pipe
.set_blend_color
= nv30_set_blend_color
;
736 nv30
->pipe
.set_stencil_ref
= nv30_set_stencil_ref
;
737 nv30
->pipe
.set_clip_state
= nv30_set_clip_state
;
738 nv30
->pipe
.set_constant_buffer
= nv30_set_constant_buffer
;
739 nv30
->pipe
.set_framebuffer_state
= nv30_set_framebuffer_state
;
740 nv30
->pipe
.set_polygon_stipple
= nv30_set_polygon_stipple
;
741 nv30
->pipe
.set_scissor_state
= nv30_set_scissor_state
;
742 nv30
->pipe
.set_viewport_state
= nv30_set_viewport_state
;
744 nv30
->pipe
.create_vertex_elements_state
= nv30_vtxelts_state_create
;
745 nv30
->pipe
.delete_vertex_elements_state
= nv30_vtxelts_state_delete
;
746 nv30
->pipe
.bind_vertex_elements_state
= nv30_vtxelts_state_bind
;
748 nv30
->pipe
.set_vertex_buffers
= nv30_set_vertex_buffers
;