Merge commit 'origin/gallium-0.1' into gallium-0.2
[mesa.git] / src / gallium / drivers / nv30 / nv30_state.c
1 #include "pipe/p_state.h"
2 #include "pipe/p_defines.h"
3 #include "pipe/p_inlines.h"
4
5 #include "tgsi/tgsi_parse.h"
6
7 #include "nv30_context.h"
8 #include "nv30_state.h"
9
10 static void *
11 nv30_blend_state_create(struct pipe_context *pipe,
12 const struct pipe_blend_state *cso)
13 {
14 struct nv30_context *nv30 = nv30_context(pipe);
15 struct nouveau_grobj *rankine = nv30->screen->rankine;
16 struct nv30_blend_state *bso = CALLOC(1, sizeof(*bso));
17 struct nouveau_stateobj *so = so_new(16, 0);
18
19 if (cso->blend_enable) {
20 so_method(so, rankine, NV34TCL_BLEND_FUNC_ENABLE, 3);
21 so_data (so, 1);
22 so_data (so, (nvgl_blend_func(cso->alpha_src_factor) << 16) |
23 nvgl_blend_func(cso->rgb_src_factor));
24 so_data (so, nvgl_blend_func(cso->alpha_dst_factor) << 16 |
25 nvgl_blend_func(cso->rgb_dst_factor));
26 so_method(so, rankine, NV34TCL_BLEND_EQUATION, 1);
27 so_data (so, nvgl_blend_eqn(cso->alpha_func) << 16 |
28 nvgl_blend_eqn(cso->rgb_func));
29 } else {
30 so_method(so, rankine, NV34TCL_BLEND_FUNC_ENABLE, 1);
31 so_data (so, 0);
32 }
33
34 so_method(so, rankine, NV34TCL_COLOR_MASK, 1);
35 so_data (so, (((cso->colormask & PIPE_MASK_A) ? (0x01 << 24) : 0) |
36 ((cso->colormask & PIPE_MASK_R) ? (0x01 << 16) : 0) |
37 ((cso->colormask & PIPE_MASK_G) ? (0x01 << 8) : 0) |
38 ((cso->colormask & PIPE_MASK_B) ? (0x01 << 0) : 0)));
39
40 if (cso->logicop_enable) {
41 so_method(so, rankine, NV34TCL_COLOR_LOGIC_OP_ENABLE, 2);
42 so_data (so, 1);
43 so_data (so, nvgl_logicop_func(cso->logicop_func));
44 } else {
45 so_method(so, rankine, NV34TCL_COLOR_LOGIC_OP_ENABLE, 1);
46 so_data (so, 0);
47 }
48
49 so_method(so, rankine, NV34TCL_DITHER_ENABLE, 1);
50 so_data (so, cso->dither ? 1 : 0);
51
52 so_ref(so, &bso->so);
53 bso->pipe = *cso;
54 return (void *)bso;
55 }
56
57 static void
58 nv30_blend_state_bind(struct pipe_context *pipe, void *hwcso)
59 {
60 struct nv30_context *nv30 = nv30_context(pipe);
61
62 nv30->blend = hwcso;
63 nv30->dirty |= NV30_NEW_BLEND;
64 }
65
66 static void
67 nv30_blend_state_delete(struct pipe_context *pipe, void *hwcso)
68 {
69 struct nv30_blend_state *bso = hwcso;
70
71 so_ref(NULL, &bso->so);
72 FREE(bso);
73 }
74
75
76 static INLINE unsigned
77 wrap_mode(unsigned wrap) {
78 unsigned ret;
79
80 switch (wrap) {
81 case PIPE_TEX_WRAP_REPEAT:
82 ret = NV34TCL_TX_WRAP_S_REPEAT;
83 break;
84 case PIPE_TEX_WRAP_MIRROR_REPEAT:
85 ret = NV34TCL_TX_WRAP_S_MIRRORED_REPEAT;
86 break;
87 case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
88 ret = NV34TCL_TX_WRAP_S_CLAMP_TO_EDGE;
89 break;
90 case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
91 ret = NV34TCL_TX_WRAP_S_CLAMP_TO_BORDER;
92 break;
93 case PIPE_TEX_WRAP_CLAMP:
94 ret = NV34TCL_TX_WRAP_S_CLAMP;
95 break;
96 /* case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
97 ret = NV34TCL_TX_WRAP_S_MIRROR_CLAMP_TO_EDGE;
98 break;
99 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
100 ret = NV34TCL_TX_WRAP_S_MIRROR_CLAMP_TO_BORDER;
101 break;
102 case PIPE_TEX_WRAP_MIRROR_CLAMP:
103 ret = NV34TCL_TX_WRAP_S_MIRROR_CLAMP;
104 break;*/
105 default:
106 NOUVEAU_ERR("unknown wrap mode: %d\n", wrap);
107 ret = NV34TCL_TX_WRAP_S_REPEAT;
108 break;
109 }
110
111 return ret >> NV34TCL_TX_WRAP_S_SHIFT;
112 }
113
114 static void *
115 nv30_sampler_state_create(struct pipe_context *pipe,
116 const struct pipe_sampler_state *cso)
117 {
118 struct nv30_sampler_state *ps;
119 uint32_t filter = 0;
120
121 ps = MALLOC(sizeof(struct nv30_sampler_state));
122
123 ps->fmt = 0;
124 /* TODO: Not all RECTs formats have this bit set, bits 15-8 of format
125 are the tx format to use. We should store normalized coord flag
126 in sampler state structure, and set appropriate format in
127 nvxx_fragtex_build()
128 */
129 /*NV34TCL_TX_FORMAT_RECT*/
130 /*if (!cso->normalized_coords) {
131 ps->fmt |= (1<<14) ;
132 }*/
133
134 ps->wrap = ((wrap_mode(cso->wrap_s) << NV34TCL_TX_WRAP_S_SHIFT) |
135 (wrap_mode(cso->wrap_t) << NV34TCL_TX_WRAP_T_SHIFT) |
136 (wrap_mode(cso->wrap_r) << NV34TCL_TX_WRAP_R_SHIFT));
137
138 ps->en = 0;
139
140 if (cso->max_anisotropy >= 8.0) {
141 ps->en |= NV34TCL_TX_ENABLE_ANISO_8X;
142 } else
143 if (cso->max_anisotropy >= 4.0) {
144 ps->en |= NV34TCL_TX_ENABLE_ANISO_4X;
145 } else
146 if (cso->max_anisotropy >= 2.0) {
147 ps->en |= NV34TCL_TX_ENABLE_ANISO_2X;
148 }
149
150 switch (cso->mag_img_filter) {
151 case PIPE_TEX_FILTER_LINEAR:
152 filter |= NV34TCL_TX_FILTER_MAGNIFY_LINEAR;
153 break;
154 case PIPE_TEX_FILTER_NEAREST:
155 default:
156 filter |= NV34TCL_TX_FILTER_MAGNIFY_NEAREST;
157 break;
158 }
159
160 switch (cso->min_img_filter) {
161 case PIPE_TEX_FILTER_LINEAR:
162 switch (cso->min_mip_filter) {
163 case PIPE_TEX_MIPFILTER_NEAREST:
164 filter |= NV34TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST;
165 break;
166 case PIPE_TEX_MIPFILTER_LINEAR:
167 filter |= NV34TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR;
168 break;
169 case PIPE_TEX_MIPFILTER_NONE:
170 default:
171 filter |= NV34TCL_TX_FILTER_MINIFY_LINEAR;
172 break;
173 }
174 break;
175 case PIPE_TEX_FILTER_NEAREST:
176 default:
177 switch (cso->min_mip_filter) {
178 case PIPE_TEX_MIPFILTER_NEAREST:
179 filter |= NV34TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST;
180 break;
181 case PIPE_TEX_MIPFILTER_LINEAR:
182 filter |= NV34TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR;
183 break;
184 case PIPE_TEX_MIPFILTER_NONE:
185 default:
186 filter |= NV34TCL_TX_FILTER_MINIFY_NEAREST;
187 break;
188 }
189 break;
190 }
191
192 ps->filt = filter;
193
194 {
195 float limit;
196
197 limit = CLAMP(cso->lod_bias, -16.0, 15.0);
198 ps->filt |= (int)(cso->lod_bias * 256.0) & 0x1fff;
199
200 limit = CLAMP(cso->max_lod, 0.0, 15.0);
201 ps->en |= (int)(limit) << 14 /*NV34TCL_TX_ENABLE_MIPMAP_MAX_LOD_SHIFT*/;
202
203 limit = CLAMP(cso->min_lod, 0.0, 15.0);
204 ps->en |= (int)(limit) << 26 /*NV34TCL_TX_ENABLE_MIPMAP_MIN_LOD_SHIFT*/;
205 }
206
207 if (cso->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) {
208 switch (cso->compare_func) {
209 case PIPE_FUNC_NEVER:
210 ps->wrap |= NV34TCL_TX_WRAP_RCOMP_NEVER;
211 break;
212 case PIPE_FUNC_GREATER:
213 ps->wrap |= NV34TCL_TX_WRAP_RCOMP_GREATER;
214 break;
215 case PIPE_FUNC_EQUAL:
216 ps->wrap |= NV34TCL_TX_WRAP_RCOMP_EQUAL;
217 break;
218 case PIPE_FUNC_GEQUAL:
219 ps->wrap |= NV34TCL_TX_WRAP_RCOMP_GEQUAL;
220 break;
221 case PIPE_FUNC_LESS:
222 ps->wrap |= NV34TCL_TX_WRAP_RCOMP_LESS;
223 break;
224 case PIPE_FUNC_NOTEQUAL:
225 ps->wrap |= NV34TCL_TX_WRAP_RCOMP_NOTEQUAL;
226 break;
227 case PIPE_FUNC_LEQUAL:
228 ps->wrap |= NV34TCL_TX_WRAP_RCOMP_LEQUAL;
229 break;
230 case PIPE_FUNC_ALWAYS:
231 ps->wrap |= NV34TCL_TX_WRAP_RCOMP_ALWAYS;
232 break;
233 default:
234 break;
235 }
236 }
237
238 ps->bcol = ((float_to_ubyte(cso->border_color[3]) << 24) |
239 (float_to_ubyte(cso->border_color[0]) << 16) |
240 (float_to_ubyte(cso->border_color[1]) << 8) |
241 (float_to_ubyte(cso->border_color[2]) << 0));
242
243 return (void *)ps;
244 }
245
246 static void
247 nv30_sampler_state_bind(struct pipe_context *pipe, unsigned nr, void **sampler)
248 {
249 struct nv30_context *nv30 = nv30_context(pipe);
250 unsigned unit;
251
252 for (unit = 0; unit < nr; unit++) {
253 nv30->tex_sampler[unit] = sampler[unit];
254 nv30->dirty_samplers |= (1 << unit);
255 }
256
257 for (unit = nr; unit < nv30->nr_samplers; unit++) {
258 nv30->tex_sampler[unit] = NULL;
259 nv30->dirty_samplers |= (1 << unit);
260 }
261
262 nv30->nr_samplers = nr;
263 nv30->dirty |= NV30_NEW_SAMPLER;
264 }
265
266 static void
267 nv30_sampler_state_delete(struct pipe_context *pipe, void *hwcso)
268 {
269 FREE(hwcso);
270 }
271
272 static void
273 nv30_set_sampler_texture(struct pipe_context *pipe, unsigned nr,
274 struct pipe_texture **miptree)
275 {
276 struct nv30_context *nv30 = nv30_context(pipe);
277 unsigned unit;
278
279 for (unit = 0; unit < nr; unit++) {
280 pipe_texture_reference((struct pipe_texture **)
281 &nv30->tex_miptree[unit], miptree[unit]);
282 nv30->dirty_samplers |= (1 << unit);
283 }
284
285 for (unit = nr; unit < nv30->nr_textures; unit++) {
286 pipe_texture_reference((struct pipe_texture **)
287 &nv30->tex_miptree[unit], NULL);
288 nv30->dirty_samplers |= (1 << unit);
289 }
290
291 nv30->nr_textures = nr;
292 nv30->dirty |= NV30_NEW_SAMPLER;
293 }
294
295 static void *
296 nv30_rasterizer_state_create(struct pipe_context *pipe,
297 const struct pipe_rasterizer_state *cso)
298 {
299 struct nv30_context *nv30 = nv30_context(pipe);
300 struct nv30_rasterizer_state *rsso = CALLOC(1, sizeof(*rsso));
301 struct nouveau_stateobj *so = so_new(32, 0);
302 struct nouveau_grobj *rankine = nv30->screen->rankine;
303
304 /*XXX: ignored:
305 * light_twoside
306 * point_smooth -nohw
307 * multisample
308 */
309
310 so_method(so, rankine, NV34TCL_SHADE_MODEL, 1);
311 so_data (so, cso->flatshade ? NV34TCL_SHADE_MODEL_FLAT :
312 NV34TCL_SHADE_MODEL_SMOOTH);
313
314 so_method(so, rankine, NV34TCL_LINE_WIDTH, 2);
315 so_data (so, (unsigned char)(cso->line_width * 8.0) & 0xff);
316 so_data (so, cso->line_smooth ? 1 : 0);
317 so_method(so, rankine, NV34TCL_LINE_STIPPLE_ENABLE, 2);
318 so_data (so, cso->line_stipple_enable ? 1 : 0);
319 so_data (so, (cso->line_stipple_pattern << 16) |
320 cso->line_stipple_factor);
321
322 so_method(so, rankine, NV34TCL_POINT_SIZE, 1);
323 so_data (so, fui(cso->point_size));
324
325 so_method(so, rankine, NV34TCL_POLYGON_MODE_FRONT, 6);
326 if (cso->front_winding == PIPE_WINDING_CCW) {
327 so_data(so, nvgl_polygon_mode(cso->fill_ccw));
328 so_data(so, nvgl_polygon_mode(cso->fill_cw));
329 switch (cso->cull_mode) {
330 case PIPE_WINDING_CCW:
331 so_data(so, NV34TCL_CULL_FACE_FRONT);
332 break;
333 case PIPE_WINDING_CW:
334 so_data(so, NV34TCL_CULL_FACE_BACK);
335 break;
336 case PIPE_WINDING_BOTH:
337 so_data(so, NV34TCL_CULL_FACE_FRONT_AND_BACK);
338 break;
339 default:
340 so_data(so, NV34TCL_CULL_FACE_BACK);
341 break;
342 }
343 so_data(so, NV34TCL_FRONT_FACE_CCW);
344 } else {
345 so_data(so, nvgl_polygon_mode(cso->fill_cw));
346 so_data(so, nvgl_polygon_mode(cso->fill_ccw));
347 switch (cso->cull_mode) {
348 case PIPE_WINDING_CCW:
349 so_data(so, NV34TCL_CULL_FACE_BACK);
350 break;
351 case PIPE_WINDING_CW:
352 so_data(so, NV34TCL_CULL_FACE_FRONT);
353 break;
354 case PIPE_WINDING_BOTH:
355 so_data(so, NV34TCL_CULL_FACE_FRONT_AND_BACK);
356 break;
357 default:
358 so_data(so, NV34TCL_CULL_FACE_BACK);
359 break;
360 }
361 so_data(so, NV34TCL_FRONT_FACE_CW);
362 }
363 so_data(so, cso->poly_smooth ? 1 : 0);
364 so_data(so, (cso->cull_mode != PIPE_WINDING_NONE) ? 1 : 0);
365
366 so_method(so, rankine, NV34TCL_POLYGON_STIPPLE_ENABLE, 1);
367 so_data (so, cso->poly_stipple_enable ? 1 : 0);
368
369 so_method(so, rankine, NV34TCL_POLYGON_OFFSET_POINT_ENABLE, 3);
370 if ((cso->offset_cw && cso->fill_cw == PIPE_POLYGON_MODE_POINT) ||
371 (cso->offset_ccw && cso->fill_ccw == PIPE_POLYGON_MODE_POINT))
372 so_data(so, 1);
373 else
374 so_data(so, 0);
375 if ((cso->offset_cw && cso->fill_cw == PIPE_POLYGON_MODE_LINE) ||
376 (cso->offset_ccw && cso->fill_ccw == PIPE_POLYGON_MODE_LINE))
377 so_data(so, 1);
378 else
379 so_data(so, 0);
380 if ((cso->offset_cw && cso->fill_cw == PIPE_POLYGON_MODE_FILL) ||
381 (cso->offset_ccw && cso->fill_ccw == PIPE_POLYGON_MODE_FILL))
382 so_data(so, 1);
383 else
384 so_data(so, 0);
385 if (cso->offset_cw || cso->offset_ccw) {
386 so_method(so, rankine, NV34TCL_POLYGON_OFFSET_FACTOR, 2);
387 so_data (so, fui(cso->offset_scale));
388 so_data (so, fui(cso->offset_units * 2));
389 }
390
391 so_method(so, rankine, NV34TCL_POINT_SPRITE, 1);
392 if (cso->point_sprite) {
393 unsigned psctl = (1 << 0), i;
394
395 for (i = 0; i < 8; i++) {
396 if (cso->sprite_coord_mode[i] != PIPE_SPRITE_COORD_NONE)
397 psctl |= (1 << (8 + i));
398 }
399
400 so_data(so, psctl);
401 } else {
402 so_data(so, 0);
403 }
404
405 so_ref(so, &rsso->so);
406 rsso->pipe = *cso;
407 return (void *)rsso;
408 }
409
410 static void
411 nv30_rasterizer_state_bind(struct pipe_context *pipe, void *hwcso)
412 {
413 struct nv30_context *nv30 = nv30_context(pipe);
414
415 nv30->rasterizer = hwcso;
416 nv30->dirty |= NV30_NEW_RAST;
417 /*nv30->draw_dirty |= NV30_NEW_RAST;*/
418 }
419
420 static void
421 nv30_rasterizer_state_delete(struct pipe_context *pipe, void *hwcso)
422 {
423 struct nv30_rasterizer_state *rsso = hwcso;
424
425 so_ref(NULL, &rsso->so);
426 FREE(rsso);
427 }
428
429 static void *
430 nv30_depth_stencil_alpha_state_create(struct pipe_context *pipe,
431 const struct pipe_depth_stencil_alpha_state *cso)
432 {
433 struct nv30_context *nv30 = nv30_context(pipe);
434 struct nv30_zsa_state *zsaso = CALLOC(1, sizeof(*zsaso));
435 struct nouveau_stateobj *so = so_new(32, 0);
436 struct nouveau_grobj *rankine = nv30->screen->rankine;
437
438 so_method(so, rankine, NV34TCL_DEPTH_FUNC, 3);
439 so_data (so, nvgl_comparison_op(cso->depth.func));
440 so_data (so, cso->depth.writemask ? 1 : 0);
441 so_data (so, cso->depth.enabled ? 1 : 0);
442
443 so_method(so, rankine, NV34TCL_ALPHA_FUNC_ENABLE, 3);
444 so_data (so, cso->alpha.enabled ? 1 : 0);
445 so_data (so, nvgl_comparison_op(cso->alpha.func));
446 so_data (so, float_to_ubyte(cso->alpha.ref));
447
448 if (cso->stencil[0].enabled) {
449 so_method(so, rankine, NV34TCL_STENCIL_FRONT_ENABLE, 8);
450 so_data (so, cso->stencil[0].enabled ? 1 : 0);
451 so_data (so, cso->stencil[0].write_mask);
452 so_data (so, nvgl_comparison_op(cso->stencil[0].func));
453 so_data (so, cso->stencil[0].ref_value);
454 so_data (so, cso->stencil[0].value_mask);
455 so_data (so, nvgl_stencil_op(cso->stencil[0].fail_op));
456 so_data (so, nvgl_stencil_op(cso->stencil[0].zfail_op));
457 so_data (so, nvgl_stencil_op(cso->stencil[0].zpass_op));
458 } else {
459 so_method(so, rankine, NV34TCL_STENCIL_FRONT_ENABLE, 1);
460 so_data (so, 0);
461 }
462
463 if (cso->stencil[1].enabled) {
464 so_method(so, rankine, NV34TCL_STENCIL_BACK_ENABLE, 8);
465 so_data (so, cso->stencil[1].enabled ? 1 : 0);
466 so_data (so, cso->stencil[1].write_mask);
467 so_data (so, nvgl_comparison_op(cso->stencil[1].func));
468 so_data (so, cso->stencil[1].ref_value);
469 so_data (so, cso->stencil[1].value_mask);
470 so_data (so, nvgl_stencil_op(cso->stencil[1].fail_op));
471 so_data (so, nvgl_stencil_op(cso->stencil[1].zfail_op));
472 so_data (so, nvgl_stencil_op(cso->stencil[1].zpass_op));
473 } else {
474 so_method(so, rankine, NV34TCL_STENCIL_BACK_ENABLE, 1);
475 so_data (so, 0);
476 }
477
478 so_ref(so, &zsaso->so);
479 zsaso->pipe = *cso;
480 return (void *)zsaso;
481 }
482
483 static void
484 nv30_depth_stencil_alpha_state_bind(struct pipe_context *pipe, void *hwcso)
485 {
486 struct nv30_context *nv30 = nv30_context(pipe);
487
488 nv30->zsa = hwcso;
489 nv30->dirty |= NV30_NEW_ZSA;
490 }
491
492 static void
493 nv30_depth_stencil_alpha_state_delete(struct pipe_context *pipe, void *hwcso)
494 {
495 struct nv30_zsa_state *zsaso = hwcso;
496
497 so_ref(NULL, &zsaso->so);
498 FREE(zsaso);
499 }
500
501 static void *
502 nv30_vp_state_create(struct pipe_context *pipe,
503 const struct pipe_shader_state *cso)
504 {
505 /*struct nv30_context *nv30 = nv30_context(pipe);*/
506 struct nv30_vertex_program *vp;
507
508 vp = CALLOC(1, sizeof(struct nv30_vertex_program));
509 vp->pipe.tokens = tgsi_dup_tokens(cso->tokens);
510 /*vp->draw = draw_create_vertex_shader(nv30->draw, &vp->pipe);*/
511
512 return (void *)vp;
513 }
514
515 static void
516 nv30_vp_state_bind(struct pipe_context *pipe, void *hwcso)
517 {
518 struct nv30_context *nv30 = nv30_context(pipe);
519
520 nv30->vertprog = hwcso;
521 nv30->dirty |= NV30_NEW_VERTPROG;
522 /*nv30->draw_dirty |= NV30_NEW_VERTPROG;*/
523 }
524
525 static void
526 nv30_vp_state_delete(struct pipe_context *pipe, void *hwcso)
527 {
528 struct nv30_context *nv30 = nv30_context(pipe);
529 struct nv30_vertex_program *vp = hwcso;
530
531 /*draw_delete_vertex_shader(nv30->draw, vp->draw);*/
532 nv30_vertprog_destroy(nv30, vp);
533 FREE((void*)vp->pipe.tokens);
534 FREE(vp);
535 }
536
537 static void *
538 nv30_fp_state_create(struct pipe_context *pipe,
539 const struct pipe_shader_state *cso)
540 {
541 struct nv30_fragment_program *fp;
542
543 fp = CALLOC(1, sizeof(struct nv30_fragment_program));
544 fp->pipe.tokens = tgsi_dup_tokens(cso->tokens);
545
546 tgsi_scan_shader(fp->pipe.tokens, &fp->info);
547
548 return (void *)fp;
549 }
550
551 static void
552 nv30_fp_state_bind(struct pipe_context *pipe, void *hwcso)
553 {
554 struct nv30_context *nv30 = nv30_context(pipe);
555
556 nv30->fragprog = hwcso;
557 nv30->dirty |= NV30_NEW_FRAGPROG;
558 }
559
560 static void
561 nv30_fp_state_delete(struct pipe_context *pipe, void *hwcso)
562 {
563 struct nv30_context *nv30 = nv30_context(pipe);
564 struct nv30_fragment_program *fp = hwcso;
565
566 nv30_fragprog_destroy(nv30, fp);
567 FREE((void*)fp->pipe.tokens);
568 FREE(fp);
569 }
570
571 static void
572 nv30_set_blend_color(struct pipe_context *pipe,
573 const struct pipe_blend_color *bcol)
574 {
575 struct nv30_context *nv30 = nv30_context(pipe);
576
577 nv30->blend_colour = *bcol;
578 nv30->dirty |= NV30_NEW_BCOL;
579 }
580
581 static void
582 nv30_set_clip_state(struct pipe_context *pipe,
583 const struct pipe_clip_state *clip)
584 {
585 }
586
587 static void
588 nv30_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index,
589 const struct pipe_constant_buffer *buf )
590 {
591 struct nv30_context *nv30 = nv30_context(pipe);
592
593 nv30->constbuf[shader] = buf->buffer;
594 nv30->constbuf_nr[shader] = buf->size / (4 * sizeof(float));
595
596 if (shader == PIPE_SHADER_VERTEX) {
597 nv30->dirty |= NV30_NEW_VERTPROG;
598 } else
599 if (shader == PIPE_SHADER_FRAGMENT) {
600 nv30->dirty |= NV30_NEW_FRAGPROG;
601 }
602 }
603
604 static void
605 nv30_set_framebuffer_state(struct pipe_context *pipe,
606 const struct pipe_framebuffer_state *fb)
607 {
608 struct nv30_context *nv30 = nv30_context(pipe);
609
610 nv30->framebuffer = *fb;
611 nv30->dirty |= NV30_NEW_FB;
612 }
613
614 static void
615 nv30_set_polygon_stipple(struct pipe_context *pipe,
616 const struct pipe_poly_stipple *stipple)
617 {
618 struct nv30_context *nv30 = nv30_context(pipe);
619
620 memcpy(nv30->stipple, stipple->stipple, 4 * 32);
621 nv30->dirty |= NV30_NEW_STIPPLE;
622 }
623
624 static void
625 nv30_set_scissor_state(struct pipe_context *pipe,
626 const struct pipe_scissor_state *s)
627 {
628 struct nv30_context *nv30 = nv30_context(pipe);
629
630 nv30->scissor = *s;
631 nv30->dirty |= NV30_NEW_SCISSOR;
632 }
633
634 static void
635 nv30_set_viewport_state(struct pipe_context *pipe,
636 const struct pipe_viewport_state *vpt)
637 {
638 struct nv30_context *nv30 = nv30_context(pipe);
639
640 nv30->viewport = *vpt;
641 nv30->dirty |= NV30_NEW_VIEWPORT;
642 /*nv30->draw_dirty |= NV30_NEW_VIEWPORT;*/
643 }
644
645 static void
646 nv30_set_vertex_buffers(struct pipe_context *pipe, unsigned count,
647 const struct pipe_vertex_buffer *vb)
648 {
649 struct nv30_context *nv30 = nv30_context(pipe);
650
651 memcpy(nv30->vtxbuf, vb, sizeof(*vb) * count);
652 nv30->vtxbuf_nr = count;
653
654 nv30->dirty |= NV30_NEW_ARRAYS;
655 /*nv30->draw_dirty |= NV30_NEW_ARRAYS;*/
656 }
657
658 static void
659 nv30_set_vertex_elements(struct pipe_context *pipe, unsigned count,
660 const struct pipe_vertex_element *ve)
661 {
662 struct nv30_context *nv30 = nv30_context(pipe);
663
664 memcpy(nv30->vtxelt, ve, sizeof(*ve) * count);
665 nv30->vtxelt_nr = count;
666
667 nv30->dirty |= NV30_NEW_ARRAYS;
668 /*nv30->draw_dirty |= NV30_NEW_ARRAYS;*/
669 }
670
671 static void
672 nv30_set_edgeflags(struct pipe_context *pipe, const unsigned *bitfield)
673 {
674 struct nv30_context *nv30 = nv30_context(pipe);
675
676 nv30->edgeflags = bitfield;
677 nv30->dirty |= NV30_NEW_ARRAYS;
678 /*nv30->draw_dirty |= NV30_NEW_ARRAYS;*/
679 }
680
681 void
682 nv30_init_state_functions(struct nv30_context *nv30)
683 {
684 nv30->pipe.create_blend_state = nv30_blend_state_create;
685 nv30->pipe.bind_blend_state = nv30_blend_state_bind;
686 nv30->pipe.delete_blend_state = nv30_blend_state_delete;
687
688 nv30->pipe.create_sampler_state = nv30_sampler_state_create;
689 nv30->pipe.bind_sampler_states = nv30_sampler_state_bind;
690 nv30->pipe.delete_sampler_state = nv30_sampler_state_delete;
691 nv30->pipe.set_sampler_textures = nv30_set_sampler_texture;
692
693 nv30->pipe.create_rasterizer_state = nv30_rasterizer_state_create;
694 nv30->pipe.bind_rasterizer_state = nv30_rasterizer_state_bind;
695 nv30->pipe.delete_rasterizer_state = nv30_rasterizer_state_delete;
696
697 nv30->pipe.create_depth_stencil_alpha_state =
698 nv30_depth_stencil_alpha_state_create;
699 nv30->pipe.bind_depth_stencil_alpha_state =
700 nv30_depth_stencil_alpha_state_bind;
701 nv30->pipe.delete_depth_stencil_alpha_state =
702 nv30_depth_stencil_alpha_state_delete;
703
704 nv30->pipe.create_vs_state = nv30_vp_state_create;
705 nv30->pipe.bind_vs_state = nv30_vp_state_bind;
706 nv30->pipe.delete_vs_state = nv30_vp_state_delete;
707
708 nv30->pipe.create_fs_state = nv30_fp_state_create;
709 nv30->pipe.bind_fs_state = nv30_fp_state_bind;
710 nv30->pipe.delete_fs_state = nv30_fp_state_delete;
711
712 nv30->pipe.set_blend_color = nv30_set_blend_color;
713 nv30->pipe.set_clip_state = nv30_set_clip_state;
714 nv30->pipe.set_constant_buffer = nv30_set_constant_buffer;
715 nv30->pipe.set_framebuffer_state = nv30_set_framebuffer_state;
716 nv30->pipe.set_polygon_stipple = nv30_set_polygon_stipple;
717 nv30->pipe.set_scissor_state = nv30_set_scissor_state;
718 nv30->pipe.set_viewport_state = nv30_set_viewport_state;
719
720 nv30->pipe.set_edgeflags = nv30_set_edgeflags;
721 nv30->pipe.set_vertex_buffers = nv30_set_vertex_buffers;
722 nv30->pipe.set_vertex_elements = nv30_set_vertex_elements;
723 }
724