1 #include "nv30_context.h"
4 nv30_state_framebuffer_validate(struct nv30_context
*nv30
)
6 struct pipe_framebuffer_state
*fb
= &nv30
->framebuffer
;
7 struct pipe_surface
*rt
[4], *zeta
= NULL
;
8 uint32_t rt_enable
, rt_format
;
9 int i
, colour_format
= 0, zeta_format
= 0;
10 struct nouveau_stateobj
*so
= so_new(64, 10);
11 unsigned rt_flags
= NOUVEAU_BO_RDWR
| NOUVEAU_BO_VRAM
;
12 unsigned w
= fb
->width
;
13 unsigned h
= fb
->height
;
16 for (i
= 0; i
< fb
->num_cbufs
; i
++) {
18 assert(colour_format
== fb
->cbufs
[i
]->format
);
20 colour_format
= fb
->cbufs
[i
]->format
;
21 rt_enable
|= (NV34TCL_RT_ENABLE_COLOR0
<< i
);
26 if (rt_enable
& (NV34TCL_RT_ENABLE_COLOR1
| NV34TCL_RT_ENABLE_COLOR2
|
27 NV34TCL_RT_ENABLE_COLOR3
))
28 rt_enable
|= NV34TCL_RT_ENABLE_MRT
;
31 zeta_format
= fb
->zsbuf
->format
;
35 rt_format
= NV34TCL_RT_FORMAT_TYPE_LINEAR
;
37 switch (colour_format
) {
38 case PIPE_FORMAT_A8R8G8B8_UNORM
:
40 rt_format
|= NV34TCL_RT_FORMAT_COLOR_A8R8G8B8
;
42 case PIPE_FORMAT_R5G6B5_UNORM
:
43 rt_format
|= NV34TCL_RT_FORMAT_COLOR_R5G6B5
;
49 switch (zeta_format
) {
50 case PIPE_FORMAT_Z16_UNORM
:
51 rt_format
|= NV34TCL_RT_FORMAT_ZETA_Z16
;
53 case PIPE_FORMAT_Z24S8_UNORM
:
55 rt_format
|= NV34TCL_RT_FORMAT_ZETA_Z24S8
;
61 if (rt_enable
& NV34TCL_RT_ENABLE_COLOR0
) {
62 uint32_t pitch
= rt
[0]->pitch
* rt
[0]->cpp
;
64 pitch
|= (zeta
->pitch
* zeta
->cpp
)<<16;
69 so_method(so
, nv30
->screen
->rankine
, NV34TCL_DMA_COLOR0
, 1);
70 so_reloc (so
, rt
[0]->buffer
, 0, rt_flags
| NOUVEAU_BO_OR
,
71 nv30
->nvws
->channel
->vram
->handle
,
72 nv30
->nvws
->channel
->gart
->handle
);
73 so_method(so
, nv30
->screen
->rankine
, NV34TCL_COLOR0_PITCH
, 2);
75 so_reloc (so
, rt
[0]->buffer
, rt
[0]->offset
, rt_flags
|
76 NOUVEAU_BO_LOW
, 0, 0);
79 if (rt_enable
& NV34TCL_RT_ENABLE_COLOR1
) {
80 so_method(so
, nv30
->screen
->rankine
, NV34TCL_DMA_COLOR1
, 1);
81 so_reloc (so
, rt
[1]->buffer
, 0, rt_flags
| NOUVEAU_BO_OR
,
82 nv30
->nvws
->channel
->vram
->handle
,
83 nv30
->nvws
->channel
->gart
->handle
);
84 so_method(so
, nv30
->screen
->rankine
, NV34TCL_COLOR1_OFFSET
, 2);
85 so_reloc (so
, rt
[1]->buffer
, rt
[1]->offset
, rt_flags
|
86 NOUVEAU_BO_LOW
, 0, 0);
87 so_data (so
, rt
[1]->pitch
* rt
[1]->cpp
);
90 if (rt_enable & NV34TCL_RT_ENABLE_COLOR2) {
91 so_method(so, nv30->screen->rankine, NV34TCL_DMA_COLOR2, 1);
92 so_reloc (so, rt[2]->buffer, 0, rt_flags | NOUVEAU_BO_OR,
93 nv30->nvws->channel->vram->handle,
94 nv30->nvws->channel->gart->handle);
95 so_method(so, nv30->screen->rankine, NV34TCL_COLOR2_OFFSET, 1);
96 so_reloc (so, rt[2]->buffer, rt[2]->offset, rt_flags |
97 NOUVEAU_BO_LOW, 0, 0);
98 so_method(so, nv30->screen->rankine, NV34TCL_COLOR2_PITCH, 1);
99 so_data (so, rt[2]->pitch * rt[2]->cpp);
102 if (rt_enable & NV34TCL_RT_ENABLE_COLOR3) {
103 so_method(so, nv30->screen->rankine, NV34TCL_DMA_COLOR3, 1);
104 so_reloc (so, rt[3]->buffer, 0, rt_flags | NOUVEAU_BO_OR,
105 nv30->nvws->channel->vram->handle,
106 nv30->nvws->channel->gart->handle);
107 so_method(so, nv30->screen->rankine, NV34TCL_COLOR3_OFFSET, 1);
108 so_reloc (so, rt[3]->buffer, rt[3]->offset, rt_flags |
109 NOUVEAU_BO_LOW, 0, 0);
110 so_method(so, nv30->screen->rankine, NV34TCL_COLOR3_PITCH, 1);
111 so_data (so, rt[3]->pitch * rt[3]->cpp);
115 so_method(so
, nv30
->screen
->rankine
, NV34TCL_DMA_ZETA
, 1);
116 so_reloc (so
, zeta
->buffer
, 0, rt_flags
| NOUVEAU_BO_OR
,
117 nv30
->nvws
->channel
->vram
->handle
,
118 nv30
->nvws
->channel
->gart
->handle
);
119 so_method(so
, nv30
->screen
->rankine
, NV34TCL_ZETA_OFFSET
, 1);
120 so_reloc (so
, zeta
->buffer
, zeta
->offset
, rt_flags
|
121 NOUVEAU_BO_LOW
, 0, 0);
122 /*so_method(so, nv30->screen->rankine, NV34TCL_ZETA_PITCH, 1);
123 so_data (so, zeta->pitch * zeta->cpp);*/
126 so_method(so
, nv30
->screen
->rankine
, NV34TCL_RT_ENABLE
, 1);
127 so_data (so
, rt_enable
);
128 so_method(so
, nv30
->screen
->rankine
, NV34TCL_RT_HORIZ
, 3);
129 so_data (so
, (w
<< 16) | 0);
130 so_data (so
, (h
<< 16) | 0);
131 so_data (so
, rt_format
);
132 so_method(so
, nv30
->screen
->rankine
, NV34TCL_VIEWPORT_HORIZ
, 2);
133 so_data (so
, (w
<< 16) | 0);
134 so_data (so
, (h
<< 16) | 0);
135 so_method(so
, nv30
->screen
->rankine
, NV34TCL_VIEWPORT_CLIP_HORIZ(0), 2);
136 so_data (so
, ((w
- 1) << 16) | 0);
137 so_data (so
, ((h
- 1) << 16) | 0);
138 so_method(so
, nv30
->screen
->rankine
, 0x1d88, 1);
139 so_data (so
, (1 << 12) | h
);
141 so_ref(so
, &nv30
->state
.hw
[NV30_STATE_FB
]);
145 struct nv30_state_entry nv30_state_framebuffer
= {
146 .validate
= nv30_state_framebuffer_validate
,