radeonsi: use u_default_transfer_inline_write
[mesa.git] / src / gallium / drivers / nv30 / nv30_texture.c
1 /*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 * SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 *
24 */
25
26 #include "util/u_inlines.h"
27 #include "util/u_format.h"
28
29 #include "nouveau/nv_object.xml.h"
30 #include "nv30-40_3d.xml.h"
31 #include "nv30_context.h"
32 #include "nv30_format.h"
33
34 #define NV30_3D_TEX_WRAP_S_MIRROR_REPEAT NV30_3D_TEX_WRAP_S_MIRRORED_REPEAT
35 #define NV30_WRAP(n) \
36 case PIPE_TEX_WRAP_##n: ret = NV30_3D_TEX_WRAP_S_##n; break
37 #define NV40_WRAP(n) \
38 case PIPE_TEX_WRAP_##n: ret = NV40_3D_TEX_WRAP_S_##n; break
39
40 static INLINE unsigned
41 wrap_mode(unsigned pipe)
42 {
43 unsigned ret = NV30_3D_TEX_WRAP_S_REPEAT;
44
45 switch (pipe) {
46 NV30_WRAP(REPEAT);
47 NV30_WRAP(MIRROR_REPEAT);
48 NV30_WRAP(CLAMP_TO_EDGE);
49 NV30_WRAP(CLAMP_TO_BORDER);
50 NV30_WRAP(CLAMP);
51 NV40_WRAP(MIRROR_CLAMP_TO_EDGE);
52 NV40_WRAP(MIRROR_CLAMP_TO_BORDER);
53 NV40_WRAP(MIRROR_CLAMP);
54 default:
55 break;
56 }
57
58 return ret >> NV30_3D_TEX_WRAP_S__SHIFT;
59 }
60
61 static INLINE unsigned
62 filter_mode(const struct pipe_sampler_state *cso)
63 {
64 unsigned filter;
65
66 switch (cso->mag_img_filter) {
67 case PIPE_TEX_FILTER_LINEAR:
68 filter = NV30_3D_TEX_FILTER_MAG_LINEAR;
69 break;
70 default:
71 filter = NV30_3D_TEX_FILTER_MAG_NEAREST;
72 break;
73 }
74
75 switch (cso->min_img_filter) {
76 case PIPE_TEX_FILTER_LINEAR:
77 switch (cso->min_mip_filter) {
78 case PIPE_TEX_MIPFILTER_NEAREST:
79 filter |= NV30_3D_TEX_FILTER_MIN_LINEAR_MIPMAP_NEAREST;
80 break;
81 case PIPE_TEX_MIPFILTER_LINEAR:
82 filter |= NV30_3D_TEX_FILTER_MIN_LINEAR_MIPMAP_LINEAR;
83 break;
84 default:
85 filter |= NV30_3D_TEX_FILTER_MIN_LINEAR;
86 break;
87 }
88 break;
89 default:
90 switch (cso->min_mip_filter) {
91 case PIPE_TEX_MIPFILTER_NEAREST:
92 filter |= NV30_3D_TEX_FILTER_MIN_NEAREST_MIPMAP_NEAREST;
93 break;
94 case PIPE_TEX_MIPFILTER_LINEAR:
95 filter |= NV30_3D_TEX_FILTER_MIN_NEAREST_MIPMAP_LINEAR;
96 break;
97 default:
98 filter |= NV30_3D_TEX_FILTER_MIN_NEAREST;
99 break;
100 }
101 break;
102 }
103
104 return filter;
105 }
106
107 static INLINE unsigned
108 compare_mode(const struct pipe_sampler_state *cso)
109 {
110 if (cso->compare_mode != PIPE_TEX_COMPARE_R_TO_TEXTURE)
111 return 0;
112
113 switch (cso->compare_func) {
114 case PIPE_FUNC_NEVER : return NV30_3D_TEX_WRAP_RCOMP_NEVER;
115 case PIPE_FUNC_GREATER : return NV30_3D_TEX_WRAP_RCOMP_GREATER;
116 case PIPE_FUNC_EQUAL : return NV30_3D_TEX_WRAP_RCOMP_EQUAL;
117 case PIPE_FUNC_GEQUAL : return NV30_3D_TEX_WRAP_RCOMP_GEQUAL;
118 case PIPE_FUNC_LESS : return NV30_3D_TEX_WRAP_RCOMP_LESS;
119 case PIPE_FUNC_NOTEQUAL: return NV30_3D_TEX_WRAP_RCOMP_NOTEQUAL;
120 case PIPE_FUNC_LEQUAL : return NV30_3D_TEX_WRAP_RCOMP_LEQUAL;
121 case PIPE_FUNC_ALWAYS : return NV30_3D_TEX_WRAP_RCOMP_ALWAYS;
122 default:
123 return 0;
124 }
125 }
126
127 static void *
128 nv30_sampler_state_create(struct pipe_context *pipe,
129 const struct pipe_sampler_state *cso)
130 {
131 struct nouveau_object *eng3d = nv30_context(pipe)->screen->eng3d;
132 struct nv30_sampler_state *so;
133 const float max_lod = 15.0 + (255.0 / 256.0);
134
135 so = MALLOC_STRUCT(nv30_sampler_state);
136 if (!so)
137 return NULL;
138
139 so->pipe = *cso;
140 so->fmt = 0;
141 so->wrap = (wrap_mode(cso->wrap_s) << NV30_3D_TEX_WRAP_S__SHIFT) |
142 (wrap_mode(cso->wrap_t) << NV30_3D_TEX_WRAP_T__SHIFT) |
143 (wrap_mode(cso->wrap_r) << NV30_3D_TEX_WRAP_R__SHIFT);
144 so->en = 0;
145 so->wrap |= compare_mode(cso);
146 so->filt = filter_mode(cso) | 0x00002000;
147 so->bcol = (float_to_ubyte(cso->border_color.f[3]) << 24) |
148 (float_to_ubyte(cso->border_color.f[0]) << 16) |
149 (float_to_ubyte(cso->border_color.f[1]) << 8) |
150 (float_to_ubyte(cso->border_color.f[2]) << 0);
151
152 if (eng3d->oclass >= NV40_3D_CLASS) {
153 unsigned aniso = cso->max_anisotropy;
154
155 if (!cso->normalized_coords)
156 so->fmt |= NV40_3D_TEX_FORMAT_RECT;
157
158 if (aniso > 1) {
159 if (aniso >= 16) so->en |= NV40_3D_TEX_ENABLE_ANISO_16X;
160 else if (aniso >= 12) so->en |= NV40_3D_TEX_ENABLE_ANISO_12X;
161 else if (aniso >= 10) so->en |= NV40_3D_TEX_ENABLE_ANISO_10X;
162 else if (aniso >= 8) so->en |= NV40_3D_TEX_ENABLE_ANISO_8X;
163 else if (aniso >= 6) so->en |= NV40_3D_TEX_ENABLE_ANISO_6X;
164 else if (aniso >= 4) so->en |= NV40_3D_TEX_ENABLE_ANISO_4X;
165 else so->en |= NV40_3D_TEX_ENABLE_ANISO_2X;
166
167 so->wrap |= nv30_context(pipe)->config.aniso;
168 }
169 } else {
170 so->en |= NV30_3D_TEX_ENABLE_ENABLE;
171
172 if (cso->max_anisotropy >= 8) so->en |= NV30_3D_TEX_ENABLE_ANISO_8X;
173 else if (cso->max_anisotropy >= 4) so->en |= NV30_3D_TEX_ENABLE_ANISO_4X;
174 else if (cso->max_anisotropy >= 2) so->en |= NV30_3D_TEX_ENABLE_ANISO_2X;
175 }
176
177 so->filt |= (int)(cso->lod_bias * 256.0) & 0x1fff;
178 so->max_lod = (int)(CLAMP(cso->max_lod, 0.0, max_lod) * 256.0);
179 so->min_lod = (int)(CLAMP(cso->min_lod, 0.0, max_lod) * 256.0);
180 return so;
181 }
182
183 static void
184 nv30_sampler_state_delete(struct pipe_context *pipe, void *hwcso)
185 {
186 FREE(hwcso);
187 }
188
189 static INLINE uint32_t
190 swizzle(const struct nv30_texfmt *fmt, unsigned cmp, unsigned swz)
191 {
192 uint32_t data = fmt->swz[swz].src << 8;
193 if (swz <= PIPE_SWIZZLE_ALPHA)
194 data |= fmt->swz[swz].cmp;
195 else
196 data |= fmt->swz[cmp].cmp;
197 return data;
198 }
199
200 static struct pipe_sampler_view *
201 nv30_sampler_view_create(struct pipe_context *pipe, struct pipe_resource *pt,
202 const struct pipe_sampler_view *tmpl)
203 {
204 const struct nv30_texfmt *fmt = nv30_texfmt(pipe->screen, tmpl->format);
205 struct nouveau_object *eng3d = nv30_context(pipe)->screen->eng3d;
206 struct nv30_miptree *mt = nv30_miptree(pt);
207 struct nv30_sampler_view *so;
208
209 so = MALLOC_STRUCT(nv30_sampler_view);
210 if (!so)
211 return NULL;
212 so->pipe = *tmpl;
213 so->pipe.reference.count = 1;
214 so->pipe.texture = NULL;
215 so->pipe.context = pipe;
216 pipe_resource_reference(&so->pipe.texture, pt);
217
218 so->fmt = NV30_3D_TEX_FORMAT_NO_BORDER;
219 switch (pt->target) {
220 case PIPE_TEXTURE_1D:
221 so->fmt |= NV30_3D_TEX_FORMAT_DIMS_1D;
222 break;
223 case PIPE_TEXTURE_CUBE:
224 so->fmt |= NV30_3D_TEX_FORMAT_CUBIC;
225 case PIPE_TEXTURE_2D:
226 case PIPE_TEXTURE_RECT:
227 so->fmt |= NV30_3D_TEX_FORMAT_DIMS_2D;
228 break;
229 case PIPE_TEXTURE_3D:
230 so->fmt |= NV30_3D_TEX_FORMAT_DIMS_3D;
231 break;
232 default:
233 assert(0);
234 so->fmt |= NV30_3D_TEX_FORMAT_DIMS_1D;
235 break;
236 }
237
238 so->filt = fmt->filter;
239 so->wrap = fmt->wrap;
240 so->swz = fmt->swizzle;
241 so->swz |= swizzle(fmt, 3, tmpl->swizzle_a);
242 so->swz |= swizzle(fmt, 0, tmpl->swizzle_r) << 2;
243 so->swz |= swizzle(fmt, 1, tmpl->swizzle_g) << 4;
244 so->swz |= swizzle(fmt, 2, tmpl->swizzle_b) << 6;
245
246 /* apparently, we need to ignore the t coordinate for 1D textures to
247 * fix piglit tex1d-2dborder
248 */
249 so->wrap_mask = ~0;
250 if (pt->target == PIPE_TEXTURE_1D) {
251 so->wrap_mask &= ~NV30_3D_TEX_WRAP_T__MASK;
252 so->wrap |= NV30_3D_TEX_WRAP_T_REPEAT;
253 }
254
255 /* yet more hardware suckage, can't filter 32-bit float formats */
256 switch (tmpl->format) {
257 case PIPE_FORMAT_R32_FLOAT:
258 case PIPE_FORMAT_R32G32B32A32_FLOAT:
259 so->filt_mask = ~(NV30_3D_TEX_FILTER_MIN__MASK |
260 NV30_3D_TEX_FILTER_MAG__MASK);
261 so->filt |= NV30_3D_TEX_FILTER_MIN_NEAREST |
262 NV30_3D_TEX_FILTER_MAG_NEAREST;
263 break;
264 default:
265 so->filt_mask = ~0;
266 break;
267 }
268
269 so->npot_size0 = (pt->width0 << 16) | pt->height0;
270 if (eng3d->oclass >= NV40_3D_CLASS) {
271 so->npot_size1 = (pt->depth0 << 20) | mt->uniform_pitch;
272 if (!mt->swizzled)
273 so->fmt |= NV40_3D_TEX_FORMAT_LINEAR;
274 so->fmt |= 0x00008000;
275 so->fmt |= (pt->last_level + 1) << NV40_3D_TEX_FORMAT_MIPMAP_COUNT__SHIFT;
276 } else {
277 so->swz |= mt->uniform_pitch << NV30_3D_TEX_SWIZZLE_RECT_PITCH__SHIFT;
278 if (pt->last_level)
279 so->fmt |= NV30_3D_TEX_FORMAT_MIPMAP;
280 so->fmt |= util_logbase2(pt->width0) << 20;
281 so->fmt |= util_logbase2(pt->height0) << 24;
282 so->fmt |= util_logbase2(pt->depth0) << 28;
283 so->fmt |= 0x00010000;
284 }
285
286 so->base_lod = so->pipe.u.tex.first_level << 8;
287 so->high_lod = MIN2(pt->last_level, so->pipe.u.tex.last_level) << 8;
288 return &so->pipe;
289 }
290
291 static void
292 nv30_sampler_view_destroy(struct pipe_context *pipe,
293 struct pipe_sampler_view *view)
294 {
295 pipe_resource_reference(&view->texture, NULL);
296 FREE(view);
297 }
298
299 void
300 nv30_texture_init(struct pipe_context *pipe)
301 {
302 pipe->create_sampler_state = nv30_sampler_state_create;
303 pipe->delete_sampler_state = nv30_sampler_state_delete;
304 pipe->create_sampler_view = nv30_sampler_view_create;
305 pipe->sampler_view_destroy = nv30_sampler_view_destroy;
306 }