src/gallium/drivers/nv30/nv30_vbo.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  *
  24  */
  25
  26 #include "util/u_format.h"
  27 #include "util/u_inlines.h"
  28 #include "translate/translate.h"
  29
  30 #include "nouveau/nouveau_fence.h"
  31 #include "nouveau/nv_object.xml.h"
  32 #include "nv30-40_3d.xml.h"
  33 #include "nv30_context.h"
  34 #include "nv30_format.h"
  35
  36 static void
  37 nv30_emit_vtxattr(struct nv30_context *nv30, struct pipe_vertex_buffer *vb,
  38                   struct pipe_vertex_element *ve, unsigned attr)
  39 {
  40    const unsigned nc = util_format_get_nr_components(ve->src_format);
  41    struct nouveau_pushbuf *push = nv30->base.pushbuf;
  42    struct nv04_resource *res = nv04_resource(vb->buffer);
  43    const void *data;
  44    float v[4];
  45
  46    data = nouveau_resource_map_offset(&nv30->base, res, vb->buffer_offset +
  47                                       ve->src_offset, NOUVEAU_BO_RD);
  48
  49    util_format_read_4f(ve->src_format, v, 0, data, 0, 0, 0, 1, 1);
  50
  51    switch (nc) {
  52    case 4:
  53       BEGIN_NV04(push, NV30_3D(VTX_ATTR_4F(attr)), 4);
  54       PUSH_DATAf(push, v[0]);
  55       PUSH_DATAf(push, v[1]);
  56       PUSH_DATAf(push, v[2]);
  57       PUSH_DATAf(push, v[3]);
  58       break;
  59    case 3:
  60       BEGIN_NV04(push, NV30_3D(VTX_ATTR_3F(attr)), 3);
  61       PUSH_DATAf(push, v[0]);
  62       PUSH_DATAf(push, v[1]);
  63       PUSH_DATAf(push, v[2]);
  64       break;
  65    case 2:
  66       BEGIN_NV04(push, NV30_3D(VTX_ATTR_2F(attr)), 2);
  67       PUSH_DATAf(push, v[0]);
  68       PUSH_DATAf(push, v[1]);
  69       break;
  70    case 1:
  71       BEGIN_NV04(push, NV30_3D(VTX_ATTR_1F(attr)), 1);
  72       PUSH_DATAf(push, v[0]);
  73       break;
  74    default:
  75       assert(0);
  76       break;
  77    }
  78 }
  79
  80 static INLINE void
  81 nv30_vbuf_range(struct nv30_context *nv30, int vbi,
  82                 uint32_t *base, uint32_t *size)
  83 {
  84    assert(nv30->vbo_max_index != ~0);
  85    *base = nv30->vbo_min_index * nv30->vtxbuf[vbi].stride;
  86    *size = (nv30->vbo_max_index -
  87             nv30->vbo_min_index + 1) * nv30->vtxbuf[vbi].stride;
  88 }
  89
  90 static void
  91 nv30_prevalidate_vbufs(struct nv30_context *nv30)
  92 {
  93    struct pipe_vertex_buffer *vb;
  94    struct nv04_resource *buf;
  95    int i;
  96    uint32_t base, size;
  97
  98    nv30->vbo_fifo = nv30->vbo_user = 0;
  99
 100    for (i = 0; i < nv30->num_vtxbufs; i++) {
 101       vb = &nv30->vtxbuf[i];
 102       if (!vb->stride || !vb->buffer) /* NOTE: user_buffer not implemented */
 103          continue;
 104       buf = nv04_resource(vb->buffer);
 105
 106       /* NOTE: user buffers with temporary storage count as mapped by GPU */
 107       if (!nouveau_resource_mapped_by_gpu(vb->buffer)) {
 108          if (nv30->vbo_push_hint) {
 109             nv30->vbo_fifo = ~0;
 110             continue;
 111          } else {
 112             if (buf->status & NOUVEAU_BUFFER_STATUS_USER_MEMORY) {
 113                nv30->vbo_user |= 1 << i;
 114                assert(vb->stride > vb->buffer_offset);
 115                nv30_vbuf_range(nv30, i, &base, &size);
 116                nouveau_user_buffer_upload(&nv30->base, buf, base, size);
 117             } else {
 118                nouveau_buffer_migrate(&nv30->base, buf, NOUVEAU_BO_GART);
 119             }
 120             nv30->base.vbo_dirty = TRUE;
 121          }
 122       }
 123    }
 124 }
 125
 126 static void
 127 nv30_update_user_vbufs(struct nv30_context *nv30)
 128 {
 129    struct nouveau_pushbuf *push = nv30->base.pushbuf;
 130    uint32_t base, offset, size;
 131    int i;
 132    uint32_t written = 0;
 133
 134    for (i = 0; i < nv30->vertex->num_elements; i++) {
 135       struct pipe_vertex_element *ve = &nv30->vertex->pipe[i];
 136       const int b = ve->vertex_buffer_index;
 137       struct pipe_vertex_buffer *vb = &nv30->vtxbuf[b];
 138       struct nv04_resource *buf = nv04_resource(vb->buffer);
 139
 140       if (!(nv30->vbo_user & (1 << b)))
 141          continue;
 142
 143       if (!vb->stride) {
 144          nv30_emit_vtxattr(nv30, vb, ve, i);
 145          continue;
 146       }
 147       nv30_vbuf_range(nv30, b, &base, &size);
 148
 149       if (!(written & (1 << b))) {
 150          written |= 1 << b;
 151          nouveau_user_buffer_upload(&nv30->base, buf, base, size);
 152       }
 153
 154       offset = vb->buffer_offset + ve->src_offset;
 155
 156       BEGIN_NV04(push, NV30_3D(VTXBUF(i)), 1);
 157       PUSH_RESRC(push, NV30_3D(VTXBUF(i)), BUFCTX_VTXTMP, buf, offset,
 158                        NOUVEAU_BO_LOW | NOUVEAU_BO_RD,
 159                        0, NV30_3D_VTXBUF_DMA1);
 160    }
 161    nv30->base.vbo_dirty = TRUE;
 162 }
 163
 164 static INLINE void
 165 nv30_release_user_vbufs(struct nv30_context *nv30)
 166 {
 167    uint32_t vbo_user = nv30->vbo_user;
 168
 169    while (vbo_user) {
 170       int i = ffs(vbo_user) - 1;
 171       vbo_user &= ~(1 << i);
 172
 173       nouveau_buffer_release_gpu_storage(nv04_resource(nv30->vtxbuf[i].buffer));
 174    }
 175
 176    nouveau_bufctx_reset(nv30->bufctx, BUFCTX_VTXTMP);
 177 }
 178
 179 void
 180 nv30_vbo_validate(struct nv30_context *nv30)
 181 {
 182    struct nouveau_pushbuf *push = nv30->base.pushbuf;
 183    struct nv30_vertex_stateobj *vertex = nv30->vertex;
 184    struct pipe_vertex_element *ve;
 185    struct pipe_vertex_buffer *vb;
 186    unsigned i, redefine;
 187
 188    nouveau_bufctx_reset(nv30->bufctx, BUFCTX_VTXBUF);
 189    if (!nv30->vertex || nv30->draw_flags)
 190       return;
 191
 192    if (unlikely(vertex->need_conversion)) {
 193       nv30->vbo_fifo = ~0;
 194       nv30->vbo_user = 0;
 195    } else {
 196       nv30_prevalidate_vbufs(nv30);
 197    }
 198
 199    if (!PUSH_SPACE(push, 128))
 200       return;
 201
 202    redefine = MAX2(vertex->num_elements, nv30->state.num_vtxelts);
 203    BEGIN_NV04(push, NV30_3D(VTXFMT(0)), redefine);
 204
 205    for (i = 0; i < vertex->num_elements; i++) {
 206       ve = &vertex->pipe[i];
 207       vb = &nv30->vtxbuf[ve->vertex_buffer_index];
 208
 209       if (likely(vb->stride) || nv30->vbo_fifo)
 210          PUSH_DATA (push, (vb->stride << 8) | vertex->element[i].state);
 211       else
 212          PUSH_DATA (push, NV30_3D_VTXFMT_TYPE_V32_FLOAT);
 213    }
 214
 215    for (; i < nv30->state.num_vtxelts; i++) {
 216       PUSH_DATA (push, NV30_3D_VTXFMT_TYPE_V32_FLOAT);
 217    }
 218
 219    for (i = 0; i < vertex->num_elements; i++) {
 220       struct nv04_resource *res;
 221       unsigned offset;
 222       boolean user;
 223
 224       ve = &vertex->pipe[i];
 225       vb = &nv30->vtxbuf[ve->vertex_buffer_index];
 226       user = (nv30->vbo_user & (1 << ve->vertex_buffer_index));
 227
 228       res = nv04_resource(vb->buffer);
 229
 230       if (nv30->vbo_fifo || unlikely(vb->stride == 0)) {
 231          if (!nv30->vbo_fifo)
 232             nv30_emit_vtxattr(nv30, vb, ve, i);
 233          continue;
 234       }
 235
 236       offset = ve->src_offset + vb->buffer_offset;
 237
 238       BEGIN_NV04(push, NV30_3D(VTXBUF(i)), 1);
 239       PUSH_RESRC(push, NV30_3D(VTXBUF(i)), user ? BUFCTX_VTXTMP : BUFCTX_VTXBUF,
 240                        res, offset, NOUVEAU_BO_LOW | NOUVEAU_BO_RD,
 241                        0, NV30_3D_VTXBUF_DMA1);
 242    }
 243
 244    nv30->state.num_vtxelts = vertex->num_elements;
 245 }
 246
 247 static void *
 248 nv30_vertex_state_create(struct pipe_context *pipe, unsigned num_elements,
 249                          const struct pipe_vertex_element *elements)
 250 {
 251     struct nv30_vertex_stateobj *so;
 252     struct translate_key transkey;
 253     unsigned i;
 254
 255     assert(num_elements);
 256
 257     so = MALLOC(sizeof(*so) + sizeof(*so->element) * num_elements);
 258     if (!so)
 259         return NULL;
 260     memcpy(so->pipe, elements, sizeof(*elements) * num_elements);
 261     so->num_elements = num_elements;
 262     so->need_conversion = FALSE;
 263
 264     transkey.nr_elements = 0;
 265     transkey.output_stride = 0;
 266
 267     for (i = 0; i < num_elements; i++) {
 268         const struct pipe_vertex_element *ve = &elements[i];
 269         const unsigned vbi = ve->vertex_buffer_index;
 270         enum pipe_format fmt = ve->src_format;
 271
 272         so->element[i].state = nv30_vtxfmt(pipe->screen, fmt)->hw;
 273         if (!so->element[i].state) {
 274             switch (util_format_get_nr_components(fmt)) {
 275             case 1: fmt = PIPE_FORMAT_R32_FLOAT; break;
 276             case 2: fmt = PIPE_FORMAT_R32G32_FLOAT; break;
 277             case 3: fmt = PIPE_FORMAT_R32G32B32_FLOAT; break;
 278             case 4: fmt = PIPE_FORMAT_R32G32B32A32_FLOAT; break;
 279             default:
 280                 assert(0);
 281                 FREE(so);
 282                 return NULL;
 283             }
 284             so->element[i].state = nv30_vtxfmt(pipe->screen, fmt)->hw;
 285             so->need_conversion = TRUE;
 286         }
 287
 288         if (1) {
 289             unsigned j = transkey.nr_elements++;
 290
 291             transkey.element[j].type = TRANSLATE_ELEMENT_NORMAL;
 292             transkey.element[j].input_format = ve->src_format;
 293             transkey.element[j].input_buffer = vbi;
 294             transkey.element[j].input_offset = ve->src_offset;
 295             transkey.element[j].instance_divisor = ve->instance_divisor;
 296
 297             transkey.element[j].output_format = fmt;
 298             transkey.element[j].output_offset = transkey.output_stride;
 299             transkey.output_stride += (util_format_get_stride(fmt, 1) + 3) & ~3;
 300         }
 301     }
 302
 303     so->translate = translate_create(&transkey);
 304     so->vtx_size = transkey.output_stride / 4;
 305     so->vtx_per_packet_max = NV04_PFIFO_MAX_PACKET_LEN / MAX2(so->vtx_size, 1);
 306     return so;
 307 }
 308
 309 static void
 310 nv30_vertex_state_delete(struct pipe_context *pipe, void *hwcso)
 311 {
 312    struct nv30_vertex_stateobj *so = hwcso;
 313
 314    if (so->translate)
 315       so->translate->release(so->translate);
 316    FREE(hwcso);
 317 }
 318
 319 static void
 320 nv30_vertex_state_bind(struct pipe_context *pipe, void *hwcso)
 321 {
 322    struct nv30_context *nv30 = nv30_context(pipe);
 323
 324    nv30->vertex = hwcso;
 325    nv30->dirty |= NV30_NEW_VERTEX;
 326 }
 327
 328 static void
 329 nv30_draw_arrays(struct nv30_context *nv30,
 330                  unsigned mode, unsigned start, unsigned count,
 331                  unsigned instance_count)
 332 {
 333    struct nouveau_pushbuf *push = nv30->base.pushbuf;
 334    unsigned prim;
 335
 336    prim = nv30_prim_gl(mode);
 337
 338    BEGIN_NV04(push, NV30_3D(VERTEX_BEGIN_END), 1);
 339    PUSH_DATA (push, prim);
 340    while (count) {
 341       const unsigned mpush = 2047 * 256;
 342       unsigned npush  = (count > mpush) ? mpush : count;
 343       unsigned wpush  = ((npush + 255) & ~255) >> 8;
 344
 345       count -= npush;
 346
 347       BEGIN_NI04(push, NV30_3D(VB_VERTEX_BATCH), wpush);
 348       while (npush >= 256) {
 349          PUSH_DATA (push, 0xff000000 | start);
 350          start += 256;
 351          npush -= 256;
 352       }
 353
 354       if (npush)
 355          PUSH_DATA (push, ((npush - 1) << 24) | start);
 356    }
 357    BEGIN_NV04(push, NV30_3D(VERTEX_BEGIN_END), 1);
 358    PUSH_DATA (push, NV30_3D_VERTEX_BEGIN_END_STOP);
 359 }
 360
 361 static void
 362 nv30_draw_elements_inline_u08(struct nouveau_pushbuf *push, const uint8_t *map,
 363                               unsigned start, unsigned count)
 364 {
 365    map += start;
 366
 367    if (count & 1) {
 368       BEGIN_NV04(push, NV30_3D(VB_ELEMENT_U32), 1);
 369       PUSH_DATA (push, *map++);
 370    }
 371
 372    count >>= 1;
 373    while (count) {
 374       unsigned npush = MIN2(count, NV04_PFIFO_MAX_PACKET_LEN);
 375       count -= npush;
 376
 377       BEGIN_NI04(push, NV30_3D(VB_ELEMENT_U16), npush);
 378       while (npush--) {
 379          PUSH_DATA (push, (map[1] << 16) | map[0]);
 380          map += 2;
 381       }
 382    }
 383
 384 }
 385
 386 static void
 387 nv30_draw_elements_inline_u16(struct nouveau_pushbuf *push, const uint16_t *map,
 388                               unsigned start, unsigned count)
 389 {
 390    map += start;
 391
 392    if (count & 1) {
 393       BEGIN_NV04(push, NV30_3D(VB_ELEMENT_U32), 1);
 394       PUSH_DATA (push, *map++);
 395    }
 396
 397    count >>= 1;
 398    while (count) {
 399       unsigned npush = MIN2(count, NV04_PFIFO_MAX_PACKET_LEN);
 400       count -= npush;
 401
 402       BEGIN_NI04(push, NV30_3D(VB_ELEMENT_U16), npush);
 403       while (npush--) {
 404          PUSH_DATA (push, (map[1] << 16) | map[0]);
 405          map += 2;
 406       }
 407    }
 408 }
 409
 410 static void
 411 nv30_draw_elements_inline_u32(struct nouveau_pushbuf *push, const uint32_t *map,
 412                               unsigned start, unsigned count)
 413 {
 414    map += start;
 415
 416    while (count) {
 417       const unsigned nr = MIN2(count, NV04_PFIFO_MAX_PACKET_LEN);
 418
 419       BEGIN_NI04(push, NV30_3D(VB_ELEMENT_U32), nr);
 420       PUSH_DATAp(push, map, nr);
 421
 422       map += nr;
 423       count -= nr;
 424    }
 425 }
 426
 427 static void
 428 nv30_draw_elements_inline_u32_short(struct nouveau_pushbuf *push,
 429                                     const uint32_t *map,
 430                                     unsigned start, unsigned count)
 431 {
 432    map += start;
 433
 434    if (count & 1) {
 435       BEGIN_NV04(push, NV30_3D(VB_ELEMENT_U32), 1);
 436       PUSH_DATA (push, *map++);
 437    }
 438
 439    count >>= 1;
 440    while (count) {
 441       unsigned npush = MIN2(count, NV04_PFIFO_MAX_PACKET_LEN);;
 442       count -= npush;
 443
 444       BEGIN_NI04(push, NV30_3D(VB_ELEMENT_U16), npush);
 445       while (npush--) {
 446          PUSH_DATA (push, (map[1] << 16) | map[0]);
 447          map += 2;
 448       }
 449    }
 450 }
 451
 452 static void
 453 nv30_draw_elements(struct nv30_context *nv30, boolean shorten,
 454                    unsigned mode, unsigned start, unsigned count,
 455                    unsigned instance_count, int32_t index_bias)
 456 {
 457    const unsigned index_size = nv30->idxbuf.index_size;
 458    struct nouveau_pushbuf *push = nv30->base.pushbuf;
 459    struct nouveau_object *eng3d = nv30->screen->eng3d;
 460    unsigned prim = nv30_prim_gl(mode);
 461
 462 #if 0 /*XXX*/
 463    if (index_bias != nv30->state.index_bias) {
 464       BEGIN_NV04(push, NV30_3D(VB_ELEMENT_BASE), 1);
 465       PUSH_DATA (push, index_bias);
 466       nv30->state.index_bias = index_bias;
 467    }
 468 #endif
 469
 470    if (eng3d->oclass == NV40_3D_CLASS && index_size > 1 &&
 471        nv30->idxbuf.buffer) {
 472       struct nv04_resource *res = nv04_resource(nv30->idxbuf.buffer);
 473       unsigned offset = nv30->idxbuf.offset;
 474
 475       assert(nouveau_resource_mapped_by_gpu(&res->base));
 476
 477       BEGIN_NV04(push, NV30_3D(IDXBUF_OFFSET), 2);
 478       PUSH_RESRC(push, NV30_3D(IDXBUF_OFFSET), BUFCTX_IDXBUF, res, offset,
 479                        NOUVEAU_BO_LOW | NOUVEAU_BO_RD, 0, 0);
 480       PUSH_MTHD (push, NV30_3D(IDXBUF_FORMAT), BUFCTX_IDXBUF, res->bo,
 481                        (index_size == 2) ? 0x00000010 : 0x00000000,
 482                        res->domain | NOUVEAU_BO_RD,
 483                        0, NV30_3D_IDXBUF_FORMAT_DMA1);
 484       BEGIN_NV04(push, NV30_3D(VERTEX_BEGIN_END), 1);
 485       PUSH_DATA (push, prim);
 486       while (count) {
 487          const unsigned mpush = 2047 * 256;
 488          unsigned npush  = (count > mpush) ? mpush : count;
 489          unsigned wpush  = ((npush + 255) & ~255) >> 8;
 490
 491          count -= npush;
 492
 493          BEGIN_NI04(push, NV30_3D(VB_INDEX_BATCH), wpush);
 494          while (npush >= 256) {
 495             PUSH_DATA (push, 0xff000000 | start);
 496             start += 256;
 497             npush -= 256;
 498          }
 499
 500          if (npush)
 501             PUSH_DATA (push, ((npush - 1) << 24) | start);
 502       }
 503       BEGIN_NV04(push, NV30_3D(VERTEX_BEGIN_END), 1);
 504       PUSH_DATA (push, NV30_3D_VERTEX_BEGIN_END_STOP);
 505       PUSH_RESET(push, BUFCTX_IDXBUF);
 506    } else {
 507       const void *data;
 508       if (nv30->idxbuf.buffer)
 509          data = nouveau_resource_map_offset(&nv30->base,
 510                                             nv04_resource(nv30->idxbuf.buffer),
 511                                             nv30->idxbuf.offset, NOUVEAU_BO_RD);
 512       else
 513          data = nv30->idxbuf.user_buffer;
 514       if (!data)
 515          return;
 516
 517       BEGIN_NV04(push, NV30_3D(VERTEX_BEGIN_END), 1);
 518       PUSH_DATA (push, prim);
 519       switch (index_size) {
 520       case 1:
 521          nv30_draw_elements_inline_u08(push, data, start, count);
 522          break;
 523       case 2:
 524          nv30_draw_elements_inline_u16(push, data, start, count);
 525          break;
 526       case 4:
 527          if (shorten)
 528             nv30_draw_elements_inline_u32_short(push, data, start, count);
 529          else
 530             nv30_draw_elements_inline_u32(push, data, start, count);
 531          break;
 532       default:
 533          assert(0);
 534          return;
 535       }
 536       BEGIN_NV04(push, NV30_3D(VERTEX_BEGIN_END), 1);
 537       PUSH_DATA (push, NV30_3D_VERTEX_BEGIN_END_STOP);
 538    }
 539 }
 540
 541 static void
 542 nv30_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info)
 543 {
 544    struct nv30_context *nv30 = nv30_context(pipe);
 545    struct nouveau_pushbuf *push = nv30->base.pushbuf;
 546
 547    /* For picking only a few vertices from a large user buffer, push is better,
 548     * if index count is larger and we expect repeated vertices, suggest upload.
 549     */
 550    nv30->vbo_push_hint = /* the 64 is heuristic */
 551       !(info->indexed &&
 552         ((info->max_index - info->min_index + 64) < info->count));
 553
 554    nv30->vbo_min_index = info->min_index;
 555    nv30->vbo_max_index = info->max_index;
 556
 557    if (nv30->vbo_push_hint != !!nv30->vbo_fifo)
 558       nv30->dirty |= NV30_NEW_ARRAYS;
 559
 560    push->user_priv = &nv30->bufctx;
 561    if (nv30->vbo_user && !(nv30->dirty & (NV30_NEW_VERTEX | NV30_NEW_ARRAYS)))
 562       nv30_update_user_vbufs(nv30);
 563
 564    nv30_state_validate(nv30, TRUE);
 565    if (nv30->draw_flags) {
 566       nv30_render_vbo(pipe, info);
 567       return;
 568    } else
 569    if (nv30->vbo_fifo) {
 570       nv30_push_vbo(nv30, info);
 571       return;
 572    }
 573
 574    if (nv30->base.vbo_dirty) {
 575       BEGIN_NV04(push, NV30_3D(VTX_CACHE_INVALIDATE_1710), 1);
 576       PUSH_DATA (push, 0);
 577       nv30->base.vbo_dirty = FALSE;
 578    }
 579
 580    if (!info->indexed) {
 581       nv30_draw_arrays(nv30,
 582                        info->mode, info->start, info->count,
 583                        info->instance_count);
 584    } else {
 585       boolean shorten = info->max_index <= 65535;
 586
 587       if (info->primitive_restart != nv30->state.prim_restart) {
 588          if (info->primitive_restart) {
 589             BEGIN_NV04(push, NV40_3D(PRIM_RESTART_ENABLE), 2);
 590             PUSH_DATA (push, 1);
 591             PUSH_DATA (push, info->restart_index);
 592
 593             if (info->restart_index > 65535)
 594                shorten = FALSE;
 595          } else {
 596             BEGIN_NV04(push, NV40_3D(PRIM_RESTART_ENABLE), 1);
 597             PUSH_DATA (push, 0);
 598          }
 599          nv30->state.prim_restart = info->primitive_restart;
 600       } else
 601       if (info->primitive_restart) {
 602          BEGIN_NV04(push, NV40_3D(PRIM_RESTART_INDEX), 1);
 603          PUSH_DATA (push, info->restart_index);
 604
 605          if (info->restart_index > 65535)
 606             shorten = FALSE;
 607       }
 608
 609       nv30_draw_elements(nv30, shorten,
 610                          info->mode, info->start, info->count,
 611                          info->instance_count, info->index_bias);
 612    }
 613
 614    nv30_state_release(nv30);
 615    nv30_release_user_vbufs(nv30);
 616 }
 617
 618 void
 619 nv30_vbo_init(struct pipe_context *pipe)
 620 {
 621    pipe->create_vertex_elements_state = nv30_vertex_state_create;
 622    pipe->delete_vertex_elements_state = nv30_vertex_state_delete;
 623    pipe->bind_vertex_elements_state = nv30_vertex_state_bind;
 624    pipe->draw_vbo = nv30_draw_vbo;
 625 }