2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
26 #include "util/u_format.h"
27 #include "util/u_inlines.h"
28 #include "translate/translate.h"
30 #include "nouveau/nouveau_fence.h"
31 #include "nouveau/nv_object.xml.h"
32 #include "nv30-40_3d.xml.h"
33 #include "nv30_context.h"
34 #include "nv30_format.h"
37 nv30_emit_vtxattr(struct nv30_context
*nv30
, struct pipe_vertex_buffer
*vb
,
38 struct pipe_vertex_element
*ve
, unsigned attr
)
40 const unsigned nc
= util_format_get_nr_components(ve
->src_format
);
41 struct nouveau_pushbuf
*push
= nv30
->base
.pushbuf
;
42 struct nv04_resource
*res
= nv04_resource(vb
->buffer
);
46 data
= nouveau_resource_map_offset(&nv30
->base
, res
, vb
->buffer_offset
+
47 ve
->src_offset
, NOUVEAU_BO_RD
);
49 util_format_read_4f(ve
->src_format
, v
, 0, data
, 0, 0, 0, 1, 1);
53 BEGIN_NV04(push
, NV30_3D(VTX_ATTR_4F(attr
)), 4);
54 PUSH_DATAf(push
, v
[0]);
55 PUSH_DATAf(push
, v
[1]);
56 PUSH_DATAf(push
, v
[2]);
57 PUSH_DATAf(push
, v
[3]);
60 BEGIN_NV04(push
, NV30_3D(VTX_ATTR_3F(attr
)), 3);
61 PUSH_DATAf(push
, v
[0]);
62 PUSH_DATAf(push
, v
[1]);
63 PUSH_DATAf(push
, v
[2]);
66 BEGIN_NV04(push
, NV30_3D(VTX_ATTR_2F(attr
)), 2);
67 PUSH_DATAf(push
, v
[0]);
68 PUSH_DATAf(push
, v
[1]);
71 BEGIN_NV04(push
, NV30_3D(VTX_ATTR_1F(attr
)), 1);
72 PUSH_DATAf(push
, v
[0]);
81 nv30_vbuf_range(struct nv30_context
*nv30
, int vbi
,
82 uint32_t *base
, uint32_t *size
)
84 assert(nv30
->vbo_max_index
!= ~0);
85 *base
= nv30
->vbo_min_index
* nv30
->vtxbuf
[vbi
].stride
;
86 *size
= (nv30
->vbo_max_index
-
87 nv30
->vbo_min_index
+ 1) * nv30
->vtxbuf
[vbi
].stride
;
91 nv30_prevalidate_vbufs(struct nv30_context
*nv30
)
93 struct pipe_vertex_buffer
*vb
;
94 struct nv04_resource
*buf
;
98 nv30
->vbo_fifo
= nv30
->vbo_user
= 0;
100 for (i
= 0; i
< nv30
->num_vtxbufs
; i
++) {
101 vb
= &nv30
->vtxbuf
[i
];
102 if (!vb
->stride
|| !vb
->buffer
) /* NOTE: user_buffer not implemented */
104 buf
= nv04_resource(vb
->buffer
);
106 /* NOTE: user buffers with temporary storage count as mapped by GPU */
107 if (!nouveau_resource_mapped_by_gpu(vb
->buffer
)) {
108 if (nv30
->vbo_push_hint
) {
112 if (buf
->status
& NOUVEAU_BUFFER_STATUS_USER_MEMORY
) {
113 nv30
->vbo_user
|= 1 << i
;
114 assert(vb
->stride
> vb
->buffer_offset
);
115 nv30_vbuf_range(nv30
, i
, &base
, &size
);
116 nouveau_user_buffer_upload(&nv30
->base
, buf
, base
, size
);
118 nouveau_buffer_migrate(&nv30
->base
, buf
, NOUVEAU_BO_GART
);
120 nv30
->base
.vbo_dirty
= TRUE
;
127 nv30_update_user_vbufs(struct nv30_context
*nv30
)
129 struct nouveau_pushbuf
*push
= nv30
->base
.pushbuf
;
130 uint32_t base
, offset
, size
;
132 uint32_t written
= 0;
134 for (i
= 0; i
< nv30
->vertex
->num_elements
; i
++) {
135 struct pipe_vertex_element
*ve
= &nv30
->vertex
->pipe
[i
];
136 const int b
= ve
->vertex_buffer_index
;
137 struct pipe_vertex_buffer
*vb
= &nv30
->vtxbuf
[b
];
138 struct nv04_resource
*buf
= nv04_resource(vb
->buffer
);
140 if (!(nv30
->vbo_user
& (1 << b
)))
144 nv30_emit_vtxattr(nv30
, vb
, ve
, i
);
147 nv30_vbuf_range(nv30
, b
, &base
, &size
);
149 if (!(written
& (1 << b
))) {
151 nouveau_user_buffer_upload(&nv30
->base
, buf
, base
, size
);
154 offset
= vb
->buffer_offset
+ ve
->src_offset
;
156 BEGIN_NV04(push
, NV30_3D(VTXBUF(i
)), 1);
157 PUSH_RESRC(push
, NV30_3D(VTXBUF(i
)), BUFCTX_VTXTMP
, buf
, offset
,
158 NOUVEAU_BO_LOW
| NOUVEAU_BO_RD
,
159 0, NV30_3D_VTXBUF_DMA1
);
161 nv30
->base
.vbo_dirty
= TRUE
;
165 nv30_release_user_vbufs(struct nv30_context
*nv30
)
167 uint32_t vbo_user
= nv30
->vbo_user
;
170 int i
= ffs(vbo_user
) - 1;
171 vbo_user
&= ~(1 << i
);
173 nouveau_buffer_release_gpu_storage(nv04_resource(nv30
->vtxbuf
[i
].buffer
));
176 nouveau_bufctx_reset(nv30
->bufctx
, BUFCTX_VTXTMP
);
180 nv30_vbo_validate(struct nv30_context
*nv30
)
182 struct nouveau_pushbuf
*push
= nv30
->base
.pushbuf
;
183 struct nv30_vertex_stateobj
*vertex
= nv30
->vertex
;
184 struct pipe_vertex_element
*ve
;
185 struct pipe_vertex_buffer
*vb
;
186 unsigned i
, redefine
;
188 nouveau_bufctx_reset(nv30
->bufctx
, BUFCTX_VTXBUF
);
189 if (!nv30
->vertex
|| nv30
->draw_flags
)
192 if (unlikely(vertex
->need_conversion
)) {
196 nv30_prevalidate_vbufs(nv30
);
199 if (!PUSH_SPACE(push
, 128))
202 redefine
= MAX2(vertex
->num_elements
, nv30
->state
.num_vtxelts
);
203 BEGIN_NV04(push
, NV30_3D(VTXFMT(0)), redefine
);
205 for (i
= 0; i
< vertex
->num_elements
; i
++) {
206 ve
= &vertex
->pipe
[i
];
207 vb
= &nv30
->vtxbuf
[ve
->vertex_buffer_index
];
209 if (likely(vb
->stride
) || nv30
->vbo_fifo
)
210 PUSH_DATA (push
, (vb
->stride
<< 8) | vertex
->element
[i
].state
);
212 PUSH_DATA (push
, NV30_3D_VTXFMT_TYPE_V32_FLOAT
);
215 for (; i
< nv30
->state
.num_vtxelts
; i
++) {
216 PUSH_DATA (push
, NV30_3D_VTXFMT_TYPE_V32_FLOAT
);
219 for (i
= 0; i
< vertex
->num_elements
; i
++) {
220 struct nv04_resource
*res
;
224 ve
= &vertex
->pipe
[i
];
225 vb
= &nv30
->vtxbuf
[ve
->vertex_buffer_index
];
226 user
= (nv30
->vbo_user
& (1 << ve
->vertex_buffer_index
));
228 res
= nv04_resource(vb
->buffer
);
230 if (nv30
->vbo_fifo
|| unlikely(vb
->stride
== 0)) {
232 nv30_emit_vtxattr(nv30
, vb
, ve
, i
);
236 offset
= ve
->src_offset
+ vb
->buffer_offset
;
238 BEGIN_NV04(push
, NV30_3D(VTXBUF(i
)), 1);
239 PUSH_RESRC(push
, NV30_3D(VTXBUF(i
)), user
? BUFCTX_VTXTMP
: BUFCTX_VTXBUF
,
240 res
, offset
, NOUVEAU_BO_LOW
| NOUVEAU_BO_RD
,
241 0, NV30_3D_VTXBUF_DMA1
);
244 nv30
->state
.num_vtxelts
= vertex
->num_elements
;
248 nv30_vertex_state_create(struct pipe_context
*pipe
, unsigned num_elements
,
249 const struct pipe_vertex_element
*elements
)
251 struct nv30_vertex_stateobj
*so
;
252 struct translate_key transkey
;
255 assert(num_elements
);
257 so
= MALLOC(sizeof(*so
) + sizeof(*so
->element
) * num_elements
);
260 memcpy(so
->pipe
, elements
, sizeof(*elements
) * num_elements
);
261 so
->num_elements
= num_elements
;
262 so
->need_conversion
= FALSE
;
264 transkey
.nr_elements
= 0;
265 transkey
.output_stride
= 0;
267 for (i
= 0; i
< num_elements
; i
++) {
268 const struct pipe_vertex_element
*ve
= &elements
[i
];
269 const unsigned vbi
= ve
->vertex_buffer_index
;
270 enum pipe_format fmt
= ve
->src_format
;
272 so
->element
[i
].state
= nv30_vtxfmt(pipe
->screen
, fmt
)->hw
;
273 if (!so
->element
[i
].state
) {
274 switch (util_format_get_nr_components(fmt
)) {
275 case 1: fmt
= PIPE_FORMAT_R32_FLOAT
; break;
276 case 2: fmt
= PIPE_FORMAT_R32G32_FLOAT
; break;
277 case 3: fmt
= PIPE_FORMAT_R32G32B32_FLOAT
; break;
278 case 4: fmt
= PIPE_FORMAT_R32G32B32A32_FLOAT
; break;
284 so
->element
[i
].state
= nv30_vtxfmt(pipe
->screen
, fmt
)->hw
;
285 so
->need_conversion
= TRUE
;
289 unsigned j
= transkey
.nr_elements
++;
291 transkey
.element
[j
].type
= TRANSLATE_ELEMENT_NORMAL
;
292 transkey
.element
[j
].input_format
= ve
->src_format
;
293 transkey
.element
[j
].input_buffer
= vbi
;
294 transkey
.element
[j
].input_offset
= ve
->src_offset
;
295 transkey
.element
[j
].instance_divisor
= ve
->instance_divisor
;
297 transkey
.element
[j
].output_format
= fmt
;
298 transkey
.element
[j
].output_offset
= transkey
.output_stride
;
299 transkey
.output_stride
+= (util_format_get_stride(fmt
, 1) + 3) & ~3;
303 so
->translate
= translate_create(&transkey
);
304 so
->vtx_size
= transkey
.output_stride
/ 4;
305 so
->vtx_per_packet_max
= NV04_PFIFO_MAX_PACKET_LEN
/ MAX2(so
->vtx_size
, 1);
310 nv30_vertex_state_delete(struct pipe_context
*pipe
, void *hwcso
)
312 struct nv30_vertex_stateobj
*so
= hwcso
;
315 so
->translate
->release(so
->translate
);
320 nv30_vertex_state_bind(struct pipe_context
*pipe
, void *hwcso
)
322 struct nv30_context
*nv30
= nv30_context(pipe
);
324 nv30
->vertex
= hwcso
;
325 nv30
->dirty
|= NV30_NEW_VERTEX
;
329 nv30_draw_arrays(struct nv30_context
*nv30
,
330 unsigned mode
, unsigned start
, unsigned count
,
331 unsigned instance_count
)
333 struct nouveau_pushbuf
*push
= nv30
->base
.pushbuf
;
336 prim
= nv30_prim_gl(mode
);
338 BEGIN_NV04(push
, NV30_3D(VERTEX_BEGIN_END
), 1);
339 PUSH_DATA (push
, prim
);
341 const unsigned mpush
= 2047 * 256;
342 unsigned npush
= (count
> mpush
) ? mpush
: count
;
343 unsigned wpush
= ((npush
+ 255) & ~255) >> 8;
347 BEGIN_NI04(push
, NV30_3D(VB_VERTEX_BATCH
), wpush
);
348 while (npush
>= 256) {
349 PUSH_DATA (push
, 0xff000000 | start
);
355 PUSH_DATA (push
, ((npush
- 1) << 24) | start
);
357 BEGIN_NV04(push
, NV30_3D(VERTEX_BEGIN_END
), 1);
358 PUSH_DATA (push
, NV30_3D_VERTEX_BEGIN_END_STOP
);
362 nv30_draw_elements_inline_u08(struct nouveau_pushbuf
*push
, const uint8_t *map
,
363 unsigned start
, unsigned count
)
368 BEGIN_NV04(push
, NV30_3D(VB_ELEMENT_U32
), 1);
369 PUSH_DATA (push
, *map
++);
374 unsigned npush
= MIN2(count
, NV04_PFIFO_MAX_PACKET_LEN
);
377 BEGIN_NI04(push
, NV30_3D(VB_ELEMENT_U16
), npush
);
379 PUSH_DATA (push
, (map
[1] << 16) | map
[0]);
387 nv30_draw_elements_inline_u16(struct nouveau_pushbuf
*push
, const uint16_t *map
,
388 unsigned start
, unsigned count
)
393 BEGIN_NV04(push
, NV30_3D(VB_ELEMENT_U32
), 1);
394 PUSH_DATA (push
, *map
++);
399 unsigned npush
= MIN2(count
, NV04_PFIFO_MAX_PACKET_LEN
);
402 BEGIN_NI04(push
, NV30_3D(VB_ELEMENT_U16
), npush
);
404 PUSH_DATA (push
, (map
[1] << 16) | map
[0]);
411 nv30_draw_elements_inline_u32(struct nouveau_pushbuf
*push
, const uint32_t *map
,
412 unsigned start
, unsigned count
)
417 const unsigned nr
= MIN2(count
, NV04_PFIFO_MAX_PACKET_LEN
);
419 BEGIN_NI04(push
, NV30_3D(VB_ELEMENT_U32
), nr
);
420 PUSH_DATAp(push
, map
, nr
);
428 nv30_draw_elements_inline_u32_short(struct nouveau_pushbuf
*push
,
430 unsigned start
, unsigned count
)
435 BEGIN_NV04(push
, NV30_3D(VB_ELEMENT_U32
), 1);
436 PUSH_DATA (push
, *map
++);
441 unsigned npush
= MIN2(count
, NV04_PFIFO_MAX_PACKET_LEN
);;
444 BEGIN_NI04(push
, NV30_3D(VB_ELEMENT_U16
), npush
);
446 PUSH_DATA (push
, (map
[1] << 16) | map
[0]);
453 nv30_draw_elements(struct nv30_context
*nv30
, boolean shorten
,
454 unsigned mode
, unsigned start
, unsigned count
,
455 unsigned instance_count
, int32_t index_bias
)
457 const unsigned index_size
= nv30
->idxbuf
.index_size
;
458 struct nouveau_pushbuf
*push
= nv30
->base
.pushbuf
;
459 struct nouveau_object
*eng3d
= nv30
->screen
->eng3d
;
460 unsigned prim
= nv30_prim_gl(mode
);
463 if (index_bias
!= nv30
->state
.index_bias
) {
464 BEGIN_NV04(push
, NV30_3D(VB_ELEMENT_BASE
), 1);
465 PUSH_DATA (push
, index_bias
);
466 nv30
->state
.index_bias
= index_bias
;
470 if (eng3d
->oclass
== NV40_3D_CLASS
&& index_size
> 1 &&
471 nv30
->idxbuf
.buffer
) {
472 struct nv04_resource
*res
= nv04_resource(nv30
->idxbuf
.buffer
);
473 unsigned offset
= nv30
->idxbuf
.offset
;
475 assert(nouveau_resource_mapped_by_gpu(&res
->base
));
477 BEGIN_NV04(push
, NV30_3D(IDXBUF_OFFSET
), 2);
478 PUSH_RESRC(push
, NV30_3D(IDXBUF_OFFSET
), BUFCTX_IDXBUF
, res
, offset
,
479 NOUVEAU_BO_LOW
| NOUVEAU_BO_RD
, 0, 0);
480 PUSH_MTHD (push
, NV30_3D(IDXBUF_FORMAT
), BUFCTX_IDXBUF
, res
->bo
,
481 (index_size
== 2) ? 0x00000010 : 0x00000000,
482 res
->domain
| NOUVEAU_BO_RD
,
483 0, NV30_3D_IDXBUF_FORMAT_DMA1
);
484 BEGIN_NV04(push
, NV30_3D(VERTEX_BEGIN_END
), 1);
485 PUSH_DATA (push
, prim
);
487 const unsigned mpush
= 2047 * 256;
488 unsigned npush
= (count
> mpush
) ? mpush
: count
;
489 unsigned wpush
= ((npush
+ 255) & ~255) >> 8;
493 BEGIN_NI04(push
, NV30_3D(VB_INDEX_BATCH
), wpush
);
494 while (npush
>= 256) {
495 PUSH_DATA (push
, 0xff000000 | start
);
501 PUSH_DATA (push
, ((npush
- 1) << 24) | start
);
503 BEGIN_NV04(push
, NV30_3D(VERTEX_BEGIN_END
), 1);
504 PUSH_DATA (push
, NV30_3D_VERTEX_BEGIN_END_STOP
);
505 PUSH_RESET(push
, BUFCTX_IDXBUF
);
508 if (nv30
->idxbuf
.buffer
)
509 data
= nouveau_resource_map_offset(&nv30
->base
,
510 nv04_resource(nv30
->idxbuf
.buffer
),
511 nv30
->idxbuf
.offset
, NOUVEAU_BO_RD
);
513 data
= nv30
->idxbuf
.user_buffer
;
517 BEGIN_NV04(push
, NV30_3D(VERTEX_BEGIN_END
), 1);
518 PUSH_DATA (push
, prim
);
519 switch (index_size
) {
521 nv30_draw_elements_inline_u08(push
, data
, start
, count
);
524 nv30_draw_elements_inline_u16(push
, data
, start
, count
);
528 nv30_draw_elements_inline_u32_short(push
, data
, start
, count
);
530 nv30_draw_elements_inline_u32(push
, data
, start
, count
);
536 BEGIN_NV04(push
, NV30_3D(VERTEX_BEGIN_END
), 1);
537 PUSH_DATA (push
, NV30_3D_VERTEX_BEGIN_END_STOP
);
542 nv30_draw_vbo(struct pipe_context
*pipe
, const struct pipe_draw_info
*info
)
544 struct nv30_context
*nv30
= nv30_context(pipe
);
545 struct nouveau_pushbuf
*push
= nv30
->base
.pushbuf
;
547 /* For picking only a few vertices from a large user buffer, push is better,
548 * if index count is larger and we expect repeated vertices, suggest upload.
550 nv30
->vbo_push_hint
= /* the 64 is heuristic */
552 ((info
->max_index
- info
->min_index
+ 64) < info
->count
));
554 nv30
->vbo_min_index
= info
->min_index
;
555 nv30
->vbo_max_index
= info
->max_index
;
557 if (nv30
->vbo_push_hint
!= !!nv30
->vbo_fifo
)
558 nv30
->dirty
|= NV30_NEW_ARRAYS
;
560 push
->user_priv
= &nv30
->bufctx
;
561 if (nv30
->vbo_user
&& !(nv30
->dirty
& (NV30_NEW_VERTEX
| NV30_NEW_ARRAYS
)))
562 nv30_update_user_vbufs(nv30
);
564 nv30_state_validate(nv30
, TRUE
);
565 if (nv30
->draw_flags
) {
566 nv30_render_vbo(pipe
, info
);
569 if (nv30
->vbo_fifo
) {
570 nv30_push_vbo(nv30
, info
);
574 if (nv30
->base
.vbo_dirty
) {
575 BEGIN_NV04(push
, NV30_3D(VTX_CACHE_INVALIDATE_1710
), 1);
577 nv30
->base
.vbo_dirty
= FALSE
;
580 if (!info
->indexed
) {
581 nv30_draw_arrays(nv30
,
582 info
->mode
, info
->start
, info
->count
,
583 info
->instance_count
);
585 boolean shorten
= info
->max_index
<= 65535;
587 if (info
->primitive_restart
!= nv30
->state
.prim_restart
) {
588 if (info
->primitive_restart
) {
589 BEGIN_NV04(push
, NV40_3D(PRIM_RESTART_ENABLE
), 2);
591 PUSH_DATA (push
, info
->restart_index
);
593 if (info
->restart_index
> 65535)
596 BEGIN_NV04(push
, NV40_3D(PRIM_RESTART_ENABLE
), 1);
599 nv30
->state
.prim_restart
= info
->primitive_restart
;
601 if (info
->primitive_restart
) {
602 BEGIN_NV04(push
, NV40_3D(PRIM_RESTART_INDEX
), 1);
603 PUSH_DATA (push
, info
->restart_index
);
605 if (info
->restart_index
> 65535)
609 nv30_draw_elements(nv30
, shorten
,
610 info
->mode
, info
->start
, info
->count
,
611 info
->instance_count
, info
->index_bias
);
614 nv30_state_release(nv30
);
615 nv30_release_user_vbufs(nv30
);
619 nv30_vbo_init(struct pipe_context
*pipe
)
621 pipe
->create_vertex_elements_state
= nv30_vertex_state_create
;
622 pipe
->delete_vertex_elements_state
= nv30_vertex_state_delete
;
623 pipe
->bind_vertex_elements_state
= nv30_vertex_state_bind
;
624 pipe
->draw_vbo
= nv30_draw_vbo
;