1 #include "pipe/p_context.h"
2 #include "pipe/p_state.h"
3 #include "pipe/p_util.h"
5 #include "nv30_context.h"
6 #include "nv30_state.h"
8 #include "nouveau/nouveau_channel.h"
9 #include "nouveau/nouveau_pushbuf.h"
12 nv30_vbo_ncomp(uint format
)
16 if (pf_size_x(format
)) ncomp
++;
17 if (pf_size_y(format
)) ncomp
++;
18 if (pf_size_z(format
)) ncomp
++;
19 if (pf_size_w(format
)) ncomp
++;
25 nv30_vbo_type(uint format
)
27 switch (pf_type(format
)) {
28 case PIPE_FORMAT_TYPE_FLOAT
:
29 return NV34TCL_VTXFMT_TYPE_FLOAT
;
30 case PIPE_FORMAT_TYPE_UNORM
:
31 return NV34TCL_VTXFMT_TYPE_UBYTE
;
33 NOUVEAU_ERR("Unknown format 0x%08x\n", format
);
34 return NV34TCL_VTXFMT_TYPE_FLOAT
;
39 nv30_vbo_static_attrib(struct nv30_context
*nv30
, int attrib
,
40 struct pipe_vertex_element
*ve
,
41 struct pipe_vertex_buffer
*vb
)
43 struct pipe_winsys
*ws
= nv30
->pipe
.winsys
;
47 type
= nv30_vbo_type(ve
->src_format
);
48 ncomp
= nv30_vbo_ncomp(ve
->src_format
);
50 map
= ws
->buffer_map(ws
, vb
->buffer
, PIPE_BUFFER_USAGE_CPU_READ
);
51 map
+= vb
->buffer_offset
+ ve
->src_offset
;
54 case NV34TCL_VTXFMT_TYPE_FLOAT
:
58 BEGIN_RING(rankine
, NV34TCL_VTX_ATTR_4F_X(attrib
), 4);
85 ws
->buffer_unmap(ws
, vb
->buffer
);
91 ws
->buffer_unmap(ws
, vb
->buffer
);
95 ws
->buffer_unmap(ws
, vb
->buffer
);
101 nv30_vbo_arrays_update(struct nv30_context
*nv30
)
103 struct nv30_vertex_program
*vp
= nv30
->vertprog
;
104 uint32_t inputs
, vtxfmt
[16];
110 for (hw
= 0; hw
< 16 && inputs
; hw
++) {
111 if (inputs
& (1 << hw
)) {
113 inputs
&= ~(1 << hw
);
119 for (hw
= 0; hw
< num_hw
; hw
++) {
120 struct pipe_vertex_element
*ve
;
121 struct pipe_vertex_buffer
*vb
;
123 if (!(inputs
& (1 << hw
))) {
124 vtxfmt
[hw
] = NV34TCL_VTXFMT_TYPE_FLOAT
;
128 ve
= &nv30
->vtxelt
[hw
];
129 vb
= &nv30
->vtxbuf
[ve
->vertex_buffer_index
];
131 if (vb
->pitch
== 0) {
132 vtxfmt
[hw
] = NV34TCL_VTXFMT_TYPE_FLOAT
;
133 if (nv30_vbo_static_attrib(nv30
, hw
, ve
, vb
) == TRUE
)
137 nv30
->vb_enable
|= (1 << hw
);
138 nv30
->vb
[hw
].delta
= vb
->buffer_offset
+ ve
->src_offset
;
139 nv30
->vb
[hw
].buffer
= vb
->buffer
;
141 vtxfmt
[hw
] = ((vb
->pitch
<< NV34TCL_VTXFMT_STRIDE_SHIFT
) |
142 (nv30_vbo_ncomp(ve
->src_format
) <<
143 NV34TCL_VTXFMT_SIZE_SHIFT
) |
144 nv30_vbo_type(ve
->src_format
));
147 BEGIN_RING(rankine
, NV34TCL_VTXFMT(0), num_hw
);
148 OUT_RINGp (vtxfmt
, num_hw
);
152 nv30_vbo_validate_state(struct nv30_context
*nv30
,
153 struct pipe_buffer
*ib
, unsigned ib_format
)
157 nv30_state_validate(nv30
);
159 nv30_state_emit(nv30
);
161 if (nv30
->dirty
& NV30_NEW_ARRAYS
) {
162 nv30_vbo_arrays_update(nv30
);
163 nv30
->dirty
&= ~NV30_NEW_ARRAYS
;
166 inputs
= nv30
->vb_enable
;
168 unsigned a
= ffs(inputs
) - 1;
172 BEGIN_RING(rankine
, NV34TCL_VTXBUF_ADDRESS(a
), 1);
173 OUT_RELOC (nv30
->vb
[a
].buffer
, nv30
->vb
[a
].delta
,
174 NOUVEAU_BO_VRAM
| NOUVEAU_BO_GART
| NOUVEAU_BO_LOW
|
175 NOUVEAU_BO_OR
| NOUVEAU_BO_RD
, 0,
176 NV34TCL_VTXBUF_ADDRESS_DMA1
);
180 BEGIN_RING(rankine
, NV34TCL_IDXBUF_ADDRESS
, 2);
181 OUT_RELOCl(ib
, 0, NOUVEAU_BO_VRAM
| NOUVEAU_BO_GART
|
183 OUT_RELOCd(ib
, ib_format
, NOUVEAU_BO_VRAM
| NOUVEAU_BO_GART
|
184 NOUVEAU_BO_RD
| NOUVEAU_BO_OR
,
185 0, NV34TCL_IDXBUF_FORMAT_DMA1
);
188 BEGIN_RING(rankine
, 0x1710, 1);
189 OUT_RING (0); /* vtx cache flush */
195 nv30_draw_arrays(struct pipe_context
*pipe
, unsigned mode
, unsigned start
,
198 struct nv30_context
*nv30
= nv30_context(pipe
);
202 ret
= nv30_vbo_validate_state(nv30
, NULL
, 0);
204 NOUVEAU_ERR("state validate failed\n");
208 BEGIN_RING(rankine
, NV34TCL_VERTEX_BEGIN_END
, 1);
209 OUT_RING (nvgl_primitive(mode
));
213 BEGIN_RING(rankine
, NV34TCL_VB_VERTEX_BATCH
, 1);
214 OUT_RING (((nr
- 1) << 24) | start
);
220 unsigned push
= nr
> 2047 ? 2047 : nr
;
224 BEGIN_RING_NI(rankine
, NV34TCL_VB_VERTEX_BATCH
, push
);
226 OUT_RING(((0x100 - 1) << 24) | start
);
231 BEGIN_RING(rankine
, NV34TCL_VERTEX_BEGIN_END
, 1);
234 pipe
->flush(pipe
, 0, NULL
);
239 nv30_draw_elements_u08(struct nv30_context
*nv30
, void *ib
,
240 unsigned start
, unsigned count
)
242 uint8_t *elts
= (uint8_t *)ib
+ start
;
246 BEGIN_RING(rankine
, NV34TCL_VB_ELEMENT_U32
, 1);
252 push
= MIN2(count
, 2047 * 2);
254 BEGIN_RING_NI(rankine
, NV34TCL_VB_ELEMENT_U16
, push
>> 1);
255 for (i
= 0; i
< push
; i
+=2)
256 OUT_RING((elts
[i
+1] << 16) | elts
[i
]);
264 nv30_draw_elements_u16(struct nv30_context
*nv30
, void *ib
,
265 unsigned start
, unsigned count
)
267 uint16_t *elts
= (uint16_t *)ib
+ start
;
271 BEGIN_RING(rankine
, NV34TCL_VB_ELEMENT_U32
, 1);
277 push
= MIN2(count
, 2047 * 2);
279 BEGIN_RING_NI(rankine
, NV34TCL_VB_ELEMENT_U16
, push
>> 1);
280 for (i
= 0; i
< push
; i
+=2)
281 OUT_RING((elts
[i
+1] << 16) | elts
[i
]);
289 nv30_draw_elements_u32(struct nv30_context
*nv30
, void *ib
,
290 unsigned start
, unsigned count
)
292 uint32_t *elts
= (uint32_t *)ib
+ start
;
296 push
= MIN2(count
, 2047);
298 BEGIN_RING_NI(rankine
, NV34TCL_VB_ELEMENT_U32
, push
);
299 OUT_RINGp (elts
, push
);
307 nv30_draw_elements_inline(struct pipe_context
*pipe
,
308 struct pipe_buffer
*ib
, unsigned ib_size
,
309 unsigned mode
, unsigned start
, unsigned count
)
311 struct nv30_context
*nv30
= nv30_context(pipe
);
312 struct pipe_winsys
*ws
= pipe
->winsys
;
316 ret
= nv30_vbo_validate_state(nv30
, NULL
, 0);
318 NOUVEAU_ERR("state validate failed\n");
322 map
= ws
->buffer_map(ws
, ib
, PIPE_BUFFER_USAGE_CPU_READ
);
324 NOUVEAU_ERR("failed mapping ib\n");
328 BEGIN_RING(rankine
, NV34TCL_VERTEX_BEGIN_END
, 1);
329 OUT_RING (nvgl_primitive(mode
));
333 nv30_draw_elements_u08(nv30
, map
, start
, count
);
336 nv30_draw_elements_u16(nv30
, map
, start
, count
);
339 nv30_draw_elements_u32(nv30
, map
, start
, count
);
342 NOUVEAU_ERR("invalid idxbuf fmt %d\n", ib_size
);
346 BEGIN_RING(rankine
, NV34TCL_VERTEX_BEGIN_END
, 1);
349 ws
->buffer_unmap(ws
, ib
);
355 nv30_draw_elements_vbo(struct pipe_context
*pipe
,
356 struct pipe_buffer
*ib
, unsigned ib_size
,
357 unsigned mode
, unsigned start
, unsigned count
)
359 struct nv30_context
*nv30
= nv30_context(pipe
);
365 type
= NV34TCL_IDXBUF_FORMAT_TYPE_U16
;
368 type
= NV34TCL_IDXBUF_FORMAT_TYPE_U32
;
371 NOUVEAU_ERR("invalid idxbuf fmt %d\n", ib_size
);
375 ret
= nv30_vbo_validate_state(nv30
, ib
, type
);
377 NOUVEAU_ERR("failed state validation\n");
381 BEGIN_RING(rankine
, NV34TCL_VERTEX_BEGIN_END
, 1);
382 OUT_RING (nvgl_primitive(mode
));
386 BEGIN_RING(rankine
, NV34TCL_VB_INDEX_BATCH
, 1);
387 OUT_RING (((nr
- 1) << 24) | start
);
393 unsigned push
= nr
> 2047 ? 2047 : nr
;
397 BEGIN_RING_NI(rankine
, NV34TCL_VB_INDEX_BATCH
, push
);
399 OUT_RING(((0x100 - 1) << 24) | start
);
404 BEGIN_RING(rankine
, NV34TCL_VERTEX_BEGIN_END
, 1);
411 nv30_draw_elements(struct pipe_context
*pipe
,
412 struct pipe_buffer
*indexBuffer
, unsigned indexSize
,
413 unsigned mode
, unsigned start
, unsigned count
)
415 /* if (indexSize != 1) {
416 nv30_draw_elements_vbo(pipe, indexBuffer, indexSize,
419 nv30_draw_elements_inline(pipe
, indexBuffer
, indexSize
,
423 pipe
->flush(pipe
, 0, NULL
);