1 #include "pipe/p_context.h"
2 #include "pipe/p_state.h"
4 #include "nv30_context.h"
5 #include "nv30_state.h"
7 #include "nouveau/nouveau_channel.h"
8 #include "nouveau/nouveau_pushbuf.h"
9 #include "nouveau/nouveau_util.h"
14 nv30_vbo_format_to_hw(enum pipe_format pipe
, unsigned *fmt
, unsigned *ncomp
)
17 case PIPE_FORMAT_R32_FLOAT
:
18 case PIPE_FORMAT_R32G32_FLOAT
:
19 case PIPE_FORMAT_R32G32B32_FLOAT
:
20 case PIPE_FORMAT_R32G32B32A32_FLOAT
:
21 *fmt
= NV34TCL_VTXFMT_TYPE_FLOAT
;
23 case PIPE_FORMAT_R8_UNORM
:
24 case PIPE_FORMAT_R8G8_UNORM
:
25 case PIPE_FORMAT_R8G8B8_UNORM
:
26 case PIPE_FORMAT_R8G8B8A8_UNORM
:
27 *fmt
= NV34TCL_VTXFMT_TYPE_UBYTE
;
29 case PIPE_FORMAT_R16_SSCALED
:
30 case PIPE_FORMAT_R16G16_SSCALED
:
31 case PIPE_FORMAT_R16G16B16_SSCALED
:
32 case PIPE_FORMAT_R16G16B16A16_SSCALED
:
33 *fmt
= NV34TCL_VTXFMT_TYPE_USHORT
;
36 NOUVEAU_ERR("Unknown format %s\n", pf_name(pipe
));
41 case PIPE_FORMAT_R8_UNORM
:
42 case PIPE_FORMAT_R32_FLOAT
:
43 case PIPE_FORMAT_R16_SSCALED
:
46 case PIPE_FORMAT_R8G8_UNORM
:
47 case PIPE_FORMAT_R32G32_FLOAT
:
48 case PIPE_FORMAT_R16G16_SSCALED
:
51 case PIPE_FORMAT_R8G8B8_UNORM
:
52 case PIPE_FORMAT_R32G32B32_FLOAT
:
53 case PIPE_FORMAT_R16G16B16_SSCALED
:
56 case PIPE_FORMAT_R8G8B8A8_UNORM
:
57 case PIPE_FORMAT_R32G32B32A32_FLOAT
:
58 case PIPE_FORMAT_R16G16B16A16_SSCALED
:
62 NOUVEAU_ERR("Unknown format %s\n", pf_name(pipe
));
70 nv30_vbo_set_idxbuf(struct nv30_context
*nv30
, struct pipe_buffer
*ib
,
73 struct pipe_screen
*pscreen
= &nv30
->screen
->pipe
;
78 nv30
->idxbuf_format
= 0xdeadbeef;
82 if (!pscreen
->get_param(pscreen
, NOUVEAU_CAP_HW_IDXBUF
) || ib_size
== 1)
87 type
= NV34TCL_IDXBUF_FORMAT_TYPE_U16
;
90 type
= NV34TCL_IDXBUF_FORMAT_TYPE_U32
;
96 if (ib
!= nv30
->idxbuf
||
97 type
!= nv30
->idxbuf_format
) {
98 nv30
->dirty
|= NV30_NEW_ARRAYS
;
100 nv30
->idxbuf_format
= type
;
107 nv30_vbo_static_attrib(struct nv30_context
*nv30
, struct nouveau_stateobj
*so
,
108 int attrib
, struct pipe_vertex_element
*ve
,
109 struct pipe_vertex_buffer
*vb
)
111 struct pipe_winsys
*ws
= nv30
->pipe
.winsys
;
112 struct nouveau_grobj
*rankine
= nv30
->screen
->rankine
;
113 unsigned type
, ncomp
;
116 if (nv30_vbo_format_to_hw(ve
->src_format
, &type
, &ncomp
))
119 map
= ws
->buffer_map(ws
, vb
->buffer
, PIPE_BUFFER_USAGE_CPU_READ
);
120 map
+= vb
->buffer_offset
+ ve
->src_offset
;
123 case NV34TCL_VTXFMT_TYPE_FLOAT
:
129 so_method(so
, rankine
, NV34TCL_VTX_ATTR_4F_X(attrib
), 4);
130 so_data (so
, fui(v
[0]));
131 so_data (so
, fui(v
[1]));
132 so_data (so
, fui(v
[2]));
133 so_data (so
, fui(v
[3]));
136 so_method(so
, rankine
, NV34TCL_VTX_ATTR_3F_X(attrib
), 3);
137 so_data (so
, fui(v
[0]));
138 so_data (so
, fui(v
[1]));
139 so_data (so
, fui(v
[2]));
142 so_method(so
, rankine
, NV34TCL_VTX_ATTR_2F_X(attrib
), 2);
143 so_data (so
, fui(v
[0]));
144 so_data (so
, fui(v
[1]));
147 so_method(so
, rankine
, NV34TCL_VTX_ATTR_1F(attrib
), 1);
148 so_data (so
, fui(v
[0]));
151 ws
->buffer_unmap(ws
, vb
->buffer
);
157 ws
->buffer_unmap(ws
, vb
->buffer
);
161 ws
->buffer_unmap(ws
, vb
->buffer
);
167 nv30_draw_arrays(struct pipe_context
*pipe
,
168 unsigned mode
, unsigned start
, unsigned count
)
170 struct nv30_context
*nv30
= nv30_context(pipe
);
171 struct nouveau_channel
*chan
= nv30
->nvws
->channel
;
172 unsigned restart
= 0;
174 nv30_vbo_set_idxbuf(nv30
, NULL
, 0);
175 if (FORCE_SWTNL
|| !nv30_state_validate(nv30
)) {
176 /*return nv30_draw_elements_swtnl(pipe, NULL, 0,
177 mode, start, count);*/
184 nv30_state_emit(nv30
);
186 vc
= nouveau_vbuf_split(chan
->pushbuf
->remaining
, 6, 256,
187 mode
, start
, count
, &restart
);
193 BEGIN_RING(rankine
, NV34TCL_VERTEX_BEGIN_END
, 1);
194 OUT_RING (nvgl_primitive(mode
));
198 BEGIN_RING(rankine
, NV34TCL_VB_VERTEX_BATCH
, 1);
199 OUT_RING (((nr
- 1) << 24) | start
);
205 unsigned push
= nr
> 2047 ? 2047 : nr
;
209 BEGIN_RING_NI(rankine
, NV34TCL_VB_VERTEX_BATCH
, push
);
211 OUT_RING(((0x100 - 1) << 24) | start
);
216 BEGIN_RING(rankine
, NV34TCL_VERTEX_BEGIN_END
, 1);
223 pipe
->flush(pipe
, 0, NULL
);
228 nv30_draw_elements_u08(struct nv30_context
*nv30
, void *ib
,
229 unsigned mode
, unsigned start
, unsigned count
)
231 struct nouveau_channel
*chan
= nv30
->nvws
->channel
;
234 uint8_t *elts
= (uint8_t *)ib
+ start
;
235 unsigned vc
, push
, restart
= 0;
237 nv30_state_emit(nv30
);
239 vc
= nouveau_vbuf_split(chan
->pushbuf
->remaining
, 6, 2,
240 mode
, start
, count
, &restart
);
247 BEGIN_RING(rankine
, NV34TCL_VERTEX_BEGIN_END
, 1);
248 OUT_RING (nvgl_primitive(mode
));
251 BEGIN_RING(rankine
, NV34TCL_VB_ELEMENT_U32
, 1);
259 push
= MIN2(vc
, 2047 * 2);
261 BEGIN_RING_NI(rankine
, NV34TCL_VB_ELEMENT_U16
, push
>> 1);
262 for (i
= 0; i
< push
; i
+=2)
263 OUT_RING((elts
[i
+1] << 16) | elts
[i
]);
269 BEGIN_RING(rankine
, NV34TCL_VERTEX_BEGIN_END
, 1);
277 nv30_draw_elements_u16(struct nv30_context
*nv30
, void *ib
,
278 unsigned mode
, unsigned start
, unsigned count
)
280 struct nouveau_channel
*chan
= nv30
->nvws
->channel
;
283 uint16_t *elts
= (uint16_t *)ib
+ start
;
284 unsigned vc
, push
, restart
= 0;
286 nv30_state_emit(nv30
);
288 vc
= nouveau_vbuf_split(chan
->pushbuf
->remaining
, 6, 2,
289 mode
, start
, count
, &restart
);
296 BEGIN_RING(rankine
, NV34TCL_VERTEX_BEGIN_END
, 1);
297 OUT_RING (nvgl_primitive(mode
));
300 BEGIN_RING(rankine
, NV34TCL_VB_ELEMENT_U32
, 1);
308 push
= MIN2(vc
, 2047 * 2);
310 BEGIN_RING_NI(rankine
, NV34TCL_VB_ELEMENT_U16
, push
>> 1);
311 for (i
= 0; i
< push
; i
+=2)
312 OUT_RING((elts
[i
+1] << 16) | elts
[i
]);
318 BEGIN_RING(rankine
, NV34TCL_VERTEX_BEGIN_END
, 1);
326 nv30_draw_elements_u32(struct nv30_context
*nv30
, void *ib
,
327 unsigned mode
, unsigned start
, unsigned count
)
329 struct nouveau_channel
*chan
= nv30
->nvws
->channel
;
332 uint32_t *elts
= (uint32_t *)ib
+ start
;
333 unsigned vc
, push
, restart
= 0;
335 nv30_state_emit(nv30
);
337 vc
= nouveau_vbuf_split(chan
->pushbuf
->remaining
, 5, 1,
338 mode
, start
, count
, &restart
);
345 BEGIN_RING(rankine
, NV34TCL_VERTEX_BEGIN_END
, 1);
346 OUT_RING (nvgl_primitive(mode
));
349 push
= MIN2(vc
, 2047);
351 BEGIN_RING_NI(rankine
, NV34TCL_VB_ELEMENT_U32
, push
);
352 OUT_RINGp (elts
, push
);
358 BEGIN_RING(rankine
, NV34TCL_VERTEX_BEGIN_END
, 1);
366 nv30_draw_elements_inline(struct pipe_context
*pipe
,
367 struct pipe_buffer
*ib
, unsigned ib_size
,
368 unsigned mode
, unsigned start
, unsigned count
)
370 struct nv30_context
*nv30
= nv30_context(pipe
);
371 struct pipe_winsys
*ws
= pipe
->winsys
;
374 map
= ws
->buffer_map(ws
, ib
, PIPE_BUFFER_USAGE_CPU_READ
);
376 NOUVEAU_ERR("failed mapping ib\n");
382 nv30_draw_elements_u08(nv30
, map
, mode
, start
, count
);
385 nv30_draw_elements_u16(nv30
, map
, mode
, start
, count
);
388 nv30_draw_elements_u32(nv30
, map
, mode
, start
, count
);
391 NOUVEAU_ERR("invalid idxbuf fmt %d\n", ib_size
);
395 ws
->buffer_unmap(ws
, ib
);
400 nv30_draw_elements_vbo(struct pipe_context
*pipe
,
401 unsigned mode
, unsigned start
, unsigned count
)
403 struct nv30_context
*nv30
= nv30_context(pipe
);
404 struct nouveau_channel
*chan
= nv30
->nvws
->channel
;
405 unsigned restart
= 0;
410 nv30_state_emit(nv30
);
412 vc
= nouveau_vbuf_split(chan
->pushbuf
->remaining
, 6, 256,
413 mode
, start
, count
, &restart
);
419 BEGIN_RING(rankine
, NV34TCL_VERTEX_BEGIN_END
, 1);
420 OUT_RING (nvgl_primitive(mode
));
424 BEGIN_RING(rankine
, NV34TCL_VB_INDEX_BATCH
, 1);
425 OUT_RING (((nr
- 1) << 24) | start
);
431 unsigned push
= nr
> 2047 ? 2047 : nr
;
435 BEGIN_RING_NI(rankine
, NV34TCL_VB_INDEX_BATCH
, push
);
437 OUT_RING(((0x100 - 1) << 24) | start
);
442 BEGIN_RING(rankine
, NV34TCL_VERTEX_BEGIN_END
, 1);
453 nv30_draw_elements(struct pipe_context
*pipe
,
454 struct pipe_buffer
*indexBuffer
, unsigned indexSize
,
455 unsigned mode
, unsigned start
, unsigned count
)
457 struct nv30_context
*nv30
= nv30_context(pipe
);
460 idxbuf
= nv30_vbo_set_idxbuf(nv30
, indexBuffer
, indexSize
);
461 if (FORCE_SWTNL
|| !nv30_state_validate(nv30
)) {
462 /*return nv30_draw_elements_swtnl(pipe, NULL, 0,
463 mode, start, count);*/
468 nv30_draw_elements_vbo(pipe
, mode
, start
, count
);
470 nv30_draw_elements_inline(pipe
, indexBuffer
, indexSize
,
474 pipe
->flush(pipe
, 0, NULL
);
479 nv30_vbo_validate(struct nv30_context
*nv30
)
481 struct nouveau_stateobj
*vtxbuf
, *vtxfmt
, *sattr
= NULL
;
482 struct nouveau_grobj
*rankine
= nv30
->screen
->rankine
;
483 struct pipe_buffer
*ib
= nv30
->idxbuf
;
484 unsigned ib_format
= nv30
->idxbuf_format
;
485 unsigned vb_flags
= NOUVEAU_BO_VRAM
| NOUVEAU_BO_GART
| NOUVEAU_BO_RD
;
488 if (nv30
->edgeflags
) {
489 /*nv30->fallback_swtnl |= NV30_NEW_ARRAYS;*/
493 vtxbuf
= so_new(20, 18);
494 so_method(vtxbuf
, rankine
, NV34TCL_VTXBUF_ADDRESS(0), nv30
->vtxelt_nr
);
495 vtxfmt
= so_new(17, 0);
496 so_method(vtxfmt
, rankine
, NV34TCL_VTXFMT(0), nv30
->vtxelt_nr
);
498 for (hw
= 0; hw
< nv30
->vtxelt_nr
; hw
++) {
499 struct pipe_vertex_element
*ve
;
500 struct pipe_vertex_buffer
*vb
;
501 unsigned type
, ncomp
;
503 ve
= &nv30
->vtxelt
[hw
];
504 vb
= &nv30
->vtxbuf
[ve
->vertex_buffer_index
];
508 sattr
= so_new(16 * 5, 0);
510 if (nv30_vbo_static_attrib(nv30
, sattr
, hw
, ve
, vb
)) {
512 so_data(vtxfmt
, NV34TCL_VTXFMT_TYPE_FLOAT
);
517 if (nv30_vbo_format_to_hw(ve
->src_format
, &type
, &ncomp
)) {
518 /*nv30->fallback_swtnl |= NV30_NEW_ARRAYS;*/
519 so_ref(NULL
, &vtxbuf
);
520 so_ref(NULL
, &vtxfmt
);
524 so_reloc(vtxbuf
, vb
->buffer
, vb
->buffer_offset
+ ve
->src_offset
,
525 vb_flags
| NOUVEAU_BO_LOW
| NOUVEAU_BO_OR
,
526 0, NV34TCL_VTXBUF_ADDRESS_DMA1
);
527 so_data (vtxfmt
, ((vb
->pitch
<< NV34TCL_VTXFMT_STRIDE_SHIFT
) |
528 (ncomp
<< NV34TCL_VTXFMT_SIZE_SHIFT
) | type
));
532 so_method(vtxbuf
, rankine
, NV34TCL_IDXBUF_ADDRESS
, 2);
533 so_reloc (vtxbuf
, ib
, 0, vb_flags
| NOUVEAU_BO_LOW
, 0, 0);
534 so_reloc (vtxbuf
, ib
, ib_format
, vb_flags
| NOUVEAU_BO_OR
,
535 0, NV34TCL_IDXBUF_FORMAT_DMA1
);
538 so_method(vtxbuf
, rankine
, 0x1710, 1);
541 so_ref(vtxbuf
, &nv30
->state
.hw
[NV30_STATE_VTXBUF
]);
542 nv30
->state
.dirty
|= (1ULL << NV30_STATE_VTXBUF
);
543 so_ref(vtxfmt
, &nv30
->state
.hw
[NV30_STATE_VTXFMT
]);
544 nv30
->state
.dirty
|= (1ULL << NV30_STATE_VTXFMT
);
545 so_ref(sattr
, &nv30
->state
.hw
[NV30_STATE_VTXATTR
]);
546 nv30
->state
.dirty
|= (1ULL << NV30_STATE_VTXATTR
);
550 struct nv30_state_entry nv30_state_vbo
= {
551 .validate
= nv30_vbo_validate
,
553 .pipe
= NV30_NEW_ARRAYS
,