1 #include "pipe/p_screen.h"
3 #include "nv40_context.h"
4 #include "nv40_screen.h"
6 #define NV4X_GRCLASS4097_CHIPSETS 0x00000baf
7 #define NV4X_GRCLASS4497_CHIPSETS 0x00005450
8 #define NV6X_GRCLASS4497_CHIPSETS 0x00000088
11 nv40_screen_get_param(struct pipe_screen
*pscreen
, int param
)
13 struct nv40_screen
*screen
= nv40_screen(pscreen
);
16 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS
:
18 case PIPE_CAP_NPOT_TEXTURES
:
20 case PIPE_CAP_TWO_SIDED_STENCIL
:
24 case PIPE_CAP_ANISOTROPIC_FILTER
:
26 case PIPE_CAP_POINT_SPRITE
:
28 case PIPE_CAP_MAX_RENDER_TARGETS
:
30 case PIPE_CAP_OCCLUSION_QUERY
:
32 case PIPE_CAP_TEXTURE_SHADOW_MAP
:
34 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS
:
36 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS
:
38 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
:
40 case PIPE_CAP_TEXTURE_MIRROR_CLAMP
:
41 case PIPE_CAP_TEXTURE_MIRROR_REPEAT
:
43 case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS
:
44 return 0; /* We have 4 - but unsupported currently */
45 case PIPE_CAP_TGSI_CONT_SUPPORTED
:
47 case PIPE_CAP_BLEND_EQUATION_SEPARATE
:
49 case NOUVEAU_CAP_HW_VTXBUF
:
51 case NOUVEAU_CAP_HW_IDXBUF
:
52 if (screen
->curie
->grclass
== NV40TCL
)
55 case PIPE_CAP_INDEP_BLEND_ENABLE
:
57 case PIPE_CAP_INDEP_BLEND_FUNC
:
59 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
:
60 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
:
62 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
:
63 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
:
66 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param
);
72 nv40_screen_get_paramf(struct pipe_screen
*pscreen
, int param
)
75 case PIPE_CAP_MAX_LINE_WIDTH
:
76 case PIPE_CAP_MAX_LINE_WIDTH_AA
:
78 case PIPE_CAP_MAX_POINT_WIDTH
:
79 case PIPE_CAP_MAX_POINT_WIDTH_AA
:
81 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY
:
83 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS
:
86 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param
);
92 nv40_screen_surface_format_supported(struct pipe_screen
*pscreen
,
93 enum pipe_format format
,
94 enum pipe_texture_target target
,
95 unsigned tex_usage
, unsigned geom_flags
)
97 if (tex_usage
& PIPE_TEXTURE_USAGE_RENDER_TARGET
) {
99 case PIPE_FORMAT_A8R8G8B8_UNORM
:
100 case PIPE_FORMAT_R5G6B5_UNORM
:
106 if (tex_usage
& PIPE_TEXTURE_USAGE_DEPTH_STENCIL
) {
108 case PIPE_FORMAT_Z24S8_UNORM
:
109 case PIPE_FORMAT_Z24X8_UNORM
:
110 case PIPE_FORMAT_Z16_UNORM
:
117 case PIPE_FORMAT_A8R8G8B8_UNORM
:
118 case PIPE_FORMAT_A1R5G5B5_UNORM
:
119 case PIPE_FORMAT_A4R4G4B4_UNORM
:
120 case PIPE_FORMAT_R5G6B5_UNORM
:
121 case PIPE_FORMAT_R16_SNORM
:
122 case PIPE_FORMAT_L8_UNORM
:
123 case PIPE_FORMAT_A8_UNORM
:
124 case PIPE_FORMAT_I8_UNORM
:
125 case PIPE_FORMAT_A8L8_UNORM
:
126 case PIPE_FORMAT_Z16_UNORM
:
127 case PIPE_FORMAT_Z24S8_UNORM
:
128 case PIPE_FORMAT_DXT1_RGB
:
129 case PIPE_FORMAT_DXT1_RGBA
:
130 case PIPE_FORMAT_DXT3_RGBA
:
131 case PIPE_FORMAT_DXT5_RGBA
:
141 static struct pipe_buffer
*
142 nv40_surface_buffer(struct pipe_surface
*surf
)
144 struct nv40_miptree
*mt
= (struct nv40_miptree
*)surf
->texture
;
150 nv40_screen_destroy(struct pipe_screen
*pscreen
)
152 struct nv40_screen
*screen
= nv40_screen(pscreen
);
155 for (i
= 0; i
< NV40_STATE_MAX
; i
++) {
156 if (screen
->state
[i
])
157 so_ref(NULL
, &screen
->state
[i
]);
160 nouveau_resource_free(&screen
->vp_exec_heap
);
161 nouveau_resource_free(&screen
->vp_data_heap
);
162 nouveau_resource_free(&screen
->query_heap
);
163 nouveau_notifier_free(&screen
->query
);
164 nouveau_notifier_free(&screen
->sync
);
165 nouveau_grobj_free(&screen
->curie
);
166 nv04_surface_2d_takedown(&screen
->eng2d
);
168 nouveau_screen_fini(&screen
->base
);
174 nv40_screen_create(struct pipe_winsys
*ws
, struct nouveau_device
*dev
)
176 struct nv40_screen
*screen
= CALLOC_STRUCT(nv40_screen
);
177 struct nouveau_channel
*chan
;
178 struct pipe_screen
*pscreen
;
179 struct nouveau_stateobj
*so
;
180 unsigned curie_class
= 0;
185 pscreen
= &screen
->base
.base
;
187 ret
= nouveau_screen_init(&screen
->base
, dev
);
189 nv40_screen_destroy(pscreen
);
192 chan
= screen
->base
.channel
;
194 pscreen
->winsys
= ws
;
195 pscreen
->destroy
= nv40_screen_destroy
;
196 pscreen
->get_param
= nv40_screen_get_param
;
197 pscreen
->get_paramf
= nv40_screen_get_paramf
;
198 pscreen
->is_format_supported
= nv40_screen_surface_format_supported
;
200 nv40_screen_init_miptree_functions(pscreen
);
201 nv40_screen_init_transfer_functions(pscreen
);
204 switch (dev
->chipset
& 0xf0) {
206 if (NV4X_GRCLASS4097_CHIPSETS
& (1 << (dev
->chipset
& 0x0f)))
207 curie_class
= NV40TCL
;
209 if (NV4X_GRCLASS4497_CHIPSETS
& (1 << (dev
->chipset
& 0x0f)))
210 curie_class
= NV44TCL
;
213 if (NV6X_GRCLASS4497_CHIPSETS
& (1 << (dev
->chipset
& 0x0f)))
214 curie_class
= NV44TCL
;
219 NOUVEAU_ERR("Unknown nv4x chipset: nv%02x\n", dev
->chipset
);
223 ret
= nouveau_grobj_alloc(chan
, 0xbeef3097, curie_class
, &screen
->curie
);
225 NOUVEAU_ERR("Error creating 3D object: %d\n", ret
);
229 /* 2D engine setup */
230 screen
->eng2d
= nv04_surface_2d_init(&screen
->base
);
231 screen
->eng2d
->buf
= nv40_surface_buffer
;
233 /* Notifier for sync purposes */
234 ret
= nouveau_notifier_alloc(chan
, 0xbeef0301, 1, &screen
->sync
);
236 NOUVEAU_ERR("Error creating notifier object: %d\n", ret
);
237 nv40_screen_destroy(pscreen
);
242 ret
= nouveau_notifier_alloc(chan
, 0xbeef0302, 32, &screen
->query
);
244 NOUVEAU_ERR("Error initialising query objects: %d\n", ret
);
245 nv40_screen_destroy(pscreen
);
249 nouveau_resource_init(&screen
->query_heap
, 0, 32);
251 NOUVEAU_ERR("Error initialising query object heap: %d\n", ret
);
252 nv40_screen_destroy(pscreen
);
256 /* Vtxprog resources */
257 if (nouveau_resource_init(&screen
->vp_exec_heap
, 0, 512) ||
258 nouveau_resource_init(&screen
->vp_data_heap
, 0, 256)) {
259 nv40_screen_destroy(pscreen
);
263 /* Static curie initialisation */
264 so
= so_new(16, 25, 0);
265 so_method(so
, screen
->curie
, NV40TCL_DMA_NOTIFY
, 1);
266 so_data (so
, screen
->sync
->handle
);
267 so_method(so
, screen
->curie
, NV40TCL_DMA_TEXTURE0
, 2);
268 so_data (so
, chan
->vram
->handle
);
269 so_data (so
, chan
->gart
->handle
);
270 so_method(so
, screen
->curie
, NV40TCL_DMA_COLOR1
, 1);
271 so_data (so
, chan
->vram
->handle
);
272 so_method(so
, screen
->curie
, NV40TCL_DMA_COLOR0
, 2);
273 so_data (so
, chan
->vram
->handle
);
274 so_data (so
, chan
->vram
->handle
);
275 so_method(so
, screen
->curie
, NV40TCL_DMA_VTXBUF0
, 2);
276 so_data (so
, chan
->vram
->handle
);
277 so_data (so
, chan
->gart
->handle
);
278 so_method(so
, screen
->curie
, NV40TCL_DMA_FENCE
, 2);
280 so_data (so
, screen
->query
->handle
);
281 so_method(so
, screen
->curie
, NV40TCL_DMA_UNK01AC
, 2);
282 so_data (so
, chan
->vram
->handle
);
283 so_data (so
, chan
->vram
->handle
);
284 so_method(so
, screen
->curie
, NV40TCL_DMA_COLOR2
, 2);
285 so_data (so
, chan
->vram
->handle
);
286 so_data (so
, chan
->vram
->handle
);
288 so_method(so
, screen
->curie
, 0x1ea4, 3);
289 so_data (so
, 0x00000010);
290 so_data (so
, 0x01000100);
291 so_data (so
, 0xff800006);
293 /* vtxprog output routing */
294 so_method(so
, screen
->curie
, 0x1fc4, 1);
295 so_data (so
, 0x06144321);
296 so_method(so
, screen
->curie
, 0x1fc8, 2);
297 so_data (so
, 0xedcba987);
298 so_data (so
, 0x00000021);
299 so_method(so
, screen
->curie
, 0x1fd0, 1);
300 so_data (so
, 0x00171615);
301 so_method(so
, screen
->curie
, 0x1fd4, 1);
302 so_data (so
, 0x001b1a19);
304 so_method(so
, screen
->curie
, 0x1ef8, 1);
305 so_data (so
, 0x0020ffff);
306 so_method(so
, screen
->curie
, 0x1d64, 1);
307 so_data (so
, 0x00d30000);
308 so_method(so
, screen
->curie
, 0x1e94, 1);
309 so_data (so
, 0x00000001);
313 nouveau_pushbuf_flush(chan
, 0);