src/gallium/drivers/nv40/nv40_screen.c

   1 #include "pipe/p_screen.h"
   2
   3 #include "nv40_context.h"
   4 #include "nv40_screen.h"
   5
   6 #define NV4X_GRCLASS4097_CHIPSETS 0x00000baf
   7 #define NV4X_GRCLASS4497_CHIPSETS 0x00005450
   8 #define NV6X_GRCLASS4497_CHIPSETS 0x00000088
   9
  10 static int
  11 nv40_screen_get_param(struct pipe_screen *pscreen, int param)
  12 {
  13         struct nv40_screen *screen = nv40_screen(pscreen);
  14
  15         switch (param) {
  16         case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
  17                 return 16;
  18         case PIPE_CAP_NPOT_TEXTURES:
  19                 return 1;
  20         case PIPE_CAP_TWO_SIDED_STENCIL:
  21                 return 1;
  22         case PIPE_CAP_GLSL:
  23                 return 0;
  24         case PIPE_CAP_ANISOTROPIC_FILTER:
  25                 return 1;
  26         case PIPE_CAP_POINT_SPRITE:
  27                 return 1;
  28         case PIPE_CAP_MAX_RENDER_TARGETS:
  29                 return 4;
  30         case PIPE_CAP_OCCLUSION_QUERY:
  31                 return 1;
  32         case PIPE_CAP_TEXTURE_SHADOW_MAP:
  33                 return 1;
  34         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
  35                 return 13;
  36         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
  37                 return 10;
  38         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
  39                 return 13;
  40         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
  41         case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
  42                 return 1;
  43         case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
  44                 return 0; /* We have 4 - but unsupported currently */
  45         case PIPE_CAP_TGSI_CONT_SUPPORTED:
  46                 return 0;
  47         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
  48                 return 1;
  49         case NOUVEAU_CAP_HW_VTXBUF:
  50                 return 1;
  51         case NOUVEAU_CAP_HW_IDXBUF:
  52                 if (screen->curie->grclass == NV40TCL)
  53                         return 1;
  54                 return 0;
  55         case PIPE_CAP_INDEP_BLEND_ENABLE:
  56                 return 0;
  57         case PIPE_CAP_INDEP_BLEND_FUNC:
  58                 return 0;
  59         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
  60         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
  61                 return 1;
  62         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
  63         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
  64                 return 0;
  65         default:
  66                 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
  67                 return 0;
  68         }
  69 }
  70
  71 static float
  72 nv40_screen_get_paramf(struct pipe_screen *pscreen, int param)
  73 {
  74         switch (param) {
  75         case PIPE_CAP_MAX_LINE_WIDTH:
  76         case PIPE_CAP_MAX_LINE_WIDTH_AA:
  77                 return 10.0;
  78         case PIPE_CAP_MAX_POINT_WIDTH:
  79         case PIPE_CAP_MAX_POINT_WIDTH_AA:
  80                 return 64.0;
  81         case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
  82                 return 16.0;
  83         case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
  84                 return 16.0;
  85         default:
  86                 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
  87                 return 0.0;
  88         }
  89 }
  90
  91 static boolean
  92 nv40_screen_surface_format_supported(struct pipe_screen *pscreen,
  93                                      enum pipe_format format,
  94                                      enum pipe_texture_target target,
  95                                      unsigned tex_usage, unsigned geom_flags)
  96 {
  97         if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) {
  98                 switch (format) {
  99                 case PIPE_FORMAT_A8R8G8B8_UNORM:
 100                 case PIPE_FORMAT_R5G6B5_UNORM:
 101                         return TRUE;
 102                 default:
 103                         break;
 104                 }
 105         } else
 106         if (tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL) {
 107                 switch (format) {
 108                 case PIPE_FORMAT_Z24S8_UNORM:
 109                 case PIPE_FORMAT_Z24X8_UNORM:
 110                 case PIPE_FORMAT_Z16_UNORM:
 111                         return TRUE;
 112                 default:
 113                         break;
 114                 }
 115         } else {
 116                 switch (format) {
 117                 case PIPE_FORMAT_A8R8G8B8_UNORM:
 118                 case PIPE_FORMAT_A1R5G5B5_UNORM:
 119                 case PIPE_FORMAT_A4R4G4B4_UNORM:
 120                 case PIPE_FORMAT_R5G6B5_UNORM:
 121                 case PIPE_FORMAT_R16_SNORM:
 122                 case PIPE_FORMAT_L8_UNORM:
 123                 case PIPE_FORMAT_A8_UNORM:
 124                 case PIPE_FORMAT_I8_UNORM:
 125                 case PIPE_FORMAT_A8L8_UNORM:
 126                 case PIPE_FORMAT_Z16_UNORM:
 127                 case PIPE_FORMAT_Z24S8_UNORM:
 128                 case PIPE_FORMAT_DXT1_RGB:
 129                 case PIPE_FORMAT_DXT1_RGBA:
 130                 case PIPE_FORMAT_DXT3_RGBA:
 131                 case PIPE_FORMAT_DXT5_RGBA:
 132                         return TRUE;
 133                 default:
 134                         break;
 135                 }
 136         }
 137
 138         return FALSE;
 139 }
 140
 141 static struct pipe_buffer *
 142 nv40_surface_buffer(struct pipe_surface *surf)
 143 {
 144         struct nv40_miptree *mt = (struct nv40_miptree *)surf->texture;
 145
 146         return mt->buffer;
 147 }
 148
 149 static void
 150 nv40_screen_destroy(struct pipe_screen *pscreen)
 151 {
 152         struct nv40_screen *screen = nv40_screen(pscreen);
 153         unsigned i;
 154
 155         for (i = 0; i < NV40_STATE_MAX; i++) {
 156                 if (screen->state[i])
 157                         so_ref(NULL, &screen->state[i]);
 158         }
 159
 160         nouveau_resource_destroy(&screen->vp_exec_heap);
 161         nouveau_resource_destroy(&screen->vp_data_heap);
 162         nouveau_resource_destroy(&screen->query_heap);
 163         nouveau_notifier_free(&screen->query);
 164         nouveau_notifier_free(&screen->sync);
 165         nouveau_grobj_free(&screen->curie);
 166         nv04_surface_2d_takedown(&screen->eng2d);
 167
 168         nouveau_screen_fini(&screen->base);
 169
 170         FREE(pscreen);
 171 }
 172
 173 struct pipe_screen *
 174 nv40_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
 175 {
 176         struct nv40_screen *screen = CALLOC_STRUCT(nv40_screen);
 177         struct nouveau_channel *chan;
 178         struct pipe_screen *pscreen;
 179         struct nouveau_stateobj *so;
 180         unsigned curie_class = 0;
 181         int ret;
 182
 183         if (!screen)
 184                 return NULL;
 185         pscreen = &screen->base.base;
 186
 187         ret = nouveau_screen_init(&screen->base, dev);
 188         if (ret) {
 189                 nv40_screen_destroy(pscreen);
 190                 return NULL;
 191         }
 192         chan = screen->base.channel;
 193
 194         pscreen->winsys = ws;
 195         pscreen->destroy = nv40_screen_destroy;
 196         pscreen->get_param = nv40_screen_get_param;
 197         pscreen->get_paramf = nv40_screen_get_paramf;
 198         pscreen->is_format_supported = nv40_screen_surface_format_supported;
 199         pscreen->context_create = nv40_create;
 200
 201         nv40_screen_init_miptree_functions(pscreen);
 202         nv40_screen_init_transfer_functions(pscreen);
 203
 204         /* 3D object */
 205         switch (dev->chipset & 0xf0) {
 206         case 0x40:
 207                 if (NV4X_GRCLASS4097_CHIPSETS & (1 << (dev->chipset & 0x0f)))
 208                         curie_class = NV40TCL;
 209                 else
 210                 if (NV4X_GRCLASS4497_CHIPSETS & (1 << (dev->chipset & 0x0f)))
 211                         curie_class = NV44TCL;
 212                 break;
 213         case 0x60:
 214                 if (NV6X_GRCLASS4497_CHIPSETS & (1 << (dev->chipset & 0x0f)))
 215                         curie_class = NV44TCL;
 216                 break;
 217         }
 218
 219         if (!curie_class) {
 220                 NOUVEAU_ERR("Unknown nv4x chipset: nv%02x\n", dev->chipset);
 221                 return NULL;
 222         }
 223
 224         ret = nouveau_grobj_alloc(chan, 0xbeef3097, curie_class, &screen->curie);
 225         if (ret) {
 226                 NOUVEAU_ERR("Error creating 3D object: %d\n", ret);
 227                 return FALSE;
 228         }
 229
 230         /* 2D engine setup */
 231         screen->eng2d = nv04_surface_2d_init(&screen->base);
 232         screen->eng2d->buf = nv40_surface_buffer;
 233
 234         /* Notifier for sync purposes */
 235         ret = nouveau_notifier_alloc(chan, 0xbeef0301, 1, &screen->sync);
 236         if (ret) {
 237                 NOUVEAU_ERR("Error creating notifier object: %d\n", ret);
 238                 nv40_screen_destroy(pscreen);
 239                 return NULL;
 240         }
 241
 242         /* Query objects */
 243         ret = nouveau_notifier_alloc(chan, 0xbeef0302, 32, &screen->query);
 244         if (ret) {
 245                 NOUVEAU_ERR("Error initialising query objects: %d\n", ret);
 246                 nv40_screen_destroy(pscreen);
 247                 return NULL;
 248         }
 249
 250         nouveau_resource_init(&screen->query_heap, 0, 32);
 251         if (ret) {
 252                 NOUVEAU_ERR("Error initialising query object heap: %d\n", ret);
 253                 nv40_screen_destroy(pscreen);
 254                 return NULL;
 255         }
 256
 257         /* Vtxprog resources */
 258         if (nouveau_resource_init(&screen->vp_exec_heap, 0, 512) ||
 259             nouveau_resource_init(&screen->vp_data_heap, 0, 256)) {
 260                 nv40_screen_destroy(pscreen);
 261                 return NULL;
 262         }
 263
 264         /* Static curie initialisation */
 265         so = so_new(16, 25, 0);
 266         so_method(so, screen->curie, NV40TCL_DMA_NOTIFY, 1);
 267         so_data  (so, screen->sync->handle);
 268         so_method(so, screen->curie, NV40TCL_DMA_TEXTURE0, 2);
 269         so_data  (so, chan->vram->handle);
 270         so_data  (so, chan->gart->handle);
 271         so_method(so, screen->curie, NV40TCL_DMA_COLOR1, 1);
 272         so_data  (so, chan->vram->handle);
 273         so_method(so, screen->curie, NV40TCL_DMA_COLOR0, 2);
 274         so_data  (so, chan->vram->handle);
 275         so_data  (so, chan->vram->handle);
 276         so_method(so, screen->curie, NV40TCL_DMA_VTXBUF0, 2);
 277         so_data  (so, chan->vram->handle);
 278         so_data  (so, chan->gart->handle);
 279         so_method(so, screen->curie, NV40TCL_DMA_FENCE, 2);
 280         so_data  (so, 0);
 281         so_data  (so, screen->query->handle);
 282         so_method(so, screen->curie, NV40TCL_DMA_UNK01AC, 2);
 283         so_data  (so, chan->vram->handle);
 284         so_data  (so, chan->vram->handle);
 285         so_method(so, screen->curie, NV40TCL_DMA_COLOR2, 2);
 286         so_data  (so, chan->vram->handle);
 287         so_data  (so, chan->vram->handle);
 288
 289         so_method(so, screen->curie, 0x1ea4, 3);
 290         so_data  (so, 0x00000010);
 291         so_data  (so, 0x01000100);
 292         so_data  (so, 0xff800006);
 293
 294         /* vtxprog output routing */
 295         so_method(so, screen->curie, 0x1fc4, 1);
 296         so_data  (so, 0x06144321);
 297         so_method(so, screen->curie, 0x1fc8, 2);
 298         so_data  (so, 0xedcba987);
 299         so_data  (so, 0x00000021);
 300         so_method(so, screen->curie, 0x1fd0, 1);
 301         so_data  (so, 0x00171615);
 302         so_method(so, screen->curie, 0x1fd4, 1);
 303         so_data  (so, 0x001b1a19);
 304
 305         so_method(so, screen->curie, 0x1ef8, 1);
 306         so_data  (so, 0x0020ffff);
 307         so_method(so, screen->curie, 0x1d64, 1);
 308         so_data  (so, 0x00d30000);
 309         so_method(so, screen->curie, 0x1e94, 1);
 310         so_data  (so, 0x00000001);
 311
 312         so_emit(chan, so);
 313         so_ref(NULL, &so);
 314         nouveau_pushbuf_flush(chan, 0);
 315
 316         return pscreen;
 317 }
 318