1 #include "pipe/p_state.h"
2 #include "pipe/p_defines.h"
3 #include "util/u_inlines.h"
5 #include "draw/draw_context.h"
7 #include "tgsi/tgsi_parse.h"
9 #include "nv40_context.h"
10 #include "nv40_state.h"
13 nv40_blend_state_create(struct pipe_context
*pipe
,
14 const struct pipe_blend_state
*cso
)
16 struct nv40_context
*nv40
= nv40_context(pipe
);
17 struct nouveau_grobj
*curie
= nv40
->screen
->curie
;
18 struct nv40_blend_state
*bso
= CALLOC(1, sizeof(*bso
));
19 struct nouveau_stateobj
*so
= so_new(5, 8, 0);
21 if (cso
->rt
[0].blend_enable
) {
22 so_method(so
, curie
, NV40TCL_BLEND_ENABLE
, 3);
24 so_data (so
, (nvgl_blend_func(cso
->rt
[0].alpha_src_factor
) << 16) |
25 nvgl_blend_func(cso
->rt
[0].rgb_src_factor
));
26 so_data (so
, nvgl_blend_func(cso
->rt
[0].alpha_dst_factor
) << 16 |
27 nvgl_blend_func(cso
->rt
[0].rgb_dst_factor
));
28 so_method(so
, curie
, NV40TCL_BLEND_EQUATION
, 1);
29 so_data (so
, nvgl_blend_eqn(cso
->rt
[0].alpha_func
) << 16 |
30 nvgl_blend_eqn(cso
->rt
[0].rgb_func
));
32 so_method(so
, curie
, NV40TCL_BLEND_ENABLE
, 1);
36 so_method(so
, curie
, NV40TCL_COLOR_MASK
, 1);
37 so_data (so
, (((cso
->rt
[0].colormask
& PIPE_MASK_A
) ? (0x01 << 24) : 0) |
38 ((cso
->rt
[0].colormask
& PIPE_MASK_R
) ? (0x01 << 16) : 0) |
39 ((cso
->rt
[0].colormask
& PIPE_MASK_G
) ? (0x01 << 8) : 0) |
40 ((cso
->rt
[0].colormask
& PIPE_MASK_B
) ? (0x01 << 0) : 0)));
42 if (cso
->logicop_enable
) {
43 so_method(so
, curie
, NV40TCL_COLOR_LOGIC_OP_ENABLE
, 2);
45 so_data (so
, nvgl_logicop_func(cso
->logicop_func
));
47 so_method(so
, curie
, NV40TCL_COLOR_LOGIC_OP_ENABLE
, 1);
51 so_method(so
, curie
, NV40TCL_DITHER_ENABLE
, 1);
52 so_data (so
, cso
->dither
? 1 : 0);
61 nv40_blend_state_bind(struct pipe_context
*pipe
, void *hwcso
)
63 struct nv40_context
*nv40
= nv40_context(pipe
);
66 nv40
->dirty
|= NV40_NEW_BLEND
;
70 nv40_blend_state_delete(struct pipe_context
*pipe
, void *hwcso
)
72 struct nv40_blend_state
*bso
= hwcso
;
74 so_ref(NULL
, &bso
->so
);
79 static INLINE
unsigned
80 wrap_mode(unsigned wrap
) {
84 case PIPE_TEX_WRAP_REPEAT
:
85 ret
= NV40TCL_TEX_WRAP_S_REPEAT
;
87 case PIPE_TEX_WRAP_MIRROR_REPEAT
:
88 ret
= NV40TCL_TEX_WRAP_S_MIRRORED_REPEAT
;
90 case PIPE_TEX_WRAP_CLAMP_TO_EDGE
:
91 ret
= NV40TCL_TEX_WRAP_S_CLAMP_TO_EDGE
;
93 case PIPE_TEX_WRAP_CLAMP_TO_BORDER
:
94 ret
= NV40TCL_TEX_WRAP_S_CLAMP_TO_BORDER
;
96 case PIPE_TEX_WRAP_CLAMP
:
97 ret
= NV40TCL_TEX_WRAP_S_CLAMP
;
99 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE
:
100 ret
= NV40TCL_TEX_WRAP_S_MIRROR_CLAMP_TO_EDGE
;
102 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER
:
103 ret
= NV40TCL_TEX_WRAP_S_MIRROR_CLAMP_TO_BORDER
;
105 case PIPE_TEX_WRAP_MIRROR_CLAMP
:
106 ret
= NV40TCL_TEX_WRAP_S_MIRROR_CLAMP
;
109 NOUVEAU_ERR("unknown wrap mode: %d\n", wrap
);
110 ret
= NV40TCL_TEX_WRAP_S_REPEAT
;
114 return ret
>> NV40TCL_TEX_WRAP_S_SHIFT
;
118 nv40_sampler_state_create(struct pipe_context
*pipe
,
119 const struct pipe_sampler_state
*cso
)
121 struct nv40_sampler_state
*ps
;
124 ps
= MALLOC(sizeof(struct nv40_sampler_state
));
127 if (!cso
->normalized_coords
)
128 ps
->fmt
|= NV40TCL_TEX_FORMAT_RECT
;
130 ps
->wrap
= ((wrap_mode(cso
->wrap_s
) << NV40TCL_TEX_WRAP_S_SHIFT
) |
131 (wrap_mode(cso
->wrap_t
) << NV40TCL_TEX_WRAP_T_SHIFT
) |
132 (wrap_mode(cso
->wrap_r
) << NV40TCL_TEX_WRAP_R_SHIFT
));
135 if (cso
->max_anisotropy
>= 2) {
136 /* no idea, binary driver sets it, works without it.. meh.. */
137 ps
->wrap
|= (1 << 5);
139 if (cso
->max_anisotropy
>= 16) {
140 ps
->en
|= NV40TCL_TEX_ENABLE_ANISO_16X
;
142 if (cso
->max_anisotropy
>= 12) {
143 ps
->en
|= NV40TCL_TEX_ENABLE_ANISO_12X
;
145 if (cso
->max_anisotropy
>= 10) {
146 ps
->en
|= NV40TCL_TEX_ENABLE_ANISO_10X
;
148 if (cso
->max_anisotropy
>= 8) {
149 ps
->en
|= NV40TCL_TEX_ENABLE_ANISO_8X
;
151 if (cso
->max_anisotropy
>= 6) {
152 ps
->en
|= NV40TCL_TEX_ENABLE_ANISO_6X
;
154 if (cso
->max_anisotropy
>= 4) {
155 ps
->en
|= NV40TCL_TEX_ENABLE_ANISO_4X
;
157 ps
->en
|= NV40TCL_TEX_ENABLE_ANISO_2X
;
161 switch (cso
->mag_img_filter
) {
162 case PIPE_TEX_FILTER_LINEAR
:
163 filter
|= NV40TCL_TEX_FILTER_MAG_LINEAR
;
165 case PIPE_TEX_FILTER_NEAREST
:
167 filter
|= NV40TCL_TEX_FILTER_MAG_NEAREST
;
171 switch (cso
->min_img_filter
) {
172 case PIPE_TEX_FILTER_LINEAR
:
173 switch (cso
->min_mip_filter
) {
174 case PIPE_TEX_MIPFILTER_NEAREST
:
175 filter
|= NV40TCL_TEX_FILTER_MIN_LINEAR_MIPMAP_NEAREST
;
177 case PIPE_TEX_MIPFILTER_LINEAR
:
178 filter
|= NV40TCL_TEX_FILTER_MIN_LINEAR_MIPMAP_LINEAR
;
180 case PIPE_TEX_MIPFILTER_NONE
:
182 filter
|= NV40TCL_TEX_FILTER_MIN_LINEAR
;
186 case PIPE_TEX_FILTER_NEAREST
:
188 switch (cso
->min_mip_filter
) {
189 case PIPE_TEX_MIPFILTER_NEAREST
:
190 filter
|= NV40TCL_TEX_FILTER_MIN_NEAREST_MIPMAP_NEAREST
;
192 case PIPE_TEX_MIPFILTER_LINEAR
:
193 filter
|= NV40TCL_TEX_FILTER_MIN_NEAREST_MIPMAP_LINEAR
;
195 case PIPE_TEX_MIPFILTER_NONE
:
197 filter
|= NV40TCL_TEX_FILTER_MIN_NEAREST
;
208 limit
= CLAMP(cso
->lod_bias
, -16.0, 15.0);
209 ps
->filt
|= (int)(cso
->lod_bias
* 256.0) & 0x1fff;
211 limit
= CLAMP(cso
->max_lod
, 0.0, 15.0);
212 ps
->en
|= (int)(limit
* 256.0) << 7;
214 limit
= CLAMP(cso
->min_lod
, 0.0, 15.0);
215 ps
->en
|= (int)(limit
* 256.0) << 19;
219 if (cso
->compare_mode
== PIPE_TEX_COMPARE_R_TO_TEXTURE
) {
220 switch (cso
->compare_func
) {
221 case PIPE_FUNC_NEVER
:
222 ps
->wrap
|= NV40TCL_TEX_WRAP_RCOMP_NEVER
;
224 case PIPE_FUNC_GREATER
:
225 ps
->wrap
|= NV40TCL_TEX_WRAP_RCOMP_GREATER
;
227 case PIPE_FUNC_EQUAL
:
228 ps
->wrap
|= NV40TCL_TEX_WRAP_RCOMP_EQUAL
;
230 case PIPE_FUNC_GEQUAL
:
231 ps
->wrap
|= NV40TCL_TEX_WRAP_RCOMP_GEQUAL
;
234 ps
->wrap
|= NV40TCL_TEX_WRAP_RCOMP_LESS
;
236 case PIPE_FUNC_NOTEQUAL
:
237 ps
->wrap
|= NV40TCL_TEX_WRAP_RCOMP_NOTEQUAL
;
239 case PIPE_FUNC_LEQUAL
:
240 ps
->wrap
|= NV40TCL_TEX_WRAP_RCOMP_LEQUAL
;
242 case PIPE_FUNC_ALWAYS
:
243 ps
->wrap
|= NV40TCL_TEX_WRAP_RCOMP_ALWAYS
;
250 ps
->bcol
= ((float_to_ubyte(cso
->border_color
[3]) << 24) |
251 (float_to_ubyte(cso
->border_color
[0]) << 16) |
252 (float_to_ubyte(cso
->border_color
[1]) << 8) |
253 (float_to_ubyte(cso
->border_color
[2]) << 0));
259 nv40_sampler_state_bind(struct pipe_context
*pipe
, unsigned nr
, void **sampler
)
261 struct nv40_context
*nv40
= nv40_context(pipe
);
264 for (unit
= 0; unit
< nr
; unit
++) {
265 nv40
->tex_sampler
[unit
] = sampler
[unit
];
266 nv40
->dirty_samplers
|= (1 << unit
);
269 for (unit
= nr
; unit
< nv40
->nr_samplers
; unit
++) {
270 nv40
->tex_sampler
[unit
] = NULL
;
271 nv40
->dirty_samplers
|= (1 << unit
);
274 nv40
->nr_samplers
= nr
;
275 nv40
->dirty
|= NV40_NEW_SAMPLER
;
279 nv40_sampler_state_delete(struct pipe_context
*pipe
, void *hwcso
)
285 nv40_set_fragment_sampler_views(struct pipe_context
*pipe
,
287 struct pipe_sampler_view
**views
)
289 struct nv40_context
*nv40
= nv40_context(pipe
);
292 for (unit
= 0; unit
< nr
; unit
++) {
293 pipe_sampler_view_reference(&nv40
->fragment_sampler_views
[unit
], views
[unit
]);
294 pipe_texture_reference((struct pipe_texture
**)
295 &nv40
->tex_miptree
[unit
], views
[unit
]->texture
);
296 nv40
->dirty_samplers
|= (1 << unit
);
299 for (unit
= nr
; unit
< nv40
->nr_textures
; unit
++) {
300 pipe_sampler_view_reference(&nv40
->fragment_sampler_views
[unit
], NULL
);
301 pipe_texture_reference((struct pipe_texture
**)
302 &nv40
->tex_miptree
[unit
], NULL
);
303 nv40
->dirty_samplers
|= (1 << unit
);
306 nv40
->nr_textures
= nr
;
307 nv40
->dirty
|= NV40_NEW_SAMPLER
;
310 static struct pipe_sampler_view
*
311 nv40_create_sampler_view(struct pipe_context
*pipe
,
312 struct pipe_texture
*texture
,
313 const struct pipe_sampler_view
*templ
)
315 struct pipe_sampler_view
*view
= CALLOC_STRUCT(pipe_sampler_view
);
319 view
->reference
.count
= 1;
320 view
->texture
= NULL
;
321 pipe_texture_reference(&view
->texture
, texture
);
322 view
->context
= pipe
;
330 nv40_sampler_view_destroy(struct pipe_context
*pipe
,
331 struct pipe_sampler_view
*view
)
333 pipe_texture_reference(&view
->texture
, NULL
);
338 nv40_rasterizer_state_create(struct pipe_context
*pipe
,
339 const struct pipe_rasterizer_state
*cso
)
341 struct nv40_context
*nv40
= nv40_context(pipe
);
342 struct nv40_rasterizer_state
*rsso
= CALLOC(1, sizeof(*rsso
));
343 struct nouveau_stateobj
*so
= so_new(9, 19, 0);
344 struct nouveau_grobj
*curie
= nv40
->screen
->curie
;
352 so_method(so
, curie
, NV40TCL_SHADE_MODEL
, 1);
353 so_data (so
, cso
->flatshade
? NV40TCL_SHADE_MODEL_FLAT
:
354 NV40TCL_SHADE_MODEL_SMOOTH
);
356 so_method(so
, curie
, NV40TCL_LINE_WIDTH
, 2);
357 so_data (so
, (unsigned char)(cso
->line_width
* 8.0) & 0xff);
358 so_data (so
, cso
->line_smooth
? 1 : 0);
359 so_method(so
, curie
, NV40TCL_LINE_STIPPLE_ENABLE
, 2);
360 so_data (so
, cso
->line_stipple_enable
? 1 : 0);
361 so_data (so
, (cso
->line_stipple_pattern
<< 16) |
362 cso
->line_stipple_factor
);
364 so_method(so
, curie
, NV40TCL_POINT_SIZE
, 1);
365 so_data (so
, fui(cso
->point_size
));
367 so_method(so
, curie
, NV40TCL_POLYGON_MODE_FRONT
, 6);
368 if (cso
->front_winding
== PIPE_WINDING_CCW
) {
369 so_data(so
, nvgl_polygon_mode(cso
->fill_ccw
));
370 so_data(so
, nvgl_polygon_mode(cso
->fill_cw
));
371 switch (cso
->cull_mode
) {
372 case PIPE_WINDING_CCW
:
373 so_data(so
, NV40TCL_CULL_FACE_FRONT
);
375 case PIPE_WINDING_CW
:
376 so_data(so
, NV40TCL_CULL_FACE_BACK
);
378 case PIPE_WINDING_BOTH
:
379 so_data(so
, NV40TCL_CULL_FACE_FRONT_AND_BACK
);
382 so_data(so
, NV40TCL_CULL_FACE_BACK
);
385 so_data(so
, NV40TCL_FRONT_FACE_CCW
);
387 so_data(so
, nvgl_polygon_mode(cso
->fill_cw
));
388 so_data(so
, nvgl_polygon_mode(cso
->fill_ccw
));
389 switch (cso
->cull_mode
) {
390 case PIPE_WINDING_CCW
:
391 so_data(so
, NV40TCL_CULL_FACE_BACK
);
393 case PIPE_WINDING_CW
:
394 so_data(so
, NV40TCL_CULL_FACE_FRONT
);
396 case PIPE_WINDING_BOTH
:
397 so_data(so
, NV40TCL_CULL_FACE_FRONT_AND_BACK
);
400 so_data(so
, NV40TCL_CULL_FACE_BACK
);
403 so_data(so
, NV40TCL_FRONT_FACE_CW
);
405 so_data(so
, cso
->poly_smooth
? 1 : 0);
406 so_data(so
, (cso
->cull_mode
!= PIPE_WINDING_NONE
) ? 1 : 0);
408 so_method(so
, curie
, NV40TCL_POLYGON_STIPPLE_ENABLE
, 1);
409 so_data (so
, cso
->poly_stipple_enable
? 1 : 0);
411 so_method(so
, curie
, NV40TCL_POLYGON_OFFSET_POINT_ENABLE
, 3);
412 if ((cso
->offset_cw
&& cso
->fill_cw
== PIPE_POLYGON_MODE_POINT
) ||
413 (cso
->offset_ccw
&& cso
->fill_ccw
== PIPE_POLYGON_MODE_POINT
))
417 if ((cso
->offset_cw
&& cso
->fill_cw
== PIPE_POLYGON_MODE_LINE
) ||
418 (cso
->offset_ccw
&& cso
->fill_ccw
== PIPE_POLYGON_MODE_LINE
))
422 if ((cso
->offset_cw
&& cso
->fill_cw
== PIPE_POLYGON_MODE_FILL
) ||
423 (cso
->offset_ccw
&& cso
->fill_ccw
== PIPE_POLYGON_MODE_FILL
))
427 if (cso
->offset_cw
|| cso
->offset_ccw
) {
428 so_method(so
, curie
, NV40TCL_POLYGON_OFFSET_FACTOR
, 2);
429 so_data (so
, fui(cso
->offset_scale
));
430 so_data (so
, fui(cso
->offset_units
* 2));
433 so_method(so
, curie
, NV40TCL_POINT_SPRITE
, 1);
434 if (cso
->point_quad_rasterization
) {
435 unsigned psctl
= (1 << 0), i
;
437 for (i
= 0; i
< 8; i
++) {
438 if ((cso
->sprite_coord_enable
>> i
) & 1)
439 psctl
|= (1 << (8 + i
));
447 so_ref(so
, &rsso
->so
);
454 nv40_rasterizer_state_bind(struct pipe_context
*pipe
, void *hwcso
)
456 struct nv40_context
*nv40
= nv40_context(pipe
);
458 nv40
->rasterizer
= hwcso
;
459 nv40
->dirty
|= NV40_NEW_RAST
;
460 nv40
->draw_dirty
|= NV40_NEW_RAST
;
464 nv40_rasterizer_state_delete(struct pipe_context
*pipe
, void *hwcso
)
466 struct nv40_rasterizer_state
*rsso
= hwcso
;
468 so_ref(NULL
, &rsso
->so
);
473 nv40_depth_stencil_alpha_state_create(struct pipe_context
*pipe
,
474 const struct pipe_depth_stencil_alpha_state
*cso
)
476 struct nv40_context
*nv40
= nv40_context(pipe
);
477 struct nv40_zsa_state
*zsaso
= CALLOC(1, sizeof(*zsaso
));
478 struct nouveau_stateobj
*so
= so_new(6, 20, 0);
479 struct nouveau_grobj
*curie
= nv40
->screen
->curie
;
481 so_method(so
, curie
, NV40TCL_DEPTH_FUNC
, 3);
482 so_data (so
, nvgl_comparison_op(cso
->depth
.func
));
483 so_data (so
, cso
->depth
.writemask
? 1 : 0);
484 so_data (so
, cso
->depth
.enabled
? 1 : 0);
486 so_method(so
, curie
, NV40TCL_ALPHA_TEST_ENABLE
, 3);
487 so_data (so
, cso
->alpha
.enabled
? 1 : 0);
488 so_data (so
, nvgl_comparison_op(cso
->alpha
.func
));
489 so_data (so
, float_to_ubyte(cso
->alpha
.ref_value
));
491 if (cso
->stencil
[0].enabled
) {
492 so_method(so
, curie
, NV40TCL_STENCIL_FRONT_ENABLE
, 3);
493 so_data (so
, cso
->stencil
[0].enabled
? 1 : 0);
494 so_data (so
, cso
->stencil
[0].writemask
);
495 so_data (so
, nvgl_comparison_op(cso
->stencil
[0].func
));
496 so_method(so
, curie
, NV40TCL_STENCIL_FRONT_FUNC_MASK
, 4);
497 so_data (so
, cso
->stencil
[0].valuemask
);
498 so_data (so
, nvgl_stencil_op(cso
->stencil
[0].fail_op
));
499 so_data (so
, nvgl_stencil_op(cso
->stencil
[0].zfail_op
));
500 so_data (so
, nvgl_stencil_op(cso
->stencil
[0].zpass_op
));
502 so_method(so
, curie
, NV40TCL_STENCIL_FRONT_ENABLE
, 1);
506 if (cso
->stencil
[1].enabled
) {
507 so_method(so
, curie
, NV40TCL_STENCIL_BACK_ENABLE
, 3);
508 so_data (so
, cso
->stencil
[1].enabled
? 1 : 0);
509 so_data (so
, cso
->stencil
[1].writemask
);
510 so_data (so
, nvgl_comparison_op(cso
->stencil
[1].func
));
511 so_method(so
, curie
, NV40TCL_STENCIL_BACK_FUNC_MASK
, 4);
512 so_data (so
, cso
->stencil
[1].valuemask
);
513 so_data (so
, nvgl_stencil_op(cso
->stencil
[1].fail_op
));
514 so_data (so
, nvgl_stencil_op(cso
->stencil
[1].zfail_op
));
515 so_data (so
, nvgl_stencil_op(cso
->stencil
[1].zpass_op
));
517 so_method(so
, curie
, NV40TCL_STENCIL_BACK_ENABLE
, 1);
521 so_ref(so
, &zsaso
->so
);
524 return (void *)zsaso
;
528 nv40_depth_stencil_alpha_state_bind(struct pipe_context
*pipe
, void *hwcso
)
530 struct nv40_context
*nv40
= nv40_context(pipe
);
533 nv40
->dirty
|= NV40_NEW_ZSA
;
537 nv40_depth_stencil_alpha_state_delete(struct pipe_context
*pipe
, void *hwcso
)
539 struct nv40_zsa_state
*zsaso
= hwcso
;
541 so_ref(NULL
, &zsaso
->so
);
546 nv40_vp_state_create(struct pipe_context
*pipe
,
547 const struct pipe_shader_state
*cso
)
549 struct nv40_context
*nv40
= nv40_context(pipe
);
550 struct nv40_vertex_program
*vp
;
552 vp
= CALLOC(1, sizeof(struct nv40_vertex_program
));
553 vp
->pipe
.tokens
= tgsi_dup_tokens(cso
->tokens
);
554 vp
->draw
= draw_create_vertex_shader(nv40
->draw
, &vp
->pipe
);
560 nv40_vp_state_bind(struct pipe_context
*pipe
, void *hwcso
)
562 struct nv40_context
*nv40
= nv40_context(pipe
);
564 nv40
->vertprog
= hwcso
;
565 nv40
->dirty
|= NV40_NEW_VERTPROG
;
566 nv40
->draw_dirty
|= NV40_NEW_VERTPROG
;
570 nv40_vp_state_delete(struct pipe_context
*pipe
, void *hwcso
)
572 struct nv40_context
*nv40
= nv40_context(pipe
);
573 struct nv40_vertex_program
*vp
= hwcso
;
575 draw_delete_vertex_shader(nv40
->draw
, vp
->draw
);
576 nv40_vertprog_destroy(nv40
, vp
);
577 FREE((void*)vp
->pipe
.tokens
);
582 nv40_fp_state_create(struct pipe_context
*pipe
,
583 const struct pipe_shader_state
*cso
)
585 struct nv40_fragment_program
*fp
;
587 fp
= CALLOC(1, sizeof(struct nv40_fragment_program
));
588 fp
->pipe
.tokens
= tgsi_dup_tokens(cso
->tokens
);
590 tgsi_scan_shader(fp
->pipe
.tokens
, &fp
->info
);
596 nv40_fp_state_bind(struct pipe_context
*pipe
, void *hwcso
)
598 struct nv40_context
*nv40
= nv40_context(pipe
);
600 nv40
->fragprog
= hwcso
;
601 nv40
->dirty
|= NV40_NEW_FRAGPROG
;
605 nv40_fp_state_delete(struct pipe_context
*pipe
, void *hwcso
)
607 struct nv40_context
*nv40
= nv40_context(pipe
);
608 struct nv40_fragment_program
*fp
= hwcso
;
610 nv40_fragprog_destroy(nv40
, fp
);
611 FREE((void*)fp
->pipe
.tokens
);
616 nv40_set_blend_color(struct pipe_context
*pipe
,
617 const struct pipe_blend_color
*bcol
)
619 struct nv40_context
*nv40
= nv40_context(pipe
);
621 nv40
->blend_colour
= *bcol
;
622 nv40
->dirty
|= NV40_NEW_BCOL
;
626 nv40_set_stencil_ref(struct pipe_context
*pipe
,
627 const struct pipe_stencil_ref
*sr
)
629 struct nv40_context
*nv40
= nv40_context(pipe
);
631 nv40
->stencil_ref
= *sr
;
632 nv40
->dirty
|= NV40_NEW_SR
;
636 nv40_set_clip_state(struct pipe_context
*pipe
,
637 const struct pipe_clip_state
*clip
)
639 struct nv40_context
*nv40
= nv40_context(pipe
);
642 nv40
->dirty
|= NV40_NEW_UCP
;
643 nv40
->draw_dirty
|= NV40_NEW_UCP
;
647 nv40_set_constant_buffer(struct pipe_context
*pipe
, uint shader
, uint index
,
648 struct pipe_buffer
*buf
)
650 struct nv40_context
*nv40
= nv40_context(pipe
);
652 nv40
->constbuf
[shader
] = buf
;
653 nv40
->constbuf_nr
[shader
] = buf
->size
/ (4 * sizeof(float));
655 if (shader
== PIPE_SHADER_VERTEX
) {
656 nv40
->dirty
|= NV40_NEW_VERTPROG
;
658 if (shader
== PIPE_SHADER_FRAGMENT
) {
659 nv40
->dirty
|= NV40_NEW_FRAGPROG
;
664 nv40_set_framebuffer_state(struct pipe_context
*pipe
,
665 const struct pipe_framebuffer_state
*fb
)
667 struct nv40_context
*nv40
= nv40_context(pipe
);
669 nv40
->framebuffer
= *fb
;
670 nv40
->dirty
|= NV40_NEW_FB
;
674 nv40_set_polygon_stipple(struct pipe_context
*pipe
,
675 const struct pipe_poly_stipple
*stipple
)
677 struct nv40_context
*nv40
= nv40_context(pipe
);
679 memcpy(nv40
->stipple
, stipple
->stipple
, 4 * 32);
680 nv40
->dirty
|= NV40_NEW_STIPPLE
;
684 nv40_set_scissor_state(struct pipe_context
*pipe
,
685 const struct pipe_scissor_state
*s
)
687 struct nv40_context
*nv40
= nv40_context(pipe
);
690 nv40
->dirty
|= NV40_NEW_SCISSOR
;
694 nv40_set_viewport_state(struct pipe_context
*pipe
,
695 const struct pipe_viewport_state
*vpt
)
697 struct nv40_context
*nv40
= nv40_context(pipe
);
699 nv40
->viewport
= *vpt
;
700 nv40
->dirty
|= NV40_NEW_VIEWPORT
;
701 nv40
->draw_dirty
|= NV40_NEW_VIEWPORT
;
705 nv40_set_vertex_buffers(struct pipe_context
*pipe
, unsigned count
,
706 const struct pipe_vertex_buffer
*vb
)
708 struct nv40_context
*nv40
= nv40_context(pipe
);
710 memcpy(nv40
->vtxbuf
, vb
, sizeof(*vb
) * count
);
711 nv40
->vtxbuf_nr
= count
;
713 nv40
->dirty
|= NV40_NEW_ARRAYS
;
714 nv40
->draw_dirty
|= NV40_NEW_ARRAYS
;
718 nv40_vtxelts_state_create(struct pipe_context
*pipe
,
719 unsigned num_elements
,
720 const struct pipe_vertex_element
*elements
)
722 struct nv40_vtxelt_state
*cso
= CALLOC_STRUCT(nv40_vtxelt_state
);
724 assert(num_elements
< 16); /* not doing fallbacks yet */
725 cso
->num_elements
= num_elements
;
726 memcpy(cso
->pipe
, elements
, num_elements
* sizeof(*elements
));
728 /* nv40_vtxelt_construct(cso);*/
734 nv40_vtxelts_state_delete(struct pipe_context
*pipe
, void *hwcso
)
740 nv40_vtxelts_state_bind(struct pipe_context
*pipe
, void *hwcso
)
742 struct nv40_context
*nv40
= nv40_context(pipe
);
744 nv40
->vtxelt
= hwcso
;
745 nv40
->dirty
|= NV40_NEW_ARRAYS
;
746 nv40
->draw_dirty
|= NV40_NEW_ARRAYS
;
750 nv40_init_state_functions(struct nv40_context
*nv40
)
752 nv40
->pipe
.create_blend_state
= nv40_blend_state_create
;
753 nv40
->pipe
.bind_blend_state
= nv40_blend_state_bind
;
754 nv40
->pipe
.delete_blend_state
= nv40_blend_state_delete
;
756 nv40
->pipe
.create_sampler_state
= nv40_sampler_state_create
;
757 nv40
->pipe
.bind_fragment_sampler_states
= nv40_sampler_state_bind
;
758 nv40
->pipe
.delete_sampler_state
= nv40_sampler_state_delete
;
759 nv40
->pipe
.set_fragment_sampler_views
= nv40_set_fragment_sampler_views
;
760 nv40
->pipe
.create_sampler_view
= nv40_create_sampler_view
;
761 nv40
->pipe
.sampler_view_destroy
= nv40_sampler_view_destroy
;
763 nv40
->pipe
.create_rasterizer_state
= nv40_rasterizer_state_create
;
764 nv40
->pipe
.bind_rasterizer_state
= nv40_rasterizer_state_bind
;
765 nv40
->pipe
.delete_rasterizer_state
= nv40_rasterizer_state_delete
;
767 nv40
->pipe
.create_depth_stencil_alpha_state
=
768 nv40_depth_stencil_alpha_state_create
;
769 nv40
->pipe
.bind_depth_stencil_alpha_state
=
770 nv40_depth_stencil_alpha_state_bind
;
771 nv40
->pipe
.delete_depth_stencil_alpha_state
=
772 nv40_depth_stencil_alpha_state_delete
;
774 nv40
->pipe
.create_vs_state
= nv40_vp_state_create
;
775 nv40
->pipe
.bind_vs_state
= nv40_vp_state_bind
;
776 nv40
->pipe
.delete_vs_state
= nv40_vp_state_delete
;
778 nv40
->pipe
.create_fs_state
= nv40_fp_state_create
;
779 nv40
->pipe
.bind_fs_state
= nv40_fp_state_bind
;
780 nv40
->pipe
.delete_fs_state
= nv40_fp_state_delete
;
782 nv40
->pipe
.set_blend_color
= nv40_set_blend_color
;
783 nv40
->pipe
.set_stencil_ref
= nv40_set_stencil_ref
;
784 nv40
->pipe
.set_clip_state
= nv40_set_clip_state
;
785 nv40
->pipe
.set_constant_buffer
= nv40_set_constant_buffer
;
786 nv40
->pipe
.set_framebuffer_state
= nv40_set_framebuffer_state
;
787 nv40
->pipe
.set_polygon_stipple
= nv40_set_polygon_stipple
;
788 nv40
->pipe
.set_scissor_state
= nv40_set_scissor_state
;
789 nv40
->pipe
.set_viewport_state
= nv40_set_viewport_state
;
791 nv40
->pipe
.create_vertex_elements_state
= nv40_vtxelts_state_create
;
792 nv40
->pipe
.delete_vertex_elements_state
= nv40_vtxelts_state_delete
;
793 nv40
->pipe
.bind_vertex_elements_state
= nv40_vtxelts_state_bind
;
795 nv40
->pipe
.set_vertex_buffers
= nv40_set_vertex_buffers
;