1 #include "pipe/p_state.h"
2 #include "pipe/p_defines.h"
3 #include "pipe/p_inlines.h"
5 #include "draw/draw_context.h"
7 #include "tgsi/tgsi_parse.h"
9 #include "nv40_context.h"
10 #include "nv40_state.h"
13 nv40_blend_state_create(struct pipe_context
*pipe
,
14 const struct pipe_blend_state
*cso
)
16 struct nv40_context
*nv40
= nv40_context(pipe
);
17 struct nouveau_grobj
*curie
= nv40
->screen
->curie
;
18 struct nv40_blend_state
*bso
= CALLOC(1, sizeof(*bso
));
19 struct nouveau_stateobj
*so
= so_new(16, 0);
21 if (cso
->blend_enable
) {
22 so_method(so
, curie
, NV40TCL_BLEND_ENABLE
, 3);
24 so_data (so
, (nvgl_blend_func(cso
->alpha_src_factor
) << 16) |
25 nvgl_blend_func(cso
->rgb_src_factor
));
26 so_data (so
, nvgl_blend_func(cso
->alpha_dst_factor
) << 16 |
27 nvgl_blend_func(cso
->rgb_dst_factor
));
28 so_method(so
, curie
, NV40TCL_BLEND_EQUATION
, 1);
29 so_data (so
, nvgl_blend_eqn(cso
->alpha_func
) << 16 |
30 nvgl_blend_eqn(cso
->rgb_func
));
32 so_method(so
, curie
, NV40TCL_BLEND_ENABLE
, 1);
36 so_method(so
, curie
, NV40TCL_COLOR_MASK
, 1);
37 so_data (so
, (((cso
->colormask
& PIPE_MASK_A
) ? (0x01 << 24) : 0) |
38 ((cso
->colormask
& PIPE_MASK_R
) ? (0x01 << 16) : 0) |
39 ((cso
->colormask
& PIPE_MASK_G
) ? (0x01 << 8) : 0) |
40 ((cso
->colormask
& PIPE_MASK_B
) ? (0x01 << 0) : 0)));
42 if (cso
->logicop_enable
) {
43 so_method(so
, curie
, NV40TCL_COLOR_LOGIC_OP_ENABLE
, 2);
45 so_data (so
, nvgl_logicop_func(cso
->logicop_func
));
47 so_method(so
, curie
, NV40TCL_COLOR_LOGIC_OP_ENABLE
, 1);
51 so_method(so
, curie
, NV40TCL_DITHER_ENABLE
, 1);
52 so_data (so
, cso
->dither
? 1 : 0);
60 nv40_blend_state_bind(struct pipe_context
*pipe
, void *hwcso
)
62 struct nv40_context
*nv40
= nv40_context(pipe
);
65 nv40
->dirty
|= NV40_NEW_BLEND
;
69 nv40_blend_state_delete(struct pipe_context
*pipe
, void *hwcso
)
71 struct nv40_blend_state
*bso
= hwcso
;
73 so_ref(NULL
, &bso
->so
);
78 static INLINE
unsigned
79 wrap_mode(unsigned wrap
) {
83 case PIPE_TEX_WRAP_REPEAT
:
84 ret
= NV40TCL_TEX_WRAP_S_REPEAT
;
86 case PIPE_TEX_WRAP_MIRROR_REPEAT
:
87 ret
= NV40TCL_TEX_WRAP_S_MIRRORED_REPEAT
;
89 case PIPE_TEX_WRAP_CLAMP_TO_EDGE
:
90 ret
= NV40TCL_TEX_WRAP_S_CLAMP_TO_EDGE
;
92 case PIPE_TEX_WRAP_CLAMP_TO_BORDER
:
93 ret
= NV40TCL_TEX_WRAP_S_CLAMP_TO_BORDER
;
95 case PIPE_TEX_WRAP_CLAMP
:
96 ret
= NV40TCL_TEX_WRAP_S_CLAMP
;
98 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE
:
99 ret
= NV40TCL_TEX_WRAP_S_MIRROR_CLAMP_TO_EDGE
;
101 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER
:
102 ret
= NV40TCL_TEX_WRAP_S_MIRROR_CLAMP_TO_BORDER
;
104 case PIPE_TEX_WRAP_MIRROR_CLAMP
:
105 ret
= NV40TCL_TEX_WRAP_S_MIRROR_CLAMP
;
108 NOUVEAU_ERR("unknown wrap mode: %d\n", wrap
);
109 ret
= NV40TCL_TEX_WRAP_S_REPEAT
;
113 return ret
>> NV40TCL_TEX_WRAP_S_SHIFT
;
117 nv40_sampler_state_create(struct pipe_context
*pipe
,
118 const struct pipe_sampler_state
*cso
)
120 struct nv40_sampler_state
*ps
;
123 ps
= MALLOC(sizeof(struct nv40_sampler_state
));
126 if (!cso
->normalized_coords
)
127 ps
->fmt
|= NV40TCL_TEX_FORMAT_RECT
;
129 ps
->wrap
= ((wrap_mode(cso
->wrap_s
) << NV40TCL_TEX_WRAP_S_SHIFT
) |
130 (wrap_mode(cso
->wrap_t
) << NV40TCL_TEX_WRAP_T_SHIFT
) |
131 (wrap_mode(cso
->wrap_r
) << NV40TCL_TEX_WRAP_R_SHIFT
));
134 if (cso
->max_anisotropy
>= 2.0) {
135 /* no idea, binary driver sets it, works without it.. meh.. */
136 ps
->wrap
|= (1 << 5);
138 if (cso
->max_anisotropy
>= 16.0) {
139 ps
->en
|= NV40TCL_TEX_ENABLE_ANISO_16X
;
141 if (cso
->max_anisotropy
>= 12.0) {
142 ps
->en
|= NV40TCL_TEX_ENABLE_ANISO_12X
;
144 if (cso
->max_anisotropy
>= 10.0) {
145 ps
->en
|= NV40TCL_TEX_ENABLE_ANISO_10X
;
147 if (cso
->max_anisotropy
>= 8.0) {
148 ps
->en
|= NV40TCL_TEX_ENABLE_ANISO_8X
;
150 if (cso
->max_anisotropy
>= 6.0) {
151 ps
->en
|= NV40TCL_TEX_ENABLE_ANISO_6X
;
153 if (cso
->max_anisotropy
>= 4.0) {
154 ps
->en
|= NV40TCL_TEX_ENABLE_ANISO_4X
;
156 ps
->en
|= NV40TCL_TEX_ENABLE_ANISO_2X
;
160 switch (cso
->mag_img_filter
) {
161 case PIPE_TEX_FILTER_LINEAR
:
162 filter
|= NV40TCL_TEX_FILTER_MAG_LINEAR
;
164 case PIPE_TEX_FILTER_NEAREST
:
166 filter
|= NV40TCL_TEX_FILTER_MAG_NEAREST
;
170 switch (cso
->min_img_filter
) {
171 case PIPE_TEX_FILTER_LINEAR
:
172 switch (cso
->min_mip_filter
) {
173 case PIPE_TEX_MIPFILTER_NEAREST
:
174 filter
|= NV40TCL_TEX_FILTER_MIN_LINEAR_MIPMAP_NEAREST
;
176 case PIPE_TEX_MIPFILTER_LINEAR
:
177 filter
|= NV40TCL_TEX_FILTER_MIN_LINEAR_MIPMAP_LINEAR
;
179 case PIPE_TEX_MIPFILTER_NONE
:
181 filter
|= NV40TCL_TEX_FILTER_MIN_LINEAR
;
185 case PIPE_TEX_FILTER_NEAREST
:
187 switch (cso
->min_mip_filter
) {
188 case PIPE_TEX_MIPFILTER_NEAREST
:
189 filter
|= NV40TCL_TEX_FILTER_MIN_NEAREST_MIPMAP_NEAREST
;
191 case PIPE_TEX_MIPFILTER_LINEAR
:
192 filter
|= NV40TCL_TEX_FILTER_MIN_NEAREST_MIPMAP_LINEAR
;
194 case PIPE_TEX_MIPFILTER_NONE
:
196 filter
|= NV40TCL_TEX_FILTER_MIN_NEAREST
;
207 limit
= CLAMP(cso
->lod_bias
, -16.0, 15.0);
208 ps
->filt
|= (int)(cso
->lod_bias
* 256.0) & 0x1fff;
210 limit
= CLAMP(cso
->max_lod
, 0.0, 15.0);
211 ps
->en
|= (int)(limit
* 256.0) << 7;
213 limit
= CLAMP(cso
->min_lod
, 0.0, 15.0);
214 ps
->en
|= (int)(limit
* 256.0) << 19;
218 if (cso
->compare_mode
== PIPE_TEX_COMPARE_R_TO_TEXTURE
) {
219 switch (cso
->compare_func
) {
220 case PIPE_FUNC_NEVER
:
221 ps
->wrap
|= NV40TCL_TEX_WRAP_RCOMP_NEVER
;
223 case PIPE_FUNC_GREATER
:
224 ps
->wrap
|= NV40TCL_TEX_WRAP_RCOMP_GREATER
;
226 case PIPE_FUNC_EQUAL
:
227 ps
->wrap
|= NV40TCL_TEX_WRAP_RCOMP_EQUAL
;
229 case PIPE_FUNC_GEQUAL
:
230 ps
->wrap
|= NV40TCL_TEX_WRAP_RCOMP_GEQUAL
;
233 ps
->wrap
|= NV40TCL_TEX_WRAP_RCOMP_LESS
;
235 case PIPE_FUNC_NOTEQUAL
:
236 ps
->wrap
|= NV40TCL_TEX_WRAP_RCOMP_NOTEQUAL
;
238 case PIPE_FUNC_LEQUAL
:
239 ps
->wrap
|= NV40TCL_TEX_WRAP_RCOMP_LEQUAL
;
241 case PIPE_FUNC_ALWAYS
:
242 ps
->wrap
|= NV40TCL_TEX_WRAP_RCOMP_ALWAYS
;
249 ps
->bcol
= ((float_to_ubyte(cso
->border_color
[3]) << 24) |
250 (float_to_ubyte(cso
->border_color
[0]) << 16) |
251 (float_to_ubyte(cso
->border_color
[1]) << 8) |
252 (float_to_ubyte(cso
->border_color
[2]) << 0));
258 nv40_sampler_state_bind(struct pipe_context
*pipe
, unsigned nr
, void **sampler
)
260 struct nv40_context
*nv40
= nv40_context(pipe
);
263 for (unit
= 0; unit
< nr
; unit
++) {
264 nv40
->tex_sampler
[unit
] = sampler
[unit
];
265 nv40
->dirty_samplers
|= (1 << unit
);
268 for (unit
= nr
; unit
< nv40
->nr_samplers
; unit
++) {
269 nv40
->tex_sampler
[unit
] = NULL
;
270 nv40
->dirty_samplers
|= (1 << unit
);
273 nv40
->nr_samplers
= nr
;
274 nv40
->dirty
|= NV40_NEW_SAMPLER
;
278 nv40_sampler_state_delete(struct pipe_context
*pipe
, void *hwcso
)
284 nv40_set_sampler_texture(struct pipe_context
*pipe
, unsigned nr
,
285 struct pipe_texture
**miptree
)
287 struct nv40_context
*nv40
= nv40_context(pipe
);
290 for (unit
= 0; unit
< nr
; unit
++) {
291 pipe_texture_reference((struct pipe_texture
**)
292 &nv40
->tex_miptree
[unit
], miptree
[unit
]);
293 nv40
->dirty_samplers
|= (1 << unit
);
296 for (unit
= nr
; unit
< nv40
->nr_textures
; unit
++) {
297 pipe_texture_reference((struct pipe_texture
**)
298 &nv40
->tex_miptree
[unit
], NULL
);
299 nv40
->dirty_samplers
|= (1 << unit
);
302 nv40
->nr_textures
= nr
;
303 nv40
->dirty
|= NV40_NEW_SAMPLER
;
307 nv40_rasterizer_state_create(struct pipe_context
*pipe
,
308 const struct pipe_rasterizer_state
*cso
)
310 struct nv40_context
*nv40
= nv40_context(pipe
);
311 struct nv40_rasterizer_state
*rsso
= CALLOC(1, sizeof(*rsso
));
312 struct nouveau_stateobj
*so
= so_new(32, 0);
313 struct nouveau_grobj
*curie
= nv40
->screen
->curie
;
321 so_method(so
, curie
, NV40TCL_SHADE_MODEL
, 1);
322 so_data (so
, cso
->flatshade
? NV40TCL_SHADE_MODEL_FLAT
:
323 NV40TCL_SHADE_MODEL_SMOOTH
);
325 so_method(so
, curie
, NV40TCL_LINE_WIDTH
, 2);
326 so_data (so
, (unsigned char)(cso
->line_width
* 8.0) & 0xff);
327 so_data (so
, cso
->line_smooth
? 1 : 0);
328 so_method(so
, curie
, NV40TCL_LINE_STIPPLE_ENABLE
, 2);
329 so_data (so
, cso
->line_stipple_enable
? 1 : 0);
330 so_data (so
, (cso
->line_stipple_pattern
<< 16) |
331 cso
->line_stipple_factor
);
333 so_method(so
, curie
, NV40TCL_POINT_SIZE
, 1);
334 so_data (so
, fui(cso
->point_size
));
336 so_method(so
, curie
, NV40TCL_POLYGON_MODE_FRONT
, 6);
337 if (cso
->front_winding
== PIPE_WINDING_CCW
) {
338 so_data(so
, nvgl_polygon_mode(cso
->fill_ccw
));
339 so_data(so
, nvgl_polygon_mode(cso
->fill_cw
));
340 switch (cso
->cull_mode
) {
341 case PIPE_WINDING_CCW
:
342 so_data(so
, NV40TCL_CULL_FACE_FRONT
);
344 case PIPE_WINDING_CW
:
345 so_data(so
, NV40TCL_CULL_FACE_BACK
);
347 case PIPE_WINDING_BOTH
:
348 so_data(so
, NV40TCL_CULL_FACE_FRONT_AND_BACK
);
351 so_data(so
, NV40TCL_CULL_FACE_BACK
);
354 so_data(so
, NV40TCL_FRONT_FACE_CCW
);
356 so_data(so
, nvgl_polygon_mode(cso
->fill_cw
));
357 so_data(so
, nvgl_polygon_mode(cso
->fill_ccw
));
358 switch (cso
->cull_mode
) {
359 case PIPE_WINDING_CCW
:
360 so_data(so
, NV40TCL_CULL_FACE_BACK
);
362 case PIPE_WINDING_CW
:
363 so_data(so
, NV40TCL_CULL_FACE_FRONT
);
365 case PIPE_WINDING_BOTH
:
366 so_data(so
, NV40TCL_CULL_FACE_FRONT_AND_BACK
);
369 so_data(so
, NV40TCL_CULL_FACE_BACK
);
372 so_data(so
, NV40TCL_FRONT_FACE_CW
);
374 so_data(so
, cso
->poly_smooth
? 1 : 0);
375 so_data(so
, (cso
->cull_mode
!= PIPE_WINDING_NONE
) ? 1 : 0);
377 so_method(so
, curie
, NV40TCL_POLYGON_STIPPLE_ENABLE
, 1);
378 so_data (so
, cso
->poly_stipple_enable
? 1 : 0);
380 so_method(so
, curie
, NV40TCL_POLYGON_OFFSET_POINT_ENABLE
, 3);
381 if ((cso
->offset_cw
&& cso
->fill_cw
== PIPE_POLYGON_MODE_POINT
) ||
382 (cso
->offset_ccw
&& cso
->fill_ccw
== PIPE_POLYGON_MODE_POINT
))
386 if ((cso
->offset_cw
&& cso
->fill_cw
== PIPE_POLYGON_MODE_LINE
) ||
387 (cso
->offset_ccw
&& cso
->fill_ccw
== PIPE_POLYGON_MODE_LINE
))
391 if ((cso
->offset_cw
&& cso
->fill_cw
== PIPE_POLYGON_MODE_FILL
) ||
392 (cso
->offset_ccw
&& cso
->fill_ccw
== PIPE_POLYGON_MODE_FILL
))
396 if (cso
->offset_cw
|| cso
->offset_ccw
) {
397 so_method(so
, curie
, NV40TCL_POLYGON_OFFSET_FACTOR
, 2);
398 so_data (so
, fui(cso
->offset_scale
));
399 so_data (so
, fui(cso
->offset_units
* 2));
402 so_method(so
, curie
, NV40TCL_POINT_SPRITE
, 1);
403 if (cso
->point_sprite
) {
404 unsigned psctl
= (1 << 0), i
;
406 for (i
= 0; i
< 8; i
++) {
407 if (cso
->sprite_coord_mode
[i
] != PIPE_SPRITE_COORD_NONE
)
408 psctl
|= (1 << (8 + i
));
416 so_ref(so
, &rsso
->so
);
422 nv40_rasterizer_state_bind(struct pipe_context
*pipe
, void *hwcso
)
424 struct nv40_context
*nv40
= nv40_context(pipe
);
426 nv40
->rasterizer
= hwcso
;
427 nv40
->dirty
|= NV40_NEW_RAST
;
428 nv40
->draw_dirty
|= NV40_NEW_RAST
;
432 nv40_rasterizer_state_delete(struct pipe_context
*pipe
, void *hwcso
)
434 struct nv40_rasterizer_state
*rsso
= hwcso
;
436 so_ref(NULL
, &rsso
->so
);
441 nv40_depth_stencil_alpha_state_create(struct pipe_context
*pipe
,
442 const struct pipe_depth_stencil_alpha_state
*cso
)
444 struct nv40_context
*nv40
= nv40_context(pipe
);
445 struct nv40_zsa_state
*zsaso
= CALLOC(1, sizeof(*zsaso
));
446 struct nouveau_stateobj
*so
= so_new(32, 0);
447 struct nouveau_grobj
*curie
= nv40
->screen
->curie
;
449 so_method(so
, curie
, NV40TCL_DEPTH_FUNC
, 3);
450 so_data (so
, nvgl_comparison_op(cso
->depth
.func
));
451 so_data (so
, cso
->depth
.writemask
? 1 : 0);
452 so_data (so
, cso
->depth
.enabled
? 1 : 0);
454 so_method(so
, curie
, NV40TCL_ALPHA_TEST_ENABLE
, 3);
455 so_data (so
, cso
->alpha
.enabled
? 1 : 0);
456 so_data (so
, nvgl_comparison_op(cso
->alpha
.func
));
457 so_data (so
, float_to_ubyte(cso
->alpha
.ref
));
459 if (cso
->stencil
[0].enabled
) {
460 so_method(so
, curie
, NV40TCL_STENCIL_FRONT_ENABLE
, 8);
461 so_data (so
, cso
->stencil
[0].enabled
? 1 : 0);
462 so_data (so
, cso
->stencil
[0].write_mask
);
463 so_data (so
, nvgl_comparison_op(cso
->stencil
[0].func
));
464 so_data (so
, cso
->stencil
[0].ref_value
);
465 so_data (so
, cso
->stencil
[0].value_mask
);
466 so_data (so
, nvgl_stencil_op(cso
->stencil
[0].fail_op
));
467 so_data (so
, nvgl_stencil_op(cso
->stencil
[0].zfail_op
));
468 so_data (so
, nvgl_stencil_op(cso
->stencil
[0].zpass_op
));
470 so_method(so
, curie
, NV40TCL_STENCIL_FRONT_ENABLE
, 1);
474 if (cso
->stencil
[1].enabled
) {
475 so_method(so
, curie
, NV40TCL_STENCIL_BACK_ENABLE
, 8);
476 so_data (so
, cso
->stencil
[1].enabled
? 1 : 0);
477 so_data (so
, cso
->stencil
[1].write_mask
);
478 so_data (so
, nvgl_comparison_op(cso
->stencil
[1].func
));
479 so_data (so
, cso
->stencil
[1].ref_value
);
480 so_data (so
, cso
->stencil
[1].value_mask
);
481 so_data (so
, nvgl_stencil_op(cso
->stencil
[1].fail_op
));
482 so_data (so
, nvgl_stencil_op(cso
->stencil
[1].zfail_op
));
483 so_data (so
, nvgl_stencil_op(cso
->stencil
[1].zpass_op
));
485 so_method(so
, curie
, NV40TCL_STENCIL_BACK_ENABLE
, 1);
489 so_ref(so
, &zsaso
->so
);
491 return (void *)zsaso
;
495 nv40_depth_stencil_alpha_state_bind(struct pipe_context
*pipe
, void *hwcso
)
497 struct nv40_context
*nv40
= nv40_context(pipe
);
500 nv40
->dirty
|= NV40_NEW_ZSA
;
504 nv40_depth_stencil_alpha_state_delete(struct pipe_context
*pipe
, void *hwcso
)
506 struct nv40_zsa_state
*zsaso
= hwcso
;
508 so_ref(NULL
, &zsaso
->so
);
513 nv40_vp_state_create(struct pipe_context
*pipe
,
514 const struct pipe_shader_state
*cso
)
516 struct nv40_context
*nv40
= nv40_context(pipe
);
517 struct nv40_vertex_program
*vp
;
519 vp
= CALLOC(1, sizeof(struct nv40_vertex_program
));
520 vp
->pipe
.tokens
= tgsi_dup_tokens(cso
->tokens
);
521 vp
->draw
= draw_create_vertex_shader(nv40
->draw
, &vp
->pipe
);
527 nv40_vp_state_bind(struct pipe_context
*pipe
, void *hwcso
)
529 struct nv40_context
*nv40
= nv40_context(pipe
);
531 nv40
->vertprog
= hwcso
;
532 nv40
->dirty
|= NV40_NEW_VERTPROG
;
533 nv40
->draw_dirty
|= NV40_NEW_VERTPROG
;
537 nv40_vp_state_delete(struct pipe_context
*pipe
, void *hwcso
)
539 struct nv40_context
*nv40
= nv40_context(pipe
);
540 struct nv40_vertex_program
*vp
= hwcso
;
542 draw_delete_vertex_shader(nv40
->draw
, vp
->draw
);
543 nv40_vertprog_destroy(nv40
, vp
);
544 FREE((void*)vp
->pipe
.tokens
);
549 nv40_fp_state_create(struct pipe_context
*pipe
,
550 const struct pipe_shader_state
*cso
)
552 struct nv40_fragment_program
*fp
;
554 fp
= CALLOC(1, sizeof(struct nv40_fragment_program
));
555 fp
->pipe
.tokens
= tgsi_dup_tokens(cso
->tokens
);
557 tgsi_scan_shader(fp
->pipe
.tokens
, &fp
->info
);
563 nv40_fp_state_bind(struct pipe_context
*pipe
, void *hwcso
)
565 struct nv40_context
*nv40
= nv40_context(pipe
);
567 nv40
->fragprog
= hwcso
;
568 nv40
->dirty
|= NV40_NEW_FRAGPROG
;
572 nv40_fp_state_delete(struct pipe_context
*pipe
, void *hwcso
)
574 struct nv40_context
*nv40
= nv40_context(pipe
);
575 struct nv40_fragment_program
*fp
= hwcso
;
577 nv40_fragprog_destroy(nv40
, fp
);
578 FREE((void*)fp
->pipe
.tokens
);
583 nv40_set_blend_color(struct pipe_context
*pipe
,
584 const struct pipe_blend_color
*bcol
)
586 struct nv40_context
*nv40
= nv40_context(pipe
);
588 nv40
->blend_colour
= *bcol
;
589 nv40
->dirty
|= NV40_NEW_BCOL
;
593 nv40_set_clip_state(struct pipe_context
*pipe
,
594 const struct pipe_clip_state
*clip
)
596 struct nv40_context
*nv40
= nv40_context(pipe
);
599 nv40
->dirty
|= NV40_NEW_UCP
;
600 nv40
->draw_dirty
|= NV40_NEW_UCP
;
604 nv40_set_constant_buffer(struct pipe_context
*pipe
, uint shader
, uint index
,
605 const struct pipe_constant_buffer
*buf
)
607 struct nv40_context
*nv40
= nv40_context(pipe
);
609 nv40
->constbuf
[shader
] = buf
->buffer
;
610 nv40
->constbuf_nr
[shader
] = buf
->size
/ (4 * sizeof(float));
612 if (shader
== PIPE_SHADER_VERTEX
) {
613 nv40
->dirty
|= NV40_NEW_VERTPROG
;
615 if (shader
== PIPE_SHADER_FRAGMENT
) {
616 nv40
->dirty
|= NV40_NEW_FRAGPROG
;
621 nv40_set_framebuffer_state(struct pipe_context
*pipe
,
622 const struct pipe_framebuffer_state
*fb
)
624 struct nv40_context
*nv40
= nv40_context(pipe
);
626 nv40
->framebuffer
= *fb
;
627 nv40
->dirty
|= NV40_NEW_FB
;
631 nv40_set_polygon_stipple(struct pipe_context
*pipe
,
632 const struct pipe_poly_stipple
*stipple
)
634 struct nv40_context
*nv40
= nv40_context(pipe
);
636 memcpy(nv40
->stipple
, stipple
->stipple
, 4 * 32);
637 nv40
->dirty
|= NV40_NEW_STIPPLE
;
641 nv40_set_scissor_state(struct pipe_context
*pipe
,
642 const struct pipe_scissor_state
*s
)
644 struct nv40_context
*nv40
= nv40_context(pipe
);
647 nv40
->dirty
|= NV40_NEW_SCISSOR
;
651 nv40_set_viewport_state(struct pipe_context
*pipe
,
652 const struct pipe_viewport_state
*vpt
)
654 struct nv40_context
*nv40
= nv40_context(pipe
);
656 nv40
->viewport
= *vpt
;
657 nv40
->dirty
|= NV40_NEW_VIEWPORT
;
658 nv40
->draw_dirty
|= NV40_NEW_VIEWPORT
;
662 nv40_set_vertex_buffers(struct pipe_context
*pipe
, unsigned count
,
663 const struct pipe_vertex_buffer
*vb
)
665 struct nv40_context
*nv40
= nv40_context(pipe
);
667 memcpy(nv40
->vtxbuf
, vb
, sizeof(*vb
) * count
);
668 nv40
->vtxbuf_nr
= count
;
670 nv40
->dirty
|= NV40_NEW_ARRAYS
;
671 nv40
->draw_dirty
|= NV40_NEW_ARRAYS
;
675 nv40_set_vertex_elements(struct pipe_context
*pipe
, unsigned count
,
676 const struct pipe_vertex_element
*ve
)
678 struct nv40_context
*nv40
= nv40_context(pipe
);
680 memcpy(nv40
->vtxelt
, ve
, sizeof(*ve
) * count
);
681 nv40
->vtxelt_nr
= count
;
683 nv40
->dirty
|= NV40_NEW_ARRAYS
;
684 nv40
->draw_dirty
|= NV40_NEW_ARRAYS
;
688 nv40_set_edgeflags(struct pipe_context
*pipe
, const unsigned *bitfield
)
690 struct nv40_context
*nv40
= nv40_context(pipe
);
692 nv40
->edgeflags
= bitfield
;
693 nv40
->dirty
|= NV40_NEW_ARRAYS
;
694 nv40
->draw_dirty
|= NV40_NEW_ARRAYS
;
698 nv40_init_state_functions(struct nv40_context
*nv40
)
700 nv40
->pipe
.create_blend_state
= nv40_blend_state_create
;
701 nv40
->pipe
.bind_blend_state
= nv40_blend_state_bind
;
702 nv40
->pipe
.delete_blend_state
= nv40_blend_state_delete
;
704 nv40
->pipe
.create_sampler_state
= nv40_sampler_state_create
;
705 nv40
->pipe
.bind_sampler_states
= nv40_sampler_state_bind
;
706 nv40
->pipe
.delete_sampler_state
= nv40_sampler_state_delete
;
707 nv40
->pipe
.set_sampler_textures
= nv40_set_sampler_texture
;
709 nv40
->pipe
.create_rasterizer_state
= nv40_rasterizer_state_create
;
710 nv40
->pipe
.bind_rasterizer_state
= nv40_rasterizer_state_bind
;
711 nv40
->pipe
.delete_rasterizer_state
= nv40_rasterizer_state_delete
;
713 nv40
->pipe
.create_depth_stencil_alpha_state
=
714 nv40_depth_stencil_alpha_state_create
;
715 nv40
->pipe
.bind_depth_stencil_alpha_state
=
716 nv40_depth_stencil_alpha_state_bind
;
717 nv40
->pipe
.delete_depth_stencil_alpha_state
=
718 nv40_depth_stencil_alpha_state_delete
;
720 nv40
->pipe
.create_vs_state
= nv40_vp_state_create
;
721 nv40
->pipe
.bind_vs_state
= nv40_vp_state_bind
;
722 nv40
->pipe
.delete_vs_state
= nv40_vp_state_delete
;
724 nv40
->pipe
.create_fs_state
= nv40_fp_state_create
;
725 nv40
->pipe
.bind_fs_state
= nv40_fp_state_bind
;
726 nv40
->pipe
.delete_fs_state
= nv40_fp_state_delete
;
728 nv40
->pipe
.set_blend_color
= nv40_set_blend_color
;
729 nv40
->pipe
.set_clip_state
= nv40_set_clip_state
;
730 nv40
->pipe
.set_constant_buffer
= nv40_set_constant_buffer
;
731 nv40
->pipe
.set_framebuffer_state
= nv40_set_framebuffer_state
;
732 nv40
->pipe
.set_polygon_stipple
= nv40_set_polygon_stipple
;
733 nv40
->pipe
.set_scissor_state
= nv40_set_scissor_state
;
734 nv40
->pipe
.set_viewport_state
= nv40_set_viewport_state
;
736 nv40
->pipe
.set_edgeflags
= nv40_set_edgeflags
;
737 nv40
->pipe
.set_vertex_buffers
= nv40_set_vertex_buffers
;
738 nv40
->pipe
.set_vertex_elements
= nv40_set_vertex_elements
;