1 #include "pipe/p_state.h"
2 #include "pipe/p_defines.h"
3 #include "pipe/p_inlines.h"
5 #include "draw/draw_context.h"
7 #include "tgsi/tgsi_parse.h"
9 #include "nv40_context.h"
10 #include "nv40_state.h"
13 nv40_blend_state_create(struct pipe_context
*pipe
,
14 const struct pipe_blend_state
*cso
)
16 struct nv40_context
*nv40
= nv40_context(pipe
);
17 struct nouveau_grobj
*curie
= nv40
->screen
->curie
;
18 struct nv40_blend_state
*bso
= CALLOC(1, sizeof(*bso
));
19 struct nouveau_stateobj
*so
= so_new(16, 0);
21 if (cso
->blend_enable
) {
22 so_method(so
, curie
, NV40TCL_BLEND_ENABLE
, 3);
24 so_data (so
, (nvgl_blend_func(cso
->alpha_src_factor
) << 16) |
25 nvgl_blend_func(cso
->rgb_src_factor
));
26 so_data (so
, nvgl_blend_func(cso
->alpha_dst_factor
) << 16 |
27 nvgl_blend_func(cso
->rgb_dst_factor
));
28 so_method(so
, curie
, NV40TCL_BLEND_EQUATION
, 1);
29 so_data (so
, nvgl_blend_eqn(cso
->alpha_func
) << 16 |
30 nvgl_blend_eqn(cso
->rgb_func
));
32 so_method(so
, curie
, NV40TCL_BLEND_ENABLE
, 1);
36 so_method(so
, curie
, NV40TCL_COLOR_MASK
, 1);
37 so_data (so
, (((cso
->colormask
& PIPE_MASK_A
) ? (0x01 << 24) : 0) |
38 ((cso
->colormask
& PIPE_MASK_R
) ? (0x01 << 16) : 0) |
39 ((cso
->colormask
& PIPE_MASK_G
) ? (0x01 << 8) : 0) |
40 ((cso
->colormask
& PIPE_MASK_B
) ? (0x01 << 0) : 0)));
42 if (cso
->logicop_enable
) {
43 so_method(so
, curie
, NV40TCL_COLOR_LOGIC_OP_ENABLE
, 2);
45 so_data (so
, nvgl_logicop_func(cso
->logicop_func
));
47 so_method(so
, curie
, NV40TCL_COLOR_LOGIC_OP_ENABLE
, 1);
51 so_method(so
, curie
, NV40TCL_DITHER_ENABLE
, 1);
52 so_data (so
, cso
->dither
? 1 : 0);
61 nv40_blend_state_bind(struct pipe_context
*pipe
, void *hwcso
)
63 struct nv40_context
*nv40
= nv40_context(pipe
);
66 nv40
->dirty
|= NV40_NEW_BLEND
;
70 nv40_blend_state_delete(struct pipe_context
*pipe
, void *hwcso
)
72 struct nv40_blend_state
*bso
= hwcso
;
74 so_ref(NULL
, &bso
->so
);
79 static INLINE
unsigned
80 wrap_mode(unsigned wrap
) {
84 case PIPE_TEX_WRAP_REPEAT
:
85 ret
= NV40TCL_TEX_WRAP_S_REPEAT
;
87 case PIPE_TEX_WRAP_MIRROR_REPEAT
:
88 ret
= NV40TCL_TEX_WRAP_S_MIRRORED_REPEAT
;
90 case PIPE_TEX_WRAP_CLAMP_TO_EDGE
:
91 ret
= NV40TCL_TEX_WRAP_S_CLAMP_TO_EDGE
;
93 case PIPE_TEX_WRAP_CLAMP_TO_BORDER
:
94 ret
= NV40TCL_TEX_WRAP_S_CLAMP_TO_BORDER
;
96 case PIPE_TEX_WRAP_CLAMP
:
97 ret
= NV40TCL_TEX_WRAP_S_CLAMP
;
99 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE
:
100 ret
= NV40TCL_TEX_WRAP_S_MIRROR_CLAMP_TO_EDGE
;
102 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER
:
103 ret
= NV40TCL_TEX_WRAP_S_MIRROR_CLAMP_TO_BORDER
;
105 case PIPE_TEX_WRAP_MIRROR_CLAMP
:
106 ret
= NV40TCL_TEX_WRAP_S_MIRROR_CLAMP
;
109 NOUVEAU_ERR("unknown wrap mode: %d\n", wrap
);
110 ret
= NV40TCL_TEX_WRAP_S_REPEAT
;
114 return ret
>> NV40TCL_TEX_WRAP_S_SHIFT
;
118 nv40_sampler_state_create(struct pipe_context
*pipe
,
119 const struct pipe_sampler_state
*cso
)
121 struct nv40_sampler_state
*ps
;
124 ps
= MALLOC(sizeof(struct nv40_sampler_state
));
127 if (!cso
->normalized_coords
)
128 ps
->fmt
|= NV40TCL_TEX_FORMAT_RECT
;
130 ps
->wrap
= ((wrap_mode(cso
->wrap_s
) << NV40TCL_TEX_WRAP_S_SHIFT
) |
131 (wrap_mode(cso
->wrap_t
) << NV40TCL_TEX_WRAP_T_SHIFT
) |
132 (wrap_mode(cso
->wrap_r
) << NV40TCL_TEX_WRAP_R_SHIFT
));
135 if (cso
->max_anisotropy
>= 2.0) {
136 /* no idea, binary driver sets it, works without it.. meh.. */
137 ps
->wrap
|= (1 << 5);
139 if (cso
->max_anisotropy
>= 16.0) {
140 ps
->en
|= NV40TCL_TEX_ENABLE_ANISO_16X
;
142 if (cso
->max_anisotropy
>= 12.0) {
143 ps
->en
|= NV40TCL_TEX_ENABLE_ANISO_12X
;
145 if (cso
->max_anisotropy
>= 10.0) {
146 ps
->en
|= NV40TCL_TEX_ENABLE_ANISO_10X
;
148 if (cso
->max_anisotropy
>= 8.0) {
149 ps
->en
|= NV40TCL_TEX_ENABLE_ANISO_8X
;
151 if (cso
->max_anisotropy
>= 6.0) {
152 ps
->en
|= NV40TCL_TEX_ENABLE_ANISO_6X
;
154 if (cso
->max_anisotropy
>= 4.0) {
155 ps
->en
|= NV40TCL_TEX_ENABLE_ANISO_4X
;
157 ps
->en
|= NV40TCL_TEX_ENABLE_ANISO_2X
;
161 switch (cso
->mag_img_filter
) {
162 case PIPE_TEX_FILTER_LINEAR
:
163 filter
|= NV40TCL_TEX_FILTER_MAG_LINEAR
;
165 case PIPE_TEX_FILTER_NEAREST
:
167 filter
|= NV40TCL_TEX_FILTER_MAG_NEAREST
;
171 switch (cso
->min_img_filter
) {
172 case PIPE_TEX_FILTER_LINEAR
:
173 switch (cso
->min_mip_filter
) {
174 case PIPE_TEX_MIPFILTER_NEAREST
:
175 filter
|= NV40TCL_TEX_FILTER_MIN_LINEAR_MIPMAP_NEAREST
;
177 case PIPE_TEX_MIPFILTER_LINEAR
:
178 filter
|= NV40TCL_TEX_FILTER_MIN_LINEAR_MIPMAP_LINEAR
;
180 case PIPE_TEX_MIPFILTER_NONE
:
182 filter
|= NV40TCL_TEX_FILTER_MIN_LINEAR
;
186 case PIPE_TEX_FILTER_NEAREST
:
188 switch (cso
->min_mip_filter
) {
189 case PIPE_TEX_MIPFILTER_NEAREST
:
190 filter
|= NV40TCL_TEX_FILTER_MIN_NEAREST_MIPMAP_NEAREST
;
192 case PIPE_TEX_MIPFILTER_LINEAR
:
193 filter
|= NV40TCL_TEX_FILTER_MIN_NEAREST_MIPMAP_LINEAR
;
195 case PIPE_TEX_MIPFILTER_NONE
:
197 filter
|= NV40TCL_TEX_FILTER_MIN_NEAREST
;
208 limit
= CLAMP(cso
->lod_bias
, -16.0, 15.0);
209 ps
->filt
|= (int)(cso
->lod_bias
* 256.0) & 0x1fff;
211 limit
= CLAMP(cso
->max_lod
, 0.0, 15.0);
212 ps
->en
|= (int)(limit
* 256.0) << 7;
214 limit
= CLAMP(cso
->min_lod
, 0.0, 15.0);
215 ps
->en
|= (int)(limit
* 256.0) << 19;
219 if (cso
->compare_mode
== PIPE_TEX_COMPARE_R_TO_TEXTURE
) {
220 switch (cso
->compare_func
) {
221 case PIPE_FUNC_NEVER
:
222 ps
->wrap
|= NV40TCL_TEX_WRAP_RCOMP_NEVER
;
224 case PIPE_FUNC_GREATER
:
225 ps
->wrap
|= NV40TCL_TEX_WRAP_RCOMP_GREATER
;
227 case PIPE_FUNC_EQUAL
:
228 ps
->wrap
|= NV40TCL_TEX_WRAP_RCOMP_EQUAL
;
230 case PIPE_FUNC_GEQUAL
:
231 ps
->wrap
|= NV40TCL_TEX_WRAP_RCOMP_GEQUAL
;
234 ps
->wrap
|= NV40TCL_TEX_WRAP_RCOMP_LESS
;
236 case PIPE_FUNC_NOTEQUAL
:
237 ps
->wrap
|= NV40TCL_TEX_WRAP_RCOMP_NOTEQUAL
;
239 case PIPE_FUNC_LEQUAL
:
240 ps
->wrap
|= NV40TCL_TEX_WRAP_RCOMP_LEQUAL
;
242 case PIPE_FUNC_ALWAYS
:
243 ps
->wrap
|= NV40TCL_TEX_WRAP_RCOMP_ALWAYS
;
250 ps
->bcol
= ((float_to_ubyte(cso
->border_color
[3]) << 24) |
251 (float_to_ubyte(cso
->border_color
[0]) << 16) |
252 (float_to_ubyte(cso
->border_color
[1]) << 8) |
253 (float_to_ubyte(cso
->border_color
[2]) << 0));
259 nv40_sampler_state_bind(struct pipe_context
*pipe
, unsigned nr
, void **sampler
)
261 struct nv40_context
*nv40
= nv40_context(pipe
);
264 for (unit
= 0; unit
< nr
; unit
++) {
265 nv40
->tex_sampler
[unit
] = sampler
[unit
];
266 nv40
->dirty_samplers
|= (1 << unit
);
269 for (unit
= nr
; unit
< nv40
->nr_samplers
; unit
++) {
270 nv40
->tex_sampler
[unit
] = NULL
;
271 nv40
->dirty_samplers
|= (1 << unit
);
274 nv40
->nr_samplers
= nr
;
275 nv40
->dirty
|= NV40_NEW_SAMPLER
;
279 nv40_sampler_state_delete(struct pipe_context
*pipe
, void *hwcso
)
285 nv40_set_sampler_texture(struct pipe_context
*pipe
, unsigned nr
,
286 struct pipe_texture
**miptree
)
288 struct nv40_context
*nv40
= nv40_context(pipe
);
291 for (unit
= 0; unit
< nr
; unit
++) {
292 pipe_texture_reference((struct pipe_texture
**)
293 &nv40
->tex_miptree
[unit
], miptree
[unit
]);
294 nv40
->dirty_samplers
|= (1 << unit
);
297 for (unit
= nr
; unit
< nv40
->nr_textures
; unit
++) {
298 pipe_texture_reference((struct pipe_texture
**)
299 &nv40
->tex_miptree
[unit
], NULL
);
300 nv40
->dirty_samplers
|= (1 << unit
);
303 nv40
->nr_textures
= nr
;
304 nv40
->dirty
|= NV40_NEW_SAMPLER
;
308 nv40_rasterizer_state_create(struct pipe_context
*pipe
,
309 const struct pipe_rasterizer_state
*cso
)
311 struct nv40_context
*nv40
= nv40_context(pipe
);
312 struct nv40_rasterizer_state
*rsso
= CALLOC(1, sizeof(*rsso
));
313 struct nouveau_stateobj
*so
= so_new(32, 0);
314 struct nouveau_grobj
*curie
= nv40
->screen
->curie
;
322 so_method(so
, curie
, NV40TCL_SHADE_MODEL
, 1);
323 so_data (so
, cso
->flatshade
? NV40TCL_SHADE_MODEL_FLAT
:
324 NV40TCL_SHADE_MODEL_SMOOTH
);
326 so_method(so
, curie
, NV40TCL_LINE_WIDTH
, 2);
327 so_data (so
, (unsigned char)(cso
->line_width
* 8.0) & 0xff);
328 so_data (so
, cso
->line_smooth
? 1 : 0);
329 so_method(so
, curie
, NV40TCL_LINE_STIPPLE_ENABLE
, 2);
330 so_data (so
, cso
->line_stipple_enable
? 1 : 0);
331 so_data (so
, (cso
->line_stipple_pattern
<< 16) |
332 cso
->line_stipple_factor
);
334 so_method(so
, curie
, NV40TCL_POINT_SIZE
, 1);
335 so_data (so
, fui(cso
->point_size
));
337 so_method(so
, curie
, NV40TCL_POLYGON_MODE_FRONT
, 6);
338 if (cso
->front_winding
== PIPE_WINDING_CCW
) {
339 so_data(so
, nvgl_polygon_mode(cso
->fill_ccw
));
340 so_data(so
, nvgl_polygon_mode(cso
->fill_cw
));
341 switch (cso
->cull_mode
) {
342 case PIPE_WINDING_CCW
:
343 so_data(so
, NV40TCL_CULL_FACE_FRONT
);
345 case PIPE_WINDING_CW
:
346 so_data(so
, NV40TCL_CULL_FACE_BACK
);
348 case PIPE_WINDING_BOTH
:
349 so_data(so
, NV40TCL_CULL_FACE_FRONT_AND_BACK
);
352 so_data(so
, NV40TCL_CULL_FACE_BACK
);
355 so_data(so
, NV40TCL_FRONT_FACE_CCW
);
357 so_data(so
, nvgl_polygon_mode(cso
->fill_cw
));
358 so_data(so
, nvgl_polygon_mode(cso
->fill_ccw
));
359 switch (cso
->cull_mode
) {
360 case PIPE_WINDING_CCW
:
361 so_data(so
, NV40TCL_CULL_FACE_BACK
);
363 case PIPE_WINDING_CW
:
364 so_data(so
, NV40TCL_CULL_FACE_FRONT
);
366 case PIPE_WINDING_BOTH
:
367 so_data(so
, NV40TCL_CULL_FACE_FRONT_AND_BACK
);
370 so_data(so
, NV40TCL_CULL_FACE_BACK
);
373 so_data(so
, NV40TCL_FRONT_FACE_CW
);
375 so_data(so
, cso
->poly_smooth
? 1 : 0);
376 so_data(so
, (cso
->cull_mode
!= PIPE_WINDING_NONE
) ? 1 : 0);
378 so_method(so
, curie
, NV40TCL_POLYGON_STIPPLE_ENABLE
, 1);
379 so_data (so
, cso
->poly_stipple_enable
? 1 : 0);
381 so_method(so
, curie
, NV40TCL_POLYGON_OFFSET_POINT_ENABLE
, 3);
382 if ((cso
->offset_cw
&& cso
->fill_cw
== PIPE_POLYGON_MODE_POINT
) ||
383 (cso
->offset_ccw
&& cso
->fill_ccw
== PIPE_POLYGON_MODE_POINT
))
387 if ((cso
->offset_cw
&& cso
->fill_cw
== PIPE_POLYGON_MODE_LINE
) ||
388 (cso
->offset_ccw
&& cso
->fill_ccw
== PIPE_POLYGON_MODE_LINE
))
392 if ((cso
->offset_cw
&& cso
->fill_cw
== PIPE_POLYGON_MODE_FILL
) ||
393 (cso
->offset_ccw
&& cso
->fill_ccw
== PIPE_POLYGON_MODE_FILL
))
397 if (cso
->offset_cw
|| cso
->offset_ccw
) {
398 so_method(so
, curie
, NV40TCL_POLYGON_OFFSET_FACTOR
, 2);
399 so_data (so
, fui(cso
->offset_scale
));
400 so_data (so
, fui(cso
->offset_units
* 2));
403 so_method(so
, curie
, NV40TCL_POINT_SPRITE
, 1);
404 if (cso
->point_sprite
) {
405 unsigned psctl
= (1 << 0), i
;
407 for (i
= 0; i
< 8; i
++) {
408 if (cso
->sprite_coord_mode
[i
] != PIPE_SPRITE_COORD_NONE
)
409 psctl
|= (1 << (8 + i
));
417 so_ref(so
, &rsso
->so
);
424 nv40_rasterizer_state_bind(struct pipe_context
*pipe
, void *hwcso
)
426 struct nv40_context
*nv40
= nv40_context(pipe
);
428 nv40
->rasterizer
= hwcso
;
429 nv40
->dirty
|= NV40_NEW_RAST
;
430 nv40
->draw_dirty
|= NV40_NEW_RAST
;
434 nv40_rasterizer_state_delete(struct pipe_context
*pipe
, void *hwcso
)
436 struct nv40_rasterizer_state
*rsso
= hwcso
;
438 so_ref(NULL
, &rsso
->so
);
443 nv40_depth_stencil_alpha_state_create(struct pipe_context
*pipe
,
444 const struct pipe_depth_stencil_alpha_state
*cso
)
446 struct nv40_context
*nv40
= nv40_context(pipe
);
447 struct nv40_zsa_state
*zsaso
= CALLOC(1, sizeof(*zsaso
));
448 struct nouveau_stateobj
*so
= so_new(32, 0);
449 struct nouveau_grobj
*curie
= nv40
->screen
->curie
;
451 so_method(so
, curie
, NV40TCL_DEPTH_FUNC
, 3);
452 so_data (so
, nvgl_comparison_op(cso
->depth
.func
));
453 so_data (so
, cso
->depth
.writemask
? 1 : 0);
454 so_data (so
, cso
->depth
.enabled
? 1 : 0);
456 so_method(so
, curie
, NV40TCL_ALPHA_TEST_ENABLE
, 3);
457 so_data (so
, cso
->alpha
.enabled
? 1 : 0);
458 so_data (so
, nvgl_comparison_op(cso
->alpha
.func
));
459 so_data (so
, float_to_ubyte(cso
->alpha
.ref_value
));
461 if (cso
->stencil
[0].enabled
) {
462 so_method(so
, curie
, NV40TCL_STENCIL_FRONT_ENABLE
, 8);
463 so_data (so
, cso
->stencil
[0].enabled
? 1 : 0);
464 so_data (so
, cso
->stencil
[0].writemask
);
465 so_data (so
, nvgl_comparison_op(cso
->stencil
[0].func
));
466 so_data (so
, cso
->stencil
[0].ref_value
);
467 so_data (so
, cso
->stencil
[0].valuemask
);
468 so_data (so
, nvgl_stencil_op(cso
->stencil
[0].fail_op
));
469 so_data (so
, nvgl_stencil_op(cso
->stencil
[0].zfail_op
));
470 so_data (so
, nvgl_stencil_op(cso
->stencil
[0].zpass_op
));
472 so_method(so
, curie
, NV40TCL_STENCIL_FRONT_ENABLE
, 1);
476 if (cso
->stencil
[1].enabled
) {
477 so_method(so
, curie
, NV40TCL_STENCIL_BACK_ENABLE
, 8);
478 so_data (so
, cso
->stencil
[1].enabled
? 1 : 0);
479 so_data (so
, cso
->stencil
[1].writemask
);
480 so_data (so
, nvgl_comparison_op(cso
->stencil
[1].func
));
481 so_data (so
, cso
->stencil
[1].ref_value
);
482 so_data (so
, cso
->stencil
[1].valuemask
);
483 so_data (so
, nvgl_stencil_op(cso
->stencil
[1].fail_op
));
484 so_data (so
, nvgl_stencil_op(cso
->stencil
[1].zfail_op
));
485 so_data (so
, nvgl_stencil_op(cso
->stencil
[1].zpass_op
));
487 so_method(so
, curie
, NV40TCL_STENCIL_BACK_ENABLE
, 1);
491 so_ref(so
, &zsaso
->so
);
494 return (void *)zsaso
;
498 nv40_depth_stencil_alpha_state_bind(struct pipe_context
*pipe
, void *hwcso
)
500 struct nv40_context
*nv40
= nv40_context(pipe
);
503 nv40
->dirty
|= NV40_NEW_ZSA
;
507 nv40_depth_stencil_alpha_state_delete(struct pipe_context
*pipe
, void *hwcso
)
509 struct nv40_zsa_state
*zsaso
= hwcso
;
511 so_ref(NULL
, &zsaso
->so
);
516 nv40_vp_state_create(struct pipe_context
*pipe
,
517 const struct pipe_shader_state
*cso
)
519 struct nv40_context
*nv40
= nv40_context(pipe
);
520 struct nv40_vertex_program
*vp
;
522 vp
= CALLOC(1, sizeof(struct nv40_vertex_program
));
523 vp
->pipe
.tokens
= tgsi_dup_tokens(cso
->tokens
);
524 vp
->draw
= draw_create_vertex_shader(nv40
->draw
, &vp
->pipe
);
530 nv40_vp_state_bind(struct pipe_context
*pipe
, void *hwcso
)
532 struct nv40_context
*nv40
= nv40_context(pipe
);
534 nv40
->vertprog
= hwcso
;
535 nv40
->dirty
|= NV40_NEW_VERTPROG
;
536 nv40
->draw_dirty
|= NV40_NEW_VERTPROG
;
540 nv40_vp_state_delete(struct pipe_context
*pipe
, void *hwcso
)
542 struct nv40_context
*nv40
= nv40_context(pipe
);
543 struct nv40_vertex_program
*vp
= hwcso
;
545 draw_delete_vertex_shader(nv40
->draw
, vp
->draw
);
546 nv40_vertprog_destroy(nv40
, vp
);
547 FREE((void*)vp
->pipe
.tokens
);
552 nv40_fp_state_create(struct pipe_context
*pipe
,
553 const struct pipe_shader_state
*cso
)
555 struct nv40_fragment_program
*fp
;
557 fp
= CALLOC(1, sizeof(struct nv40_fragment_program
));
558 fp
->pipe
.tokens
= tgsi_dup_tokens(cso
->tokens
);
560 tgsi_scan_shader(fp
->pipe
.tokens
, &fp
->info
);
566 nv40_fp_state_bind(struct pipe_context
*pipe
, void *hwcso
)
568 struct nv40_context
*nv40
= nv40_context(pipe
);
570 nv40
->fragprog
= hwcso
;
571 nv40
->dirty
|= NV40_NEW_FRAGPROG
;
575 nv40_fp_state_delete(struct pipe_context
*pipe
, void *hwcso
)
577 struct nv40_context
*nv40
= nv40_context(pipe
);
578 struct nv40_fragment_program
*fp
= hwcso
;
580 nv40_fragprog_destroy(nv40
, fp
);
581 FREE((void*)fp
->pipe
.tokens
);
586 nv40_set_blend_color(struct pipe_context
*pipe
,
587 const struct pipe_blend_color
*bcol
)
589 struct nv40_context
*nv40
= nv40_context(pipe
);
591 nv40
->blend_colour
= *bcol
;
592 nv40
->dirty
|= NV40_NEW_BCOL
;
596 nv40_set_clip_state(struct pipe_context
*pipe
,
597 const struct pipe_clip_state
*clip
)
599 struct nv40_context
*nv40
= nv40_context(pipe
);
602 nv40
->dirty
|= NV40_NEW_UCP
;
603 nv40
->draw_dirty
|= NV40_NEW_UCP
;
607 nv40_set_constant_buffer(struct pipe_context
*pipe
, uint shader
, uint index
,
608 const struct pipe_constant_buffer
*buf
)
610 struct nv40_context
*nv40
= nv40_context(pipe
);
612 nv40
->constbuf
[shader
] = buf
->buffer
;
613 nv40
->constbuf_nr
[shader
] = buf
->buffer
->size
/ (4 * sizeof(float));
615 if (shader
== PIPE_SHADER_VERTEX
) {
616 nv40
->dirty
|= NV40_NEW_VERTPROG
;
618 if (shader
== PIPE_SHADER_FRAGMENT
) {
619 nv40
->dirty
|= NV40_NEW_FRAGPROG
;
624 nv40_set_framebuffer_state(struct pipe_context
*pipe
,
625 const struct pipe_framebuffer_state
*fb
)
627 struct nv40_context
*nv40
= nv40_context(pipe
);
629 nv40
->framebuffer
= *fb
;
630 nv40
->dirty
|= NV40_NEW_FB
;
634 nv40_set_polygon_stipple(struct pipe_context
*pipe
,
635 const struct pipe_poly_stipple
*stipple
)
637 struct nv40_context
*nv40
= nv40_context(pipe
);
639 memcpy(nv40
->stipple
, stipple
->stipple
, 4 * 32);
640 nv40
->dirty
|= NV40_NEW_STIPPLE
;
644 nv40_set_scissor_state(struct pipe_context
*pipe
,
645 const struct pipe_scissor_state
*s
)
647 struct nv40_context
*nv40
= nv40_context(pipe
);
650 nv40
->dirty
|= NV40_NEW_SCISSOR
;
654 nv40_set_viewport_state(struct pipe_context
*pipe
,
655 const struct pipe_viewport_state
*vpt
)
657 struct nv40_context
*nv40
= nv40_context(pipe
);
659 nv40
->viewport
= *vpt
;
660 nv40
->dirty
|= NV40_NEW_VIEWPORT
;
661 nv40
->draw_dirty
|= NV40_NEW_VIEWPORT
;
665 nv40_set_vertex_buffers(struct pipe_context
*pipe
, unsigned count
,
666 const struct pipe_vertex_buffer
*vb
)
668 struct nv40_context
*nv40
= nv40_context(pipe
);
670 memcpy(nv40
->vtxbuf
, vb
, sizeof(*vb
) * count
);
671 nv40
->vtxbuf_nr
= count
;
673 nv40
->dirty
|= NV40_NEW_ARRAYS
;
674 nv40
->draw_dirty
|= NV40_NEW_ARRAYS
;
678 nv40_set_vertex_elements(struct pipe_context
*pipe
, unsigned count
,
679 const struct pipe_vertex_element
*ve
)
681 struct nv40_context
*nv40
= nv40_context(pipe
);
683 memcpy(nv40
->vtxelt
, ve
, sizeof(*ve
) * count
);
684 nv40
->vtxelt_nr
= count
;
686 nv40
->dirty
|= NV40_NEW_ARRAYS
;
687 nv40
->draw_dirty
|= NV40_NEW_ARRAYS
;
691 nv40_set_edgeflags(struct pipe_context
*pipe
, const unsigned *bitfield
)
693 struct nv40_context
*nv40
= nv40_context(pipe
);
695 nv40
->edgeflags
= bitfield
;
696 nv40
->dirty
|= NV40_NEW_ARRAYS
;
697 nv40
->draw_dirty
|= NV40_NEW_ARRAYS
;
701 nv40_init_state_functions(struct nv40_context
*nv40
)
703 nv40
->pipe
.create_blend_state
= nv40_blend_state_create
;
704 nv40
->pipe
.bind_blend_state
= nv40_blend_state_bind
;
705 nv40
->pipe
.delete_blend_state
= nv40_blend_state_delete
;
707 nv40
->pipe
.create_sampler_state
= nv40_sampler_state_create
;
708 nv40
->pipe
.bind_fragment_sampler_states
= nv40_sampler_state_bind
;
709 nv40
->pipe
.delete_sampler_state
= nv40_sampler_state_delete
;
710 nv40
->pipe
.set_fragment_sampler_textures
= nv40_set_sampler_texture
;
712 nv40
->pipe
.create_rasterizer_state
= nv40_rasterizer_state_create
;
713 nv40
->pipe
.bind_rasterizer_state
= nv40_rasterizer_state_bind
;
714 nv40
->pipe
.delete_rasterizer_state
= nv40_rasterizer_state_delete
;
716 nv40
->pipe
.create_depth_stencil_alpha_state
=
717 nv40_depth_stencil_alpha_state_create
;
718 nv40
->pipe
.bind_depth_stencil_alpha_state
=
719 nv40_depth_stencil_alpha_state_bind
;
720 nv40
->pipe
.delete_depth_stencil_alpha_state
=
721 nv40_depth_stencil_alpha_state_delete
;
723 nv40
->pipe
.create_vs_state
= nv40_vp_state_create
;
724 nv40
->pipe
.bind_vs_state
= nv40_vp_state_bind
;
725 nv40
->pipe
.delete_vs_state
= nv40_vp_state_delete
;
727 nv40
->pipe
.create_fs_state
= nv40_fp_state_create
;
728 nv40
->pipe
.bind_fs_state
= nv40_fp_state_bind
;
729 nv40
->pipe
.delete_fs_state
= nv40_fp_state_delete
;
731 nv40
->pipe
.set_blend_color
= nv40_set_blend_color
;
732 nv40
->pipe
.set_clip_state
= nv40_set_clip_state
;
733 nv40
->pipe
.set_constant_buffer
= nv40_set_constant_buffer
;
734 nv40
->pipe
.set_framebuffer_state
= nv40_set_framebuffer_state
;
735 nv40
->pipe
.set_polygon_stipple
= nv40_set_polygon_stipple
;
736 nv40
->pipe
.set_scissor_state
= nv40_set_scissor_state
;
737 nv40
->pipe
.set_viewport_state
= nv40_set_viewport_state
;
739 nv40
->pipe
.set_edgeflags
= nv40_set_edgeflags
;
740 nv40
->pipe
.set_vertex_buffers
= nv40_set_vertex_buffers
;
741 nv40
->pipe
.set_vertex_elements
= nv40_set_vertex_elements
;