73fb023c378e612363764bcdaa94f23ba54c8934
[mesa.git] / src / gallium / drivers / nv50 / codegen / nv50_ir_driver.h
1 /*
2 * Copyright 2011 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 * SOFTWARE.
21 */
22
23 #ifndef __NV50_IR_DRIVER_H__
24 #define __NV50_IR_DRIVER_H__
25
26 #include "pipe/p_shader_tokens.h"
27
28 #include "tgsi/tgsi_util.h"
29 #include "tgsi/tgsi_parse.h"
30 #include "tgsi/tgsi_scan.h"
31
32 /*
33 * This struct constitutes linkage information in TGSI terminology.
34 *
35 * It is created by the code generator and handed to the pipe driver
36 * for input/output slot assignment.
37 */
38 struct nv50_ir_varying
39 {
40 uint8_t slot[4]; /* native slots for xyzw (addresses in 32-bit words) */
41
42 unsigned mask : 4; /* vec4 mask */
43 unsigned linear : 1; /* linearly interpolated if true (and not flat) */
44 unsigned flat : 1;
45 unsigned centroid : 1;
46 unsigned patch : 1; /* patch constant value */
47 unsigned regular : 1; /* driver-specific meaning (e.g. input in sreg) */
48 unsigned input : 1; /* indicates direction of system values */
49 unsigned oread : 1; /* true if output is read from parallel TCP */
50
51 ubyte id; /* TGSI register index */
52 ubyte sn; /* TGSI semantic name */
53 ubyte si; /* TGSI semantic index */
54 };
55
56 #define NV50_PROGRAM_IR_TGSI 0
57 #define NV50_PROGRAM_IR_SM4 1
58 #define NV50_PROGRAM_IR_GLSL 2
59 #define NV50_PROGRAM_IR_LLVM 3
60
61 #ifdef DEBUG
62 # define NV50_IR_DEBUG_BASIC (1 << 0)
63 # define NV50_IR_DEBUG_VERBOSE (2 << 0)
64 # define NV50_IR_DEBUG_REG_ALLOC (1 << 2)
65 #else
66 # define NV50_IR_DEBUG_BASIC 0
67 # define NV50_IR_DEBUG_VERBOSE 0
68 # define NV50_IR_DEBUG_REG_ALLOC 0
69 #endif
70
71 #define NV50_SEMANTIC_CLIPDISTANCE (TGSI_SEMANTIC_COUNT + 0)
72 #define NV50_SEMANTIC_TEXCOORD (TGSI_SEMANTIC_COUNT + 1)
73 #define NV50_SEMANTIC_POINTCOORD (TGSI_SEMANTIC_COUNT + 2)
74 #define NV50_SEMANTIC_VIEWPORTINDEX (TGSI_SEMANTIC_COUNT + 4)
75 #define NV50_SEMANTIC_LAYER (TGSI_SEMANTIC_COUNT + 5)
76 #define NV50_SEMANTIC_INVOCATIONID (TGSI_SEMANTIC_COUNT + 6)
77 #define NV50_SEMANTIC_TESSFACTOR (TGSI_SEMANTIC_COUNT + 7)
78 #define NV50_SEMANTIC_TESSCOORD (TGSI_SEMANTIC_COUNT + 8)
79 #define NV50_SEMANTIC_SAMPLEMASK (TGSI_SEMANTIC_COUNT + 9)
80 #define NV50_SEMANTIC_COUNT (TGSI_SEMANTIC_COUNT + 10)
81
82 #define NV50_TESS_PART_FRACT_ODD 0
83 #define NV50_TESS_PART_FRACT_EVEN 1
84 #define NV50_TESS_PART_POW2 2
85 #define NV50_TESS_PART_INTEGER 3
86
87 #define NV50_PRIM_PATCHES PIPE_PRIM_MAX
88
89 struct nv50_ir_prog_info
90 {
91 uint16_t target; /* chipset (0x50, 0x84, 0xc0, ...) */
92
93 uint8_t type; /* PIPE_SHADER */
94
95 uint8_t optLevel; /* optimization level (0 to 3) */
96 uint8_t dbgFlags;
97
98 struct {
99 int16_t maxGPR; /* may be -1 if none used */
100 int16_t maxOutput;
101 uint32_t tlsSpace; /* required local memory per thread */
102 uint32_t *code;
103 uint32_t codeSize;
104 uint8_t sourceRep; /* NV50_PROGRAM_IR */
105 const void *source;
106 void *relocData;
107 } bin;
108
109 struct nv50_ir_varying sv[PIPE_MAX_SHADER_INPUTS];
110 struct nv50_ir_varying in[PIPE_MAX_SHADER_INPUTS];
111 struct nv50_ir_varying out[PIPE_MAX_SHADER_OUTPUTS];
112 uint8_t numInputs;
113 uint8_t numOutputs;
114 uint8_t numPatchConstants; /* also included in numInputs/numOutputs */
115 uint8_t numSysVals;
116
117 struct {
118 uint32_t *buf; /* for IMMEDIATE_ARRAY */
119 uint16_t bufSize; /* size of immediate array */
120 uint16_t count; /* count of inline immediates */
121 uint32_t *data; /* inline immediate data */
122 uint8_t *type; /* for each vec4 (128 bit) */
123 } immd;
124
125 union {
126 struct {
127 uint32_t inputMask[4]; /* mask of attributes read (1 bit per scalar) */
128 } vp;
129 struct {
130 uint8_t inputPatchSize;
131 uint8_t outputPatchSize;
132 uint8_t partitioning; /* PIPE_TESS_PART */
133 int8_t winding; /* +1 (clockwise) / -1 (counter-clockwise) */
134 uint8_t domain; /* PIPE_PRIM_{QUADS,TRIANGLES,LINES} */
135 uint8_t outputPrim; /* PIPE_PRIM_{TRIANGLES,LINES,POINTS} */
136 } tp;
137 struct {
138 uint8_t inputPrim;
139 uint8_t outputPrim;
140 unsigned instanceCount;
141 unsigned maxVertices;
142 } gp;
143 struct {
144 unsigned numColourResults;
145 boolean writesDepth;
146 boolean earlyFragTests;
147 boolean separateFragData;
148 boolean usesDiscard;
149 } fp;
150 } prop;
151
152 struct {
153 uint8_t clipDistance; /* index of first clip distance output */
154 uint8_t clipDistanceMask; /* mask of clip distances defined */
155 uint8_t cullDistanceMask; /* clip distance mode (1 bit per output) */
156 int8_t genUserClip; /* request user clip planes for ClipVertex */
157 uint8_t pointSize; /* output index for PointSize */
158 uint8_t edgeFlagIn;
159 uint8_t edgeFlagOut;
160 uint8_t fragDepth; /* output index of FragDepth */
161 uint8_t sampleMask; /* output index of SampleMask */
162 uint8_t backFaceColor[2]; /* input/output indices of back face colour */
163 uint8_t globalAccess; /* 1 for read, 2 for wr, 3 for rw */
164 } io;
165
166 /* driver callback to assign input/output locations */
167 int (*assignSlots)(struct nv50_ir_prog_info *);
168 };
169
170 #ifdef __cplusplus
171 extern "C" {
172 #endif
173
174 extern int nv50_ir_generate_code(struct nv50_ir_prog_info *);
175
176 extern void nv50_ir_relocate_code(void *relocData, uint32_t *code,
177 uint32_t codePos,
178 uint32_t libPos,
179 uint32_t dataPos);
180
181 /* obtain code that will be shared among programs */
182 extern void nv50_ir_get_target_library(uint32_t chipset,
183 const uint32_t **code, uint32_t *size);
184
185 #ifdef __cplusplus
186 }
187 #endif
188
189 #endif // __NV50_IR_DRIVER_H__