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gallium/tgsi: Define the TGSI_BUFFER texture target.
[mesa.git] / src / gallium / drivers / nv50 / codegen / nv50_ir_from_tgsi.cpp
1 /*
2 * Copyright 2011 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 * SOFTWARE.
21 */
22
23 extern "C" {
24 #include "tgsi/tgsi_dump.h"
25 #include "tgsi/tgsi_scan.h"
26 }
27
28 #include "nv50_ir.h"
29 #include "nv50_ir_util.h"
30 #include "nv50_ir_build_util.h"
31
32 namespace tgsi {
33
34 class Source;
35
36 static nv50_ir::operation translateOpcode(uint opcode);
37 static nv50_ir::DataFile translateFile(uint file);
38 static nv50_ir::TexTarget translateTexture(uint texTarg);
39 static nv50_ir::SVSemantic translateSysVal(uint sysval);
40
41 class Instruction
42 {
43 public:
44 Instruction(const struct tgsi_full_instruction *inst) : insn(inst) { }
45
46 class SrcRegister
47 {
48 public:
49 SrcRegister(const struct tgsi_full_src_register *src)
50 : reg(src->Register),
51 fsr(src)
52 { }
53
54 SrcRegister(const struct tgsi_src_register& src) : reg(src), fsr(NULL) { }
55
56 struct tgsi_src_register offsetToSrc(struct tgsi_texture_offset off)
57 {
58 struct tgsi_src_register reg;
59 memset(&reg, 0, sizeof(reg));
60 reg.Index = off.Index;
61 reg.File = off.File;
62 reg.SwizzleX = off.SwizzleX;
63 reg.SwizzleY = off.SwizzleY;
64 reg.SwizzleZ = off.SwizzleZ;
65 return reg;
66 }
67
68 SrcRegister(const struct tgsi_texture_offset& off) :
69 reg(offsetToSrc(off)),
70 fsr(NULL)
71 { }
72
73 uint getFile() const { return reg.File; }
74
75 bool is2D() const { return reg.Dimension; }
76
77 bool isIndirect(int dim) const
78 {
79 return (dim && fsr) ? fsr->Dimension.Indirect : reg.Indirect;
80 }
81
82 int getIndex(int dim) const
83 {
84 return (dim && fsr) ? fsr->Dimension.Index : reg.Index;
85 }
86
87 int getSwizzle(int chan) const
88 {
89 return tgsi_util_get_src_register_swizzle(&reg, chan);
90 }
91
92 nv50_ir::Modifier getMod(int chan) const;
93
94 SrcRegister getIndirect(int dim) const
95 {
96 assert(fsr && isIndirect(dim));
97 if (dim)
98 return SrcRegister(fsr->DimIndirect);
99 return SrcRegister(fsr->Indirect);
100 }
101
102 uint32_t getValueU32(int c, const struct nv50_ir_prog_info *info) const
103 {
104 assert(reg.File == TGSI_FILE_IMMEDIATE);
105 assert(!reg.Absolute);
106 assert(!reg.Negate);
107 return info->immd.data[reg.Index * 4 + getSwizzle(c)];
108 }
109
110 private:
111 const struct tgsi_src_register reg;
112 const struct tgsi_full_src_register *fsr;
113 };
114
115 class DstRegister
116 {
117 public:
118 DstRegister(const struct tgsi_full_dst_register *dst)
119 : reg(dst->Register),
120 fdr(dst)
121 { }
122
123 DstRegister(const struct tgsi_dst_register& dst) : reg(dst), fdr(NULL) { }
124
125 uint getFile() const { return reg.File; }
126
127 bool is2D() const { return reg.Dimension; }
128
129 bool isIndirect(int dim) const
130 {
131 return (dim && fdr) ? fdr->Dimension.Indirect : reg.Indirect;
132 }
133
134 int getIndex(int dim) const
135 {
136 return (dim && fdr) ? fdr->Dimension.Dimension : reg.Index;
137 }
138
139 unsigned int getMask() const { return reg.WriteMask; }
140
141 bool isMasked(int chan) const { return !(getMask() & (1 << chan)); }
142
143 SrcRegister getIndirect(int dim) const
144 {
145 assert(fdr && isIndirect(dim));
146 if (dim)
147 return SrcRegister(fdr->DimIndirect);
148 return SrcRegister(fdr->Indirect);
149 }
150
151 private:
152 const struct tgsi_dst_register reg;
153 const struct tgsi_full_dst_register *fdr;
154 };
155
156 inline uint getOpcode() const { return insn->Instruction.Opcode; }
157
158 unsigned int srcCount() const { return insn->Instruction.NumSrcRegs; }
159 unsigned int dstCount() const { return insn->Instruction.NumDstRegs; }
160
161 // mask of used components of source s
162 unsigned int srcMask(unsigned int s) const;
163
164 SrcRegister getSrc(unsigned int s) const
165 {
166 assert(s < srcCount());
167 return SrcRegister(&insn->Src[s]);
168 }
169
170 DstRegister getDst(unsigned int d) const
171 {
172 assert(d < dstCount());
173 return DstRegister(&insn->Dst[d]);
174 }
175
176 SrcRegister getTexOffset(unsigned int i) const
177 {
178 assert(i < TGSI_FULL_MAX_TEX_OFFSETS);
179 return SrcRegister(insn->TexOffsets[i]);
180 }
181
182 unsigned int getNumTexOffsets() const { return insn->Texture.NumOffsets; }
183
184 bool checkDstSrcAliasing() const;
185
186 inline nv50_ir::operation getOP() const {
187 return translateOpcode(getOpcode()); }
188
189 nv50_ir::DataType inferSrcType() const;
190 nv50_ir::DataType inferDstType() const;
191
192 nv50_ir::CondCode getSetCond() const;
193
194 nv50_ir::TexInstruction::Target getTexture(const Source *, int s) const;
195
196 inline uint getLabel() { return insn->Label.Label; }
197
198 unsigned getSaturate() const { return insn->Instruction.Saturate; }
199
200 void print() const
201 {
202 tgsi_dump_instruction(insn, 1);
203 }
204
205 private:
206 const struct tgsi_full_instruction *insn;
207 };
208
209 unsigned int Instruction::srcMask(unsigned int s) const
210 {
211 unsigned int mask = insn->Dst[0].Register.WriteMask;
212
213 switch (insn->Instruction.Opcode) {
214 case TGSI_OPCODE_COS:
215 case TGSI_OPCODE_SIN:
216 return (mask & 0x8) | ((mask & 0x7) ? 0x1 : 0x0);
217 case TGSI_OPCODE_DP3:
218 return 0x7;
219 case TGSI_OPCODE_DP4:
220 case TGSI_OPCODE_DPH:
221 case TGSI_OPCODE_KIL: /* WriteMask ignored */
222 return 0xf;
223 case TGSI_OPCODE_DST:
224 return mask & (s ? 0xa : 0x6);
225 case TGSI_OPCODE_EX2:
226 case TGSI_OPCODE_EXP:
227 case TGSI_OPCODE_LG2:
228 case TGSI_OPCODE_LOG:
229 case TGSI_OPCODE_POW:
230 case TGSI_OPCODE_RCP:
231 case TGSI_OPCODE_RSQ:
232 case TGSI_OPCODE_SCS:
233 return 0x1;
234 case TGSI_OPCODE_IF:
235 return 0x1;
236 case TGSI_OPCODE_LIT:
237 return 0xb;
238 case TGSI_OPCODE_TEX:
239 case TGSI_OPCODE_TXB:
240 case TGSI_OPCODE_TXD:
241 case TGSI_OPCODE_TXL:
242 case TGSI_OPCODE_TXP:
243 {
244 const struct tgsi_instruction_texture *tex = &insn->Texture;
245
246 assert(insn->Instruction.Texture);
247
248 mask = 0x7;
249 if (insn->Instruction.Opcode != TGSI_OPCODE_TEX &&
250 insn->Instruction.Opcode != TGSI_OPCODE_TXD)
251 mask |= 0x8; /* bias, lod or proj */
252
253 switch (tex->Texture) {
254 case TGSI_TEXTURE_1D:
255 mask &= 0x9;
256 break;
257 case TGSI_TEXTURE_SHADOW1D:
258 mask &= 0x5;
259 break;
260 case TGSI_TEXTURE_1D_ARRAY:
261 case TGSI_TEXTURE_2D:
262 case TGSI_TEXTURE_RECT:
263 mask &= 0xb;
264 break;
265 default:
266 break;
267 }
268 }
269 return mask;
270 case TGSI_OPCODE_XPD:
271 {
272 unsigned int x = 0;
273 if (mask & 1) x |= 0x6;
274 if (mask & 2) x |= 0x5;
275 if (mask & 4) x |= 0x3;
276 return x;
277 }
278 default:
279 break;
280 }
281
282 return mask;
283 }
284
285 nv50_ir::Modifier Instruction::SrcRegister::getMod(int chan) const
286 {
287 nv50_ir::Modifier m(0);
288
289 if (reg.Absolute)
290 m = m | nv50_ir::Modifier(NV50_IR_MOD_ABS);
291 if (reg.Negate)
292 m = m | nv50_ir::Modifier(NV50_IR_MOD_NEG);
293 return m;
294 }
295
296 static nv50_ir::DataFile translateFile(uint file)
297 {
298 switch (file) {
299 case TGSI_FILE_CONSTANT: return nv50_ir::FILE_MEMORY_CONST;
300 case TGSI_FILE_INPUT: return nv50_ir::FILE_SHADER_INPUT;
301 case TGSI_FILE_OUTPUT: return nv50_ir::FILE_SHADER_OUTPUT;
302 case TGSI_FILE_TEMPORARY: return nv50_ir::FILE_GPR;
303 case TGSI_FILE_ADDRESS: return nv50_ir::FILE_ADDRESS;
304 case TGSI_FILE_PREDICATE: return nv50_ir::FILE_PREDICATE;
305 case TGSI_FILE_IMMEDIATE: return nv50_ir::FILE_IMMEDIATE;
306 case TGSI_FILE_SYSTEM_VALUE: return nv50_ir::FILE_SYSTEM_VALUE;
307 case TGSI_FILE_IMMEDIATE_ARRAY: return nv50_ir::FILE_IMMEDIATE;
308 case TGSI_FILE_TEMPORARY_ARRAY: return nv50_ir::FILE_MEMORY_LOCAL;
309 case TGSI_FILE_RESOURCE: return nv50_ir::FILE_MEMORY_GLOBAL;
310 case TGSI_FILE_SAMPLER:
311 case TGSI_FILE_NULL:
312 default:
313 return nv50_ir::FILE_NULL;
314 }
315 }
316
317 static nv50_ir::SVSemantic translateSysVal(uint sysval)
318 {
319 switch (sysval) {
320 case TGSI_SEMANTIC_FACE: return nv50_ir::SV_FACE;
321 case TGSI_SEMANTIC_PSIZE: return nv50_ir::SV_POINT_SIZE;
322 case TGSI_SEMANTIC_PRIMID: return nv50_ir::SV_PRIMITIVE_ID;
323 case TGSI_SEMANTIC_INSTANCEID: return nv50_ir::SV_INSTANCE_ID;
324 case TGSI_SEMANTIC_VERTEXID: return nv50_ir::SV_VERTEX_ID;
325 default:
326 assert(0);
327 return nv50_ir::SV_CLOCK;
328 }
329 }
330
331 #define NV50_IR_TEX_TARG_CASE(a, b) \
332 case TGSI_TEXTURE_##a: return nv50_ir::TEX_TARGET_##b;
333
334 static nv50_ir::TexTarget translateTexture(uint tex)
335 {
336 switch (tex) {
337 NV50_IR_TEX_TARG_CASE(1D, 1D);
338 NV50_IR_TEX_TARG_CASE(2D, 2D);
339 NV50_IR_TEX_TARG_CASE(3D, 3D);
340 NV50_IR_TEX_TARG_CASE(CUBE, CUBE);
341 NV50_IR_TEX_TARG_CASE(RECT, RECT);
342 NV50_IR_TEX_TARG_CASE(1D_ARRAY, 1D_ARRAY);
343 NV50_IR_TEX_TARG_CASE(2D_ARRAY, 2D_ARRAY);
344 NV50_IR_TEX_TARG_CASE(SHADOW1D, 1D_SHADOW);
345 NV50_IR_TEX_TARG_CASE(SHADOW2D, 2D_SHADOW);
346 NV50_IR_TEX_TARG_CASE(SHADOW1D_ARRAY, 1D_ARRAY_SHADOW);
347 NV50_IR_TEX_TARG_CASE(SHADOW2D_ARRAY, 2D_ARRAY_SHADOW);
348 NV50_IR_TEX_TARG_CASE(SHADOWCUBE, CUBE_SHADOW);
349 NV50_IR_TEX_TARG_CASE(SHADOWRECT, RECT_SHADOW);
350 case TGSI_BUFFER:
351 return nv50_ir::TEX_TARGET_BUFFER;
352 default:
353 assert(!"invalid texture target");
354 return nv50_ir::TEX_TARGET_2D;
355 }
356 }
357
358 nv50_ir::DataType Instruction::inferSrcType() const
359 {
360 switch (getOpcode()) {
361 case TGSI_OPCODE_AND:
362 case TGSI_OPCODE_OR:
363 case TGSI_OPCODE_XOR:
364 case TGSI_OPCODE_NOT:
365 case TGSI_OPCODE_U2F:
366 case TGSI_OPCODE_UADD:
367 case TGSI_OPCODE_UDIV:
368 case TGSI_OPCODE_UMOD:
369 case TGSI_OPCODE_UMAD:
370 case TGSI_OPCODE_UMUL:
371 case TGSI_OPCODE_UMAX:
372 case TGSI_OPCODE_UMIN:
373 case TGSI_OPCODE_USEQ:
374 case TGSI_OPCODE_USGE:
375 case TGSI_OPCODE_USLT:
376 case TGSI_OPCODE_USNE:
377 case TGSI_OPCODE_USHR:
378 case TGSI_OPCODE_UCMP:
379 return nv50_ir::TYPE_U32;
380 case TGSI_OPCODE_I2F:
381 case TGSI_OPCODE_IDIV:
382 case TGSI_OPCODE_IMAX:
383 case TGSI_OPCODE_IMIN:
384 case TGSI_OPCODE_IABS:
385 case TGSI_OPCODE_INEG:
386 case TGSI_OPCODE_ISGE:
387 case TGSI_OPCODE_ISHR:
388 case TGSI_OPCODE_ISLT:
389 case TGSI_OPCODE_ISSG:
390 case TGSI_OPCODE_SAD: // not sure about SAD, but no one has a float version
391 case TGSI_OPCODE_MOD:
392 case TGSI_OPCODE_UARL:
393 return nv50_ir::TYPE_S32;
394 default:
395 return nv50_ir::TYPE_F32;
396 }
397 }
398
399 nv50_ir::DataType Instruction::inferDstType() const
400 {
401 switch (getOpcode()) {
402 case TGSI_OPCODE_F2U: return nv50_ir::TYPE_U32;
403 case TGSI_OPCODE_F2I: return nv50_ir::TYPE_S32;
404 case TGSI_OPCODE_I2F:
405 case TGSI_OPCODE_U2F:
406 return nv50_ir::TYPE_F32;
407 default:
408 return inferSrcType();
409 }
410 }
411
412 nv50_ir::CondCode Instruction::getSetCond() const
413 {
414 using namespace nv50_ir;
415
416 switch (getOpcode()) {
417 case TGSI_OPCODE_SLT:
418 case TGSI_OPCODE_ISLT:
419 case TGSI_OPCODE_USLT:
420 return CC_LT;
421 case TGSI_OPCODE_SLE:
422 return CC_LE;
423 case TGSI_OPCODE_SGE:
424 case TGSI_OPCODE_ISGE:
425 case TGSI_OPCODE_USGE:
426 return CC_GE;
427 case TGSI_OPCODE_SGT:
428 return CC_GT;
429 case TGSI_OPCODE_SEQ:
430 case TGSI_OPCODE_USEQ:
431 return CC_EQ;
432 case TGSI_OPCODE_SNE:
433 return CC_NEU;
434 case TGSI_OPCODE_USNE:
435 return CC_NE;
436 case TGSI_OPCODE_SFL:
437 return CC_NEVER;
438 case TGSI_OPCODE_STR:
439 default:
440 return CC_ALWAYS;
441 }
442 }
443
444 #define NV50_IR_OPCODE_CASE(a, b) case TGSI_OPCODE_##a: return nv50_ir::OP_##b
445
446 static nv50_ir::operation translateOpcode(uint opcode)
447 {
448 switch (opcode) {
449 NV50_IR_OPCODE_CASE(ARL, SHL);
450 NV50_IR_OPCODE_CASE(MOV, MOV);
451
452 NV50_IR_OPCODE_CASE(RCP, RCP);
453 NV50_IR_OPCODE_CASE(RSQ, RSQ);
454
455 NV50_IR_OPCODE_CASE(MUL, MUL);
456 NV50_IR_OPCODE_CASE(ADD, ADD);
457
458 NV50_IR_OPCODE_CASE(MIN, MIN);
459 NV50_IR_OPCODE_CASE(MAX, MAX);
460 NV50_IR_OPCODE_CASE(SLT, SET);
461 NV50_IR_OPCODE_CASE(SGE, SET);
462 NV50_IR_OPCODE_CASE(MAD, MAD);
463 NV50_IR_OPCODE_CASE(SUB, SUB);
464
465 NV50_IR_OPCODE_CASE(FLR, FLOOR);
466 NV50_IR_OPCODE_CASE(ROUND, CVT);
467 NV50_IR_OPCODE_CASE(EX2, EX2);
468 NV50_IR_OPCODE_CASE(LG2, LG2);
469 NV50_IR_OPCODE_CASE(POW, POW);
470
471 NV50_IR_OPCODE_CASE(ABS, ABS);
472
473 NV50_IR_OPCODE_CASE(COS, COS);
474 NV50_IR_OPCODE_CASE(DDX, DFDX);
475 NV50_IR_OPCODE_CASE(DDY, DFDY);
476 NV50_IR_OPCODE_CASE(KILP, DISCARD);
477
478 NV50_IR_OPCODE_CASE(SEQ, SET);
479 NV50_IR_OPCODE_CASE(SFL, SET);
480 NV50_IR_OPCODE_CASE(SGT, SET);
481 NV50_IR_OPCODE_CASE(SIN, SIN);
482 NV50_IR_OPCODE_CASE(SLE, SET);
483 NV50_IR_OPCODE_CASE(SNE, SET);
484 NV50_IR_OPCODE_CASE(STR, SET);
485 NV50_IR_OPCODE_CASE(TEX, TEX);
486 NV50_IR_OPCODE_CASE(TXD, TXD);
487 NV50_IR_OPCODE_CASE(TXP, TEX);
488
489 NV50_IR_OPCODE_CASE(BRA, BRA);
490 NV50_IR_OPCODE_CASE(CAL, CALL);
491 NV50_IR_OPCODE_CASE(RET, RET);
492 NV50_IR_OPCODE_CASE(CMP, SLCT);
493
494 NV50_IR_OPCODE_CASE(TXB, TXB);
495
496 NV50_IR_OPCODE_CASE(DIV, DIV);
497
498 NV50_IR_OPCODE_CASE(TXL, TXL);
499
500 NV50_IR_OPCODE_CASE(CEIL, CEIL);
501 NV50_IR_OPCODE_CASE(I2F, CVT);
502 NV50_IR_OPCODE_CASE(NOT, NOT);
503 NV50_IR_OPCODE_CASE(TRUNC, TRUNC);
504 NV50_IR_OPCODE_CASE(SHL, SHL);
505
506 NV50_IR_OPCODE_CASE(AND, AND);
507 NV50_IR_OPCODE_CASE(OR, OR);
508 NV50_IR_OPCODE_CASE(MOD, MOD);
509 NV50_IR_OPCODE_CASE(XOR, XOR);
510 NV50_IR_OPCODE_CASE(SAD, SAD);
511 NV50_IR_OPCODE_CASE(TXF, TXF);
512 NV50_IR_OPCODE_CASE(TXQ, TXQ);
513
514 NV50_IR_OPCODE_CASE(EMIT, EMIT);
515 NV50_IR_OPCODE_CASE(ENDPRIM, RESTART);
516
517 NV50_IR_OPCODE_CASE(KIL, DISCARD);
518
519 NV50_IR_OPCODE_CASE(F2I, CVT);
520 NV50_IR_OPCODE_CASE(IDIV, DIV);
521 NV50_IR_OPCODE_CASE(IMAX, MAX);
522 NV50_IR_OPCODE_CASE(IMIN, MIN);
523 NV50_IR_OPCODE_CASE(IABS, ABS);
524 NV50_IR_OPCODE_CASE(INEG, NEG);
525 NV50_IR_OPCODE_CASE(ISGE, SET);
526 NV50_IR_OPCODE_CASE(ISHR, SHR);
527 NV50_IR_OPCODE_CASE(ISLT, SET);
528 NV50_IR_OPCODE_CASE(F2U, CVT);
529 NV50_IR_OPCODE_CASE(U2F, CVT);
530 NV50_IR_OPCODE_CASE(UADD, ADD);
531 NV50_IR_OPCODE_CASE(UDIV, DIV);
532 NV50_IR_OPCODE_CASE(UMAD, MAD);
533 NV50_IR_OPCODE_CASE(UMAX, MAX);
534 NV50_IR_OPCODE_CASE(UMIN, MIN);
535 NV50_IR_OPCODE_CASE(UMOD, MOD);
536 NV50_IR_OPCODE_CASE(UMUL, MUL);
537 NV50_IR_OPCODE_CASE(USEQ, SET);
538 NV50_IR_OPCODE_CASE(USGE, SET);
539 NV50_IR_OPCODE_CASE(USHR, SHR);
540 NV50_IR_OPCODE_CASE(USLT, SET);
541 NV50_IR_OPCODE_CASE(USNE, SET);
542
543 NV50_IR_OPCODE_CASE(LOAD, TXF);
544 NV50_IR_OPCODE_CASE(SAMPLE, TEX);
545 NV50_IR_OPCODE_CASE(SAMPLE_B, TXB);
546 NV50_IR_OPCODE_CASE(SAMPLE_C, TEX);
547 NV50_IR_OPCODE_CASE(SAMPLE_C_LZ, TEX);
548 NV50_IR_OPCODE_CASE(SAMPLE_D, TXD);
549 NV50_IR_OPCODE_CASE(SAMPLE_L, TXL);
550 NV50_IR_OPCODE_CASE(GATHER4, TXG);
551 NV50_IR_OPCODE_CASE(SVIEWINFO, TXQ);
552
553 NV50_IR_OPCODE_CASE(END, EXIT);
554
555 default:
556 return nv50_ir::OP_NOP;
557 }
558 }
559
560 bool Instruction::checkDstSrcAliasing() const
561 {
562 if (insn->Dst[0].Register.Indirect) // no danger if indirect, using memory
563 return false;
564
565 for (int s = 0; s < TGSI_FULL_MAX_SRC_REGISTERS; ++s) {
566 if (insn->Src[s].Register.File == TGSI_FILE_NULL)
567 break;
568 if (insn->Src[s].Register.File == insn->Dst[0].Register.File &&
569 insn->Src[s].Register.Index == insn->Dst[0].Register.Index)
570 return true;
571 }
572 return false;
573 }
574
575 class Source
576 {
577 public:
578 Source(struct nv50_ir_prog_info *);
579 ~Source();
580
581 public:
582 bool scanSource();
583 unsigned fileSize(unsigned file) const { return scan.file_max[file] + 1; }
584
585 public:
586 struct tgsi_shader_info scan;
587 struct tgsi_full_instruction *insns;
588 const struct tgsi_token *tokens;
589 struct nv50_ir_prog_info *info;
590
591 nv50_ir::DynArray tempArrays;
592 nv50_ir::DynArray immdArrays;
593 int tempArrayCount;
594 int immdArrayCount;
595
596 bool mainTempsInLMem;
597
598 int clipVertexOutput;
599
600 uint8_t *samplerViewTargets; // TGSI_TEXTURE_*
601 unsigned samplerViewCount;
602
603 private:
604 int inferSysValDirection(unsigned sn) const;
605 bool scanDeclaration(const struct tgsi_full_declaration *);
606 bool scanInstruction(const struct tgsi_full_instruction *);
607 void scanProperty(const struct tgsi_full_property *);
608 void scanImmediate(const struct tgsi_full_immediate *);
609
610 inline bool isEdgeFlagPassthrough(const Instruction&) const;
611 };
612
613 Source::Source(struct nv50_ir_prog_info *prog) : info(prog)
614 {
615 tokens = (const struct tgsi_token *)info->bin.source;
616
617 if (prog->dbgFlags & NV50_IR_DEBUG_BASIC)
618 tgsi_dump(tokens, 0);
619
620 samplerViewTargets = NULL;
621
622 mainTempsInLMem = FALSE;
623 }
624
625 Source::~Source()
626 {
627 if (insns)
628 FREE(insns);
629
630 if (info->immd.data)
631 FREE(info->immd.data);
632 if (info->immd.type)
633 FREE(info->immd.type);
634
635 if (samplerViewTargets)
636 delete[] samplerViewTargets;
637 }
638
639 bool Source::scanSource()
640 {
641 unsigned insnCount = 0;
642 struct tgsi_parse_context parse;
643
644 tgsi_scan_shader(tokens, &scan);
645
646 insns = (struct tgsi_full_instruction *)MALLOC(scan.num_instructions *
647 sizeof(insns[0]));
648 if (!insns)
649 return false;
650
651 clipVertexOutput = -1;
652
653 samplerViewCount = scan.file_max[TGSI_FILE_SAMPLER_VIEW] + 1;
654 samplerViewTargets = new uint8_t[samplerViewCount];
655
656 info->immd.bufSize = 0;
657 tempArrayCount = 0;
658 immdArrayCount = 0;
659
660 info->numInputs = scan.file_max[TGSI_FILE_INPUT] + 1;
661 info->numOutputs = scan.file_max[TGSI_FILE_OUTPUT] + 1;
662 info->numSysVals = scan.file_max[TGSI_FILE_SYSTEM_VALUE] + 1;
663
664 if (info->type == PIPE_SHADER_FRAGMENT) {
665 info->prop.fp.writesDepth = scan.writes_z;
666 info->prop.fp.usesDiscard = scan.uses_kill;
667 } else
668 if (info->type == PIPE_SHADER_GEOMETRY) {
669 info->prop.gp.instanceCount = 1; // default value
670 }
671
672 info->immd.data = (uint32_t *)MALLOC(scan.immediate_count * 16);
673 info->immd.type = (ubyte *)MALLOC(scan.immediate_count * sizeof(ubyte));
674
675 tgsi_parse_init(&parse, tokens);
676 while (!tgsi_parse_end_of_tokens(&parse)) {
677 tgsi_parse_token(&parse);
678
679 switch (parse.FullToken.Token.Type) {
680 case TGSI_TOKEN_TYPE_IMMEDIATE:
681 scanImmediate(&parse.FullToken.FullImmediate);
682 break;
683 case TGSI_TOKEN_TYPE_DECLARATION:
684 scanDeclaration(&parse.FullToken.FullDeclaration);
685 break;
686 case TGSI_TOKEN_TYPE_INSTRUCTION:
687 insns[insnCount++] = parse.FullToken.FullInstruction;
688 scanInstruction(&parse.FullToken.FullInstruction);
689 break;
690 case TGSI_TOKEN_TYPE_PROPERTY:
691 scanProperty(&parse.FullToken.FullProperty);
692 break;
693 default:
694 INFO("unknown TGSI token type: %d\n", parse.FullToken.Token.Type);
695 break;
696 }
697 }
698 tgsi_parse_free(&parse);
699
700 if (mainTempsInLMem)
701 info->bin.tlsSpace += (scan.file_max[TGSI_FILE_TEMPORARY] + 1) * 16;
702
703 if (info->io.genUserClip > 0) {
704 info->io.clipDistanceMask = (1 << info->io.genUserClip) - 1;
705
706 for (unsigned int n = 0; n < ((info->io.genUserClip + 3) / 4); ++n) {
707 unsigned int i = info->numOutputs++;
708 info->out[i].id = i;
709 info->out[i].sn = TGSI_SEMANTIC_CLIPDIST;
710 info->out[i].si = n;
711 info->out[i].mask = info->io.clipDistanceMask >> (n * 4);
712 }
713 }
714
715 return info->assignSlots(info) == 0;
716 }
717
718 void Source::scanProperty(const struct tgsi_full_property *prop)
719 {
720 switch (prop->Property.PropertyName) {
721 case TGSI_PROPERTY_GS_OUTPUT_PRIM:
722 info->prop.gp.outputPrim = prop->u[0].Data;
723 break;
724 case TGSI_PROPERTY_GS_INPUT_PRIM:
725 info->prop.gp.inputPrim = prop->u[0].Data;
726 break;
727 case TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES:
728 info->prop.gp.maxVertices = prop->u[0].Data;
729 break;
730 #if 0
731 case TGSI_PROPERTY_GS_INSTANCE_COUNT:
732 info->prop.gp.instanceCount = prop->u[0].Data;
733 break;
734 #endif
735 case TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS:
736 info->prop.fp.separateFragData = TRUE;
737 break;
738 case TGSI_PROPERTY_FS_COORD_ORIGIN:
739 case TGSI_PROPERTY_FS_COORD_PIXEL_CENTER:
740 // we don't care
741 break;
742 case TGSI_PROPERTY_VS_PROHIBIT_UCPS:
743 info->io.genUserClip = -1;
744 break;
745 default:
746 INFO("unhandled TGSI property %d\n", prop->Property.PropertyName);
747 break;
748 }
749 }
750
751 void Source::scanImmediate(const struct tgsi_full_immediate *imm)
752 {
753 const unsigned n = info->immd.count++;
754
755 assert(n < scan.immediate_count);
756
757 for (int c = 0; c < 4; ++c)
758 info->immd.data[n * 4 + c] = imm->u[c].Uint;
759
760 info->immd.type[n] = imm->Immediate.DataType;
761 }
762
763 int Source::inferSysValDirection(unsigned sn) const
764 {
765 switch (sn) {
766 case TGSI_SEMANTIC_INSTANCEID:
767 case TGSI_SEMANTIC_VERTEXID:
768 return 1;
769 #if 0
770 case TGSI_SEMANTIC_LAYER:
771 case TGSI_SEMANTIC_VIEWPORTINDEX:
772 return 0;
773 #endif
774 case TGSI_SEMANTIC_PRIMID:
775 return (info->type == PIPE_SHADER_FRAGMENT) ? 1 : 0;
776 default:
777 return 0;
778 }
779 }
780
781 bool Source::scanDeclaration(const struct tgsi_full_declaration *decl)
782 {
783 unsigned i;
784 unsigned sn = TGSI_SEMANTIC_GENERIC;
785 unsigned si = 0;
786 const unsigned first = decl->Range.First, last = decl->Range.Last;
787
788 if (decl->Declaration.Semantic) {
789 sn = decl->Semantic.Name;
790 si = decl->Semantic.Index;
791 }
792
793 switch (decl->Declaration.File) {
794 case TGSI_FILE_INPUT:
795 if (info->type == PIPE_SHADER_VERTEX) {
796 // all vertex attributes are equal
797 for (i = first; i <= last; ++i) {
798 info->in[i].sn = TGSI_SEMANTIC_GENERIC;
799 info->in[i].si = i;
800 }
801 } else {
802 for (i = first; i <= last; ++i, ++si) {
803 info->in[i].id = i;
804 info->in[i].sn = sn;
805 info->in[i].si = si;
806 if (info->type == PIPE_SHADER_FRAGMENT) {
807 // translate interpolation mode
808 switch (decl->Interp.Interpolate) {
809 case TGSI_INTERPOLATE_CONSTANT:
810 info->in[i].flat = 1;
811 break;
812 case TGSI_INTERPOLATE_COLOR:
813 info->in[i].sc = 1;
814 break;
815 case TGSI_INTERPOLATE_LINEAR:
816 info->in[i].linear = 1;
817 break;
818 default:
819 break;
820 }
821 if (decl->Interp.Centroid)
822 info->in[i].centroid = 1;
823 }
824 }
825 }
826 break;
827 case TGSI_FILE_OUTPUT:
828 for (i = first; i <= last; ++i, ++si) {
829 switch (sn) {
830 case TGSI_SEMANTIC_POSITION:
831 if (info->type == PIPE_SHADER_FRAGMENT)
832 info->io.fragDepth = i;
833 else
834 if (clipVertexOutput < 0)
835 clipVertexOutput = i;
836 break;
837 case TGSI_SEMANTIC_COLOR:
838 if (info->type == PIPE_SHADER_FRAGMENT)
839 info->prop.fp.numColourResults++;
840 break;
841 case TGSI_SEMANTIC_EDGEFLAG:
842 info->io.edgeFlagOut = i;
843 break;
844 case TGSI_SEMANTIC_CLIPVERTEX:
845 clipVertexOutput = i;
846 break;
847 case TGSI_SEMANTIC_CLIPDIST:
848 info->io.clipDistanceMask |=
849 decl->Declaration.UsageMask << (si * 4);
850 info->io.genUserClip = -1;
851 break;
852 default:
853 break;
854 }
855 info->out[i].id = i;
856 info->out[i].sn = sn;
857 info->out[i].si = si;
858 }
859 break;
860 case TGSI_FILE_SYSTEM_VALUE:
861 switch (sn) {
862 case TGSI_SEMANTIC_INSTANCEID:
863 info->io.instanceId = first;
864 break;
865 case TGSI_SEMANTIC_VERTEXID:
866 info->io.vertexId = first;
867 break;
868 default:
869 break;
870 }
871 for (i = first; i <= last; ++i, ++si) {
872 info->sv[i].sn = sn;
873 info->sv[i].si = si;
874 info->sv[i].input = inferSysValDirection(sn);
875 }
876 break;
877 case TGSI_FILE_SAMPLER_VIEW:
878 for (i = first; i <= last; ++i)
879 samplerViewTargets[i] = decl->SamplerView.Resource;
880 break;
881 case TGSI_FILE_IMMEDIATE_ARRAY:
882 {
883 if (decl->Dim.Index2D >= immdArrayCount)
884 immdArrayCount = decl->Dim.Index2D + 1;
885 immdArrays[decl->Dim.Index2D].u32 = (last + 1) << 2;
886 int c;
887 uint32_t base, count;
888 switch (decl->Declaration.UsageMask) {
889 case 0x1: c = 1; break;
890 case 0x3: c = 2; break;
891 default:
892 c = 4;
893 break;
894 }
895 immdArrays[decl->Dim.Index2D].u32 |= c;
896 count = (last + 1) * c;
897 base = info->immd.bufSize / 4;
898 info->immd.bufSize = (info->immd.bufSize + count * 4 + 0xf) & ~0xf;
899 info->immd.buf = (uint32_t *)REALLOC(info->immd.buf, base * 4,
900 info->immd.bufSize);
901 // NOTE: this assumes array declarations are ordered by Dim.Index2D
902 for (i = 0; i < count; ++i)
903 info->immd.buf[base + i] = decl->ImmediateData.u[i].Uint;
904 }
905 break;
906 case TGSI_FILE_TEMPORARY_ARRAY:
907 {
908 if (decl->Dim.Index2D >= tempArrayCount)
909 tempArrayCount = decl->Dim.Index2D + 1;
910 tempArrays[decl->Dim.Index2D].u32 = (last + 1) << 2;
911 int c;
912 uint32_t count;
913 switch (decl->Declaration.UsageMask) {
914 case 0x1: c = 1; break;
915 case 0x3: c = 2; break;
916 default:
917 c = 4;
918 break;
919 }
920 tempArrays[decl->Dim.Index2D].u32 |= c;
921 count = (last + 1) * c;
922 info->bin.tlsSpace += (info->bin.tlsSpace + count * 4 + 0xf) & ~0xf;
923 }
924 break;
925 case TGSI_FILE_NULL:
926 case TGSI_FILE_TEMPORARY:
927 case TGSI_FILE_ADDRESS:
928 case TGSI_FILE_CONSTANT:
929 case TGSI_FILE_IMMEDIATE:
930 case TGSI_FILE_PREDICATE:
931 case TGSI_FILE_SAMPLER:
932 break;
933 default:
934 ERROR("unhandled TGSI_FILE %d\n", decl->Declaration.File);
935 return false;
936 }
937 return true;
938 }
939
940 inline bool Source::isEdgeFlagPassthrough(const Instruction& insn) const
941 {
942 return insn.getOpcode() == TGSI_OPCODE_MOV &&
943 insn.getDst(0).getIndex(0) == info->io.edgeFlagOut &&
944 insn.getSrc(0).getFile() == TGSI_FILE_INPUT;
945 }
946
947 bool Source::scanInstruction(const struct tgsi_full_instruction *inst)
948 {
949 Instruction insn(inst);
950
951 if (insn.dstCount()) {
952 if (insn.getDst(0).getFile() == TGSI_FILE_OUTPUT) {
953 Instruction::DstRegister dst = insn.getDst(0);
954
955 if (dst.isIndirect(0))
956 for (unsigned i = 0; i < info->numOutputs; ++i)
957 info->out[i].mask = 0xf;
958 else
959 info->out[dst.getIndex(0)].mask |= dst.getMask();
960
961 if (info->out[dst.getIndex(0)].sn == TGSI_SEMANTIC_PSIZE)
962 info->out[dst.getIndex(0)].mask &= 1;
963
964 if (isEdgeFlagPassthrough(insn))
965 info->io.edgeFlagIn = insn.getSrc(0).getIndex(0);
966 } else
967 if (insn.getDst(0).getFile() == TGSI_FILE_TEMPORARY) {
968 if (insn.getDst(0).isIndirect(0))
969 mainTempsInLMem = TRUE;
970 }
971 }
972
973 for (unsigned s = 0; s < insn.srcCount(); ++s) {
974 Instruction::SrcRegister src = insn.getSrc(s);
975 if (src.getFile() == TGSI_FILE_TEMPORARY)
976 if (src.isIndirect(0))
977 mainTempsInLMem = TRUE;
978 if (src.getFile() != TGSI_FILE_INPUT)
979 continue;
980 unsigned mask = insn.srcMask(s);
981
982 if (src.isIndirect(0)) {
983 for (unsigned i = 0; i < info->numInputs; ++i)
984 info->in[i].mask = 0xf;
985 } else {
986 for (unsigned c = 0; c < 4; ++c) {
987 if (!(mask & (1 << c)))
988 continue;
989 int k = src.getSwizzle(c);
990 int i = src.getIndex(0);
991 if (info->in[i].sn != TGSI_SEMANTIC_FOG || k == TGSI_SWIZZLE_X)
992 if (k <= TGSI_SWIZZLE_W)
993 info->in[i].mask |= 1 << k;
994 }
995 }
996 }
997 return true;
998 }
999
1000 nv50_ir::TexInstruction::Target
1001 Instruction::getTexture(const tgsi::Source *code, int s) const
1002 {
1003 switch (getSrc(s).getFile()) {
1004 case TGSI_FILE_SAMPLER_VIEW: {
1005 // XXX: indirect access
1006 unsigned int r = getSrc(s).getIndex(0);
1007 assert(r < code->samplerViewCount);
1008 return translateTexture(code->samplerViewTargets[r]);
1009 }
1010 default:
1011 return translateTexture(insn->Texture.Texture);
1012 }
1013 }
1014
1015 } // namespace tgsi
1016
1017 namespace {
1018
1019 using namespace nv50_ir;
1020
1021 class Converter : public BuildUtil
1022 {
1023 public:
1024 Converter(Program *, const tgsi::Source *);
1025 ~Converter();
1026
1027 bool run();
1028
1029 private:
1030 struct Subroutine
1031 {
1032 Subroutine(Function *f) : f(f) { }
1033 Function *f;
1034 ValueMap values;
1035 };
1036
1037 Value *getVertexBase(int s);
1038 DataArray *getArrayForFile(unsigned file, int idx);
1039 Value *fetchSrc(int s, int c);
1040 Value *acquireDst(int d, int c);
1041 void storeDst(int d, int c, Value *);
1042
1043 Value *fetchSrc(const tgsi::Instruction::SrcRegister src, int c, Value *ptr);
1044 void storeDst(const tgsi::Instruction::DstRegister dst, int c,
1045 Value *val, Value *ptr);
1046
1047 Value *applySrcMod(Value *, int s, int c);
1048
1049 Symbol *makeSym(uint file, int fileIndex, int idx, int c, uint32_t addr);
1050 Symbol *srcToSym(tgsi::Instruction::SrcRegister, int c);
1051 Symbol *dstToSym(tgsi::Instruction::DstRegister, int c);
1052
1053 bool handleInstruction(const struct tgsi_full_instruction *);
1054 void exportOutputs();
1055 inline Subroutine *getSubroutine(unsigned ip);
1056 inline Subroutine *getSubroutine(Function *);
1057 inline bool isEndOfSubroutine(uint ip);
1058
1059 void loadProjTexCoords(Value *dst[4], Value *src[4], unsigned int mask);
1060
1061 // R,S,L,C,Dx,Dy encode TGSI sources for respective values (0xSf for auto)
1062 void setTexRS(TexInstruction *, unsigned int& s, int R, int S);
1063 void handleTEX(Value *dst0[4], int R, int S, int L, int C, int Dx, int Dy);
1064 void handleTXF(Value *dst0[4], int R);
1065 void handleTXQ(Value *dst0[4], enum TexQuery);
1066 void handleLIT(Value *dst0[4]);
1067 void handleUserClipPlanes();
1068
1069 Value *interpolate(tgsi::Instruction::SrcRegister, int c, Value *ptr);
1070
1071 void insertConvergenceOps(BasicBlock *conv, BasicBlock *fork);
1072
1073 Value *buildDot(int dim);
1074
1075 class BindArgumentsPass : public Pass {
1076 public:
1077 BindArgumentsPass(Converter &conv) : conv(conv) { }
1078
1079 private:
1080 Converter &conv;
1081 Subroutine *sub;
1082
1083 template<typename T> inline void
1084 updateCallArgs(Instruction *i, void (Instruction::*setArg)(int, Value *),
1085 T (Function::*proto));
1086
1087 template<typename T> inline void
1088 updatePrototype(BitSet *set, void (Function::*updateSet)(),
1089 T (Function::*proto));
1090
1091 protected:
1092 bool visit(Function *);
1093 bool visit(BasicBlock *bb) { return false; }
1094 };
1095
1096 private:
1097 const struct tgsi::Source *code;
1098 const struct nv50_ir_prog_info *info;
1099
1100 struct {
1101 std::map<unsigned, Subroutine> map;
1102 Subroutine *cur;
1103 } sub;
1104
1105 uint ip; // instruction pointer
1106
1107 tgsi::Instruction tgsi;
1108
1109 DataType dstTy;
1110 DataType srcTy;
1111
1112 DataArray tData; // TGSI_FILE_TEMPORARY
1113 DataArray aData; // TGSI_FILE_ADDRESS
1114 DataArray pData; // TGSI_FILE_PREDICATE
1115 DataArray oData; // TGSI_FILE_OUTPUT (if outputs in registers)
1116 std::vector<DataArray> lData; // TGSI_FILE_TEMPORARY_ARRAY
1117 std::vector<DataArray> iData; // TGSI_FILE_IMMEDIATE_ARRAY
1118
1119 Value *zero;
1120 Value *fragCoord[4];
1121 Value *clipVtx[4];
1122
1123 Value *vtxBase[5]; // base address of vertex in primitive (for TP/GP)
1124 uint8_t vtxBaseValid;
1125
1126 Stack condBBs; // fork BB, then else clause BB
1127 Stack joinBBs; // fork BB, for inserting join ops on ENDIF
1128 Stack loopBBs; // loop headers
1129 Stack breakBBs; // end of / after loop
1130 };
1131
1132 Symbol *
1133 Converter::srcToSym(tgsi::Instruction::SrcRegister src, int c)
1134 {
1135 const int swz = src.getSwizzle(c);
1136
1137 return makeSym(src.getFile(),
1138 src.is2D() ? src.getIndex(1) : 0,
1139 src.isIndirect(0) ? -1 : src.getIndex(0), swz,
1140 src.getIndex(0) * 16 + swz * 4);
1141 }
1142
1143 Symbol *
1144 Converter::dstToSym(tgsi::Instruction::DstRegister dst, int c)
1145 {
1146 return makeSym(dst.getFile(),
1147 dst.is2D() ? dst.getIndex(1) : 0,
1148 dst.isIndirect(0) ? -1 : dst.getIndex(0), c,
1149 dst.getIndex(0) * 16 + c * 4);
1150 }
1151
1152 Symbol *
1153 Converter::makeSym(uint tgsiFile, int fileIdx, int idx, int c, uint32_t address)
1154 {
1155 Symbol *sym = new_Symbol(prog, tgsi::translateFile(tgsiFile));
1156
1157 sym->reg.fileIndex = fileIdx;
1158
1159 if (idx >= 0) {
1160 if (sym->reg.file == FILE_SHADER_INPUT)
1161 sym->setOffset(info->in[idx].slot[c] * 4);
1162 else
1163 if (sym->reg.file == FILE_SHADER_OUTPUT)
1164 sym->setOffset(info->out[idx].slot[c] * 4);
1165 else
1166 if (sym->reg.file == FILE_SYSTEM_VALUE)
1167 sym->setSV(tgsi::translateSysVal(info->sv[idx].sn), c);
1168 else
1169 sym->setOffset(address);
1170 } else {
1171 sym->setOffset(address);
1172 }
1173 return sym;
1174 }
1175
1176 static inline uint8_t
1177 translateInterpMode(const struct nv50_ir_varying *var, operation& op)
1178 {
1179 uint8_t mode = NV50_IR_INTERP_PERSPECTIVE;
1180
1181 if (var->flat)
1182 mode = NV50_IR_INTERP_FLAT;
1183 else
1184 if (var->linear)
1185 mode = NV50_IR_INTERP_LINEAR;
1186 else
1187 if (var->sc)
1188 mode = NV50_IR_INTERP_SC;
1189
1190 op = (mode == NV50_IR_INTERP_PERSPECTIVE || mode == NV50_IR_INTERP_SC)
1191 ? OP_PINTERP : OP_LINTERP;
1192
1193 if (var->centroid)
1194 mode |= NV50_IR_INTERP_CENTROID;
1195
1196 return mode;
1197 }
1198
1199 Value *
1200 Converter::interpolate(tgsi::Instruction::SrcRegister src, int c, Value *ptr)
1201 {
1202 operation op;
1203
1204 // XXX: no way to know interpolation mode if we don't know what's accessed
1205 const uint8_t mode = translateInterpMode(&info->in[ptr ? 0 :
1206 src.getIndex(0)], op);
1207
1208 Instruction *insn = new_Instruction(func, op, TYPE_F32);
1209
1210 insn->setDef(0, getScratch());
1211 insn->setSrc(0, srcToSym(src, c));
1212 if (op == OP_PINTERP)
1213 insn->setSrc(1, fragCoord[3]);
1214 if (ptr)
1215 insn->setIndirect(0, 0, ptr);
1216
1217 insn->setInterpolate(mode);
1218
1219 bb->insertTail(insn);
1220 return insn->getDef(0);
1221 }
1222
1223 Value *
1224 Converter::applySrcMod(Value *val, int s, int c)
1225 {
1226 Modifier m = tgsi.getSrc(s).getMod(c);
1227 DataType ty = tgsi.inferSrcType();
1228
1229 if (m & Modifier(NV50_IR_MOD_ABS))
1230 val = mkOp1v(OP_ABS, ty, getScratch(), val);
1231
1232 if (m & Modifier(NV50_IR_MOD_NEG))
1233 val = mkOp1v(OP_NEG, ty, getScratch(), val);
1234
1235 return val;
1236 }
1237
1238 Value *
1239 Converter::getVertexBase(int s)
1240 {
1241 assert(s < 5);
1242 if (!(vtxBaseValid & (1 << s))) {
1243 const int index = tgsi.getSrc(s).getIndex(1);
1244 Value *rel = NULL;
1245 if (tgsi.getSrc(s).isIndirect(1))
1246 rel = fetchSrc(tgsi.getSrc(s).getIndirect(1), 0, NULL);
1247 vtxBaseValid |= 1 << s;
1248 vtxBase[s] = mkOp2v(OP_PFETCH, TYPE_U32, getSSA(), mkImm(index), rel);
1249 }
1250 return vtxBase[s];
1251 }
1252
1253 Value *
1254 Converter::fetchSrc(int s, int c)
1255 {
1256 Value *res;
1257 Value *ptr = NULL, *dimRel = NULL;
1258
1259 tgsi::Instruction::SrcRegister src = tgsi.getSrc(s);
1260
1261 if (src.isIndirect(0))
1262 ptr = fetchSrc(src.getIndirect(0), 0, NULL);
1263
1264 if (src.is2D()) {
1265 switch (src.getFile()) {
1266 case TGSI_FILE_INPUT:
1267 dimRel = getVertexBase(s);
1268 break;
1269 case TGSI_FILE_CONSTANT:
1270 // on NVC0, this is valid and c{I+J}[k] == cI[(J << 16) + k]
1271 if (src.isIndirect(1))
1272 dimRel = fetchSrc(src.getIndirect(1), 0, 0);
1273 break;
1274 default:
1275 break;
1276 }
1277 }
1278
1279 res = fetchSrc(src, c, ptr);
1280
1281 if (dimRel)
1282 res->getInsn()->setIndirect(0, 1, dimRel);
1283
1284 return applySrcMod(res, s, c);
1285 }
1286
1287 Converter::DataArray *
1288 Converter::getArrayForFile(unsigned file, int idx)
1289 {
1290 switch (file) {
1291 case TGSI_FILE_TEMPORARY:
1292 return &tData;
1293 case TGSI_FILE_PREDICATE:
1294 return &pData;
1295 case TGSI_FILE_ADDRESS:
1296 return &aData;
1297 case TGSI_FILE_TEMPORARY_ARRAY:
1298 assert(idx < code->tempArrayCount);
1299 return &lData[idx];
1300 case TGSI_FILE_IMMEDIATE_ARRAY:
1301 assert(idx < code->immdArrayCount);
1302 return &iData[idx];
1303 case TGSI_FILE_OUTPUT:
1304 assert(prog->getType() == Program::TYPE_FRAGMENT);
1305 return &oData;
1306 default:
1307 assert(!"invalid/unhandled TGSI source file");
1308 return NULL;
1309 }
1310 }
1311
1312 Value *
1313 Converter::fetchSrc(tgsi::Instruction::SrcRegister src, int c, Value *ptr)
1314 {
1315 const int idx2d = src.is2D() ? src.getIndex(1) : 0;
1316 const int idx = src.getIndex(0);
1317 const int swz = src.getSwizzle(c);
1318
1319 switch (src.getFile()) {
1320 case TGSI_FILE_IMMEDIATE:
1321 assert(!ptr);
1322 return loadImm(NULL, info->immd.data[idx * 4 + swz]);
1323 case TGSI_FILE_CONSTANT:
1324 return mkLoad(TYPE_U32, srcToSym(src, c), ptr);
1325 case TGSI_FILE_INPUT:
1326 if (prog->getType() == Program::TYPE_FRAGMENT) {
1327 // don't load masked inputs, won't be assigned a slot
1328 if (!ptr && !(info->in[idx].mask & (1 << swz)))
1329 return loadImm(NULL, swz == TGSI_SWIZZLE_W ? 1.0f : 0.0f);
1330 if (!ptr && info->in[idx].sn == TGSI_SEMANTIC_FACE)
1331 return mkOp1v(OP_RDSV, TYPE_F32, getSSA(), mkSysVal(SV_FACE, 0));
1332 return interpolate(src, c, ptr);
1333 }
1334 return mkLoad(TYPE_U32, srcToSym(src, c), ptr);
1335 case TGSI_FILE_OUTPUT:
1336 assert(!"load from output file");
1337 return NULL;
1338 case TGSI_FILE_SYSTEM_VALUE:
1339 assert(!ptr);
1340 return mkOp1v(OP_RDSV, TYPE_U32, getSSA(), srcToSym(src, c));
1341 default:
1342 return getArrayForFile(src.getFile(), idx2d)->load(
1343 sub.cur->values, idx, swz, ptr);
1344 }
1345 }
1346
1347 Value *
1348 Converter::acquireDst(int d, int c)
1349 {
1350 const tgsi::Instruction::DstRegister dst = tgsi.getDst(d);
1351 const unsigned f = dst.getFile();
1352 const int idx = dst.getIndex(0);
1353 const int idx2d = dst.is2D() ? dst.getIndex(1) : 0;
1354
1355 if (dst.isMasked(c) || f == TGSI_FILE_RESOURCE)
1356 return NULL;
1357
1358 if (dst.isIndirect(0) ||
1359 f == TGSI_FILE_TEMPORARY_ARRAY ||
1360 f == TGSI_FILE_SYSTEM_VALUE ||
1361 (f == TGSI_FILE_OUTPUT && prog->getType() != Program::TYPE_FRAGMENT))
1362 return getScratch();
1363
1364 return getArrayForFile(f, idx2d)-> acquire(sub.cur->values, idx, c);
1365 }
1366
1367 void
1368 Converter::storeDst(int d, int c, Value *val)
1369 {
1370 const tgsi::Instruction::DstRegister dst = tgsi.getDst(d);
1371
1372 switch (tgsi.getSaturate()) {
1373 case TGSI_SAT_NONE:
1374 break;
1375 case TGSI_SAT_ZERO_ONE:
1376 mkOp1(OP_SAT, dstTy, val, val);
1377 break;
1378 case TGSI_SAT_MINUS_PLUS_ONE:
1379 mkOp2(OP_MAX, dstTy, val, val, mkImm(-1.0f));
1380 mkOp2(OP_MIN, dstTy, val, val, mkImm(+1.0f));
1381 break;
1382 default:
1383 assert(!"invalid saturation mode");
1384 break;
1385 }
1386
1387 Value *ptr = dst.isIndirect(0) ?
1388 fetchSrc(dst.getIndirect(0), 0, NULL) : NULL;
1389
1390 if (info->io.genUserClip > 0 &&
1391 dst.getFile() == TGSI_FILE_OUTPUT &&
1392 !dst.isIndirect(0) && dst.getIndex(0) == code->clipVertexOutput) {
1393 mkMov(clipVtx[c], val);
1394 val = clipVtx[c];
1395 }
1396
1397 storeDst(dst, c, val, ptr);
1398 }
1399
1400 void
1401 Converter::storeDst(const tgsi::Instruction::DstRegister dst, int c,
1402 Value *val, Value *ptr)
1403 {
1404 const unsigned f = dst.getFile();
1405 const int idx = dst.getIndex(0);
1406 const int idx2d = dst.is2D() ? dst.getIndex(1) : 0;
1407
1408 if (f == TGSI_FILE_SYSTEM_VALUE) {
1409 assert(!ptr);
1410 mkOp2(OP_WRSV, TYPE_U32, NULL, dstToSym(dst, c), val);
1411 } else
1412 if (f == TGSI_FILE_OUTPUT && prog->getType() != Program::TYPE_FRAGMENT) {
1413 if (ptr || (info->out[idx].mask & (1 << c)))
1414 mkStore(OP_EXPORT, TYPE_U32, dstToSym(dst, c), ptr, val);
1415 } else
1416 if (f == TGSI_FILE_TEMPORARY ||
1417 f == TGSI_FILE_TEMPORARY_ARRAY ||
1418 f == TGSI_FILE_PREDICATE ||
1419 f == TGSI_FILE_ADDRESS ||
1420 f == TGSI_FILE_OUTPUT) {
1421 getArrayForFile(f, idx2d)->store(sub.cur->values, idx, c, ptr, val);
1422 } else {
1423 assert(!"invalid dst file");
1424 }
1425 }
1426
1427 #define FOR_EACH_DST_ENABLED_CHANNEL(d, chan, inst) \
1428 for (chan = 0; chan < 4; ++chan) \
1429 if (!inst.getDst(d).isMasked(chan))
1430
1431 Value *
1432 Converter::buildDot(int dim)
1433 {
1434 assert(dim > 0);
1435
1436 Value *src0 = fetchSrc(0, 0), *src1 = fetchSrc(1, 0);
1437 Value *dotp = getScratch();
1438
1439 mkOp2(OP_MUL, TYPE_F32, dotp, src0, src1);
1440
1441 for (int c = 1; c < dim; ++c) {
1442 src0 = fetchSrc(0, c);
1443 src1 = fetchSrc(1, c);
1444 mkOp3(OP_MAD, TYPE_F32, dotp, src0, src1, dotp);
1445 }
1446 return dotp;
1447 }
1448
1449 void
1450 Converter::insertConvergenceOps(BasicBlock *conv, BasicBlock *fork)
1451 {
1452 FlowInstruction *join = new_FlowInstruction(func, OP_JOIN, NULL);
1453 join->fixed = 1;
1454 conv->insertHead(join);
1455
1456 fork->joinAt = new_FlowInstruction(func, OP_JOINAT, conv);
1457 fork->insertBefore(fork->getExit(), fork->joinAt);
1458 }
1459
1460 void
1461 Converter::setTexRS(TexInstruction *tex, unsigned int& s, int R, int S)
1462 {
1463 unsigned rIdx = 0, sIdx = 0;
1464
1465 if (R >= 0)
1466 rIdx = tgsi.getSrc(R).getIndex(0);
1467 if (S >= 0)
1468 sIdx = tgsi.getSrc(S).getIndex(0);
1469
1470 tex->setTexture(tgsi.getTexture(code, R), rIdx, sIdx);
1471
1472 if (tgsi.getSrc(R).isIndirect(0)) {
1473 tex->tex.rIndirectSrc = s;
1474 tex->setSrc(s++, fetchSrc(tgsi.getSrc(R).getIndirect(0), 0, NULL));
1475 }
1476 if (S >= 0 && tgsi.getSrc(S).isIndirect(0)) {
1477 tex->tex.sIndirectSrc = s;
1478 tex->setSrc(s++, fetchSrc(tgsi.getSrc(S).getIndirect(0), 0, NULL));
1479 }
1480 }
1481
1482 void
1483 Converter::handleTXQ(Value *dst0[4], enum TexQuery query)
1484 {
1485 TexInstruction *tex = new_TexInstruction(func, OP_TXQ);
1486 tex->tex.query = query;
1487 unsigned int c, d;
1488
1489 for (d = 0, c = 0; c < 4; ++c) {
1490 if (!dst0[c])
1491 continue;
1492 tex->tex.mask |= 1 << c;
1493 tex->setDef(d++, dst0[c]);
1494 }
1495 tex->setSrc((c = 0), fetchSrc(0, 0)); // mip level
1496
1497 setTexRS(tex, c, 1, -1);
1498
1499 bb->insertTail(tex);
1500 }
1501
1502 void
1503 Converter::loadProjTexCoords(Value *dst[4], Value *src[4], unsigned int mask)
1504 {
1505 Value *proj = fetchSrc(0, 3);
1506 Instruction *insn = proj->getUniqueInsn();
1507 int c;
1508
1509 if (insn->op == OP_PINTERP) {
1510 bb->insertTail(insn = cloneForward(func, insn));
1511 insn->op = OP_LINTERP;
1512 insn->setInterpolate(NV50_IR_INTERP_LINEAR | insn->getSampleMode());
1513 insn->setSrc(1, NULL);
1514 proj = insn->getDef(0);
1515 }
1516 proj = mkOp1v(OP_RCP, TYPE_F32, getSSA(), proj);
1517
1518 for (c = 0; c < 4; ++c) {
1519 if (!(mask & (1 << c)))
1520 continue;
1521 if ((insn = src[c]->getUniqueInsn())->op != OP_PINTERP)
1522 continue;
1523 mask &= ~(1 << c);
1524
1525 bb->insertTail(insn = cloneForward(func, insn));
1526 insn->setInterpolate(NV50_IR_INTERP_PERSPECTIVE | insn->getSampleMode());
1527 insn->setSrc(1, proj);
1528 dst[c] = insn->getDef(0);
1529 }
1530 if (!mask)
1531 return;
1532
1533 proj = mkOp1v(OP_RCP, TYPE_F32, getSSA(), fetchSrc(0, 3));
1534
1535 for (c = 0; c < 4; ++c)
1536 if (mask & (1 << c))
1537 dst[c] = mkOp2v(OP_MUL, TYPE_F32, getSSA(), src[c], proj);
1538 }
1539
1540 // order of nv50 ir sources: x y z layer lod/bias shadow
1541 // order of TGSI TEX sources: x y z layer shadow lod/bias
1542 // lowering will finally set the hw specific order (like array first on nvc0)
1543 void
1544 Converter::handleTEX(Value *dst[4], int R, int S, int L, int C, int Dx, int Dy)
1545 {
1546 Value *val;
1547 Value *arg[4], *src[8];
1548 Value *lod = NULL, *shd = NULL;
1549 unsigned int s, c, d;
1550 TexInstruction *texi = new_TexInstruction(func, tgsi.getOP());
1551
1552 TexInstruction::Target tgt = tgsi.getTexture(code, R);
1553
1554 for (s = 0; s < tgt.getArgCount(); ++s)
1555 arg[s] = src[s] = fetchSrc(0, s);
1556
1557 if (texi->op == OP_TXL || texi->op == OP_TXB)
1558 lod = fetchSrc(L >> 4, L & 3);
1559
1560 if (C == 0x0f)
1561 C = 0x00 | MAX2(tgt.getArgCount(), 2); // guess DC src
1562
1563 if (tgt.isShadow())
1564 shd = fetchSrc(C >> 4, C & 3);
1565
1566 if (texi->op == OP_TXD) {
1567 for (c = 0; c < tgt.getDim(); ++c) {
1568 texi->dPdx[c].set(fetchSrc(Dx >> 4, (Dx & 3) + c));
1569 texi->dPdy[c].set(fetchSrc(Dy >> 4, (Dy & 3) + c));
1570 }
1571 }
1572
1573 // cube textures don't care about projection value, it's divided out
1574 if (tgsi.getOpcode() == TGSI_OPCODE_TXP && !tgt.isCube() && !tgt.isArray()) {
1575 unsigned int n = tgt.getDim();
1576 if (shd) {
1577 arg[n] = shd;
1578 ++n;
1579 assert(tgt.getDim() == tgt.getArgCount());
1580 }
1581 loadProjTexCoords(src, arg, (1 << n) - 1);
1582 if (shd)
1583 shd = src[n - 1];
1584 }
1585
1586 if (tgt.isCube()) {
1587 for (c = 0; c < 3; ++c)
1588 src[c] = mkOp1v(OP_ABS, TYPE_F32, getSSA(), arg[c]);
1589 val = getScratch();
1590 mkOp2(OP_MAX, TYPE_F32, val, src[0], src[1]);
1591 mkOp2(OP_MAX, TYPE_F32, val, src[2], val);
1592 mkOp1(OP_RCP, TYPE_F32, val, val);
1593 for (c = 0; c < 3; ++c)
1594 src[c] = mkOp2v(OP_MUL, TYPE_F32, getSSA(), arg[c], val);
1595 }
1596
1597 for (c = 0, d = 0; c < 4; ++c) {
1598 if (dst[c]) {
1599 texi->setDef(d++, dst[c]);
1600 texi->tex.mask |= 1 << c;
1601 } else {
1602 // NOTE: maybe hook up def too, for CSE
1603 }
1604 }
1605 for (s = 0; s < tgt.getArgCount(); ++s)
1606 texi->setSrc(s, src[s]);
1607 if (lod)
1608 texi->setSrc(s++, lod);
1609 if (shd)
1610 texi->setSrc(s++, shd);
1611
1612 setTexRS(texi, s, R, S);
1613
1614 if (tgsi.getOpcode() == TGSI_OPCODE_SAMPLE_C_LZ)
1615 texi->tex.levelZero = true;
1616
1617 bb->insertTail(texi);
1618 }
1619
1620 // 1st source: xyz = coordinates, w = lod
1621 // 2nd source: offset
1622 void
1623 Converter::handleTXF(Value *dst[4], int R)
1624 {
1625 TexInstruction *texi = new_TexInstruction(func, tgsi.getOP());
1626 unsigned int c, d, s;
1627
1628 texi->tex.target = tgsi.getTexture(code, R);
1629
1630 for (c = 0, d = 0; c < 4; ++c) {
1631 if (dst[c]) {
1632 texi->setDef(d++, dst[c]);
1633 texi->tex.mask |= 1 << c;
1634 }
1635 }
1636 for (c = 0; c < texi->tex.target.getArgCount(); ++c)
1637 texi->setSrc(c, fetchSrc(0, c));
1638 texi->setSrc(c++, fetchSrc(0, 3)); // lod
1639
1640 setTexRS(texi, c, R, -1);
1641
1642 for (s = 0; s < tgsi.getNumTexOffsets(); ++s) {
1643 for (c = 0; c < 3; ++c) {
1644 texi->tex.offset[s][c] = tgsi.getTexOffset(s).getValueU32(c, info);
1645 if (texi->tex.offset[s][c])
1646 texi->tex.useOffsets = s + 1;
1647 }
1648 }
1649
1650 bb->insertTail(texi);
1651 }
1652
1653 void
1654 Converter::handleLIT(Value *dst0[4])
1655 {
1656 Value *val0 = NULL;
1657 unsigned int mask = tgsi.getDst(0).getMask();
1658
1659 if (mask & (1 << 0))
1660 loadImm(dst0[0], 1.0f);
1661
1662 if (mask & (1 << 3))
1663 loadImm(dst0[3], 1.0f);
1664
1665 if (mask & (3 << 1)) {
1666 val0 = getScratch();
1667 mkOp2(OP_MAX, TYPE_F32, val0, fetchSrc(0, 0), zero);
1668 if (mask & (1 << 1))
1669 mkMov(dst0[1], val0);
1670 }
1671
1672 if (mask & (1 << 2)) {
1673 Value *src1 = fetchSrc(0, 1), *src3 = fetchSrc(0, 3);
1674 Value *val1 = getScratch(), *val3 = getScratch();
1675
1676 Value *pos128 = loadImm(NULL, +127.999999f);
1677 Value *neg128 = loadImm(NULL, -127.999999f);
1678
1679 mkOp2(OP_MAX, TYPE_F32, val1, src1, zero);
1680 mkOp2(OP_MAX, TYPE_F32, val3, src3, neg128);
1681 mkOp2(OP_MIN, TYPE_F32, val3, val3, pos128);
1682 mkOp2(OP_POW, TYPE_F32, val3, val1, val3);
1683
1684 mkCmp(OP_SLCT, CC_GT, TYPE_F32, dst0[2], val3, zero, val0);
1685 }
1686 }
1687
1688 Converter::Subroutine *
1689 Converter::getSubroutine(unsigned ip)
1690 {
1691 std::map<unsigned, Subroutine>::iterator it = sub.map.find(ip);
1692
1693 if (it == sub.map.end())
1694 it = sub.map.insert(std::make_pair(
1695 ip, Subroutine(new Function(prog, "SUB", ip)))).first;
1696
1697 return &it->second;
1698 }
1699
1700 Converter::Subroutine *
1701 Converter::getSubroutine(Function *f)
1702 {
1703 unsigned ip = f->getLabel();
1704 std::map<unsigned, Subroutine>::iterator it = sub.map.find(ip);
1705
1706 if (it == sub.map.end())
1707 it = sub.map.insert(std::make_pair(ip, Subroutine(f))).first;
1708
1709 return &it->second;
1710 }
1711
1712 bool
1713 Converter::isEndOfSubroutine(uint ip)
1714 {
1715 assert(ip < code->scan.num_instructions);
1716 tgsi::Instruction insn(&code->insns[ip]);
1717 return (insn.getOpcode() == TGSI_OPCODE_END ||
1718 insn.getOpcode() == TGSI_OPCODE_ENDSUB ||
1719 // does END occur at end of main or the very end ?
1720 insn.getOpcode() == TGSI_OPCODE_BGNSUB);
1721 }
1722
1723 bool
1724 Converter::handleInstruction(const struct tgsi_full_instruction *insn)
1725 {
1726 Value *dst0[4], *rDst0[4];
1727 Value *src0, *src1, *src2;
1728 Value *val0, *val1;
1729 int c;
1730
1731 tgsi = tgsi::Instruction(insn);
1732
1733 bool useScratchDst = tgsi.checkDstSrcAliasing();
1734
1735 operation op = tgsi.getOP();
1736 dstTy = tgsi.inferDstType();
1737 srcTy = tgsi.inferSrcType();
1738
1739 unsigned int mask = tgsi.dstCount() ? tgsi.getDst(0).getMask() : 0;
1740
1741 if (tgsi.dstCount()) {
1742 for (c = 0; c < 4; ++c) {
1743 rDst0[c] = acquireDst(0, c);
1744 dst0[c] = (useScratchDst && rDst0[c]) ? getScratch() : rDst0[c];
1745 }
1746 }
1747
1748 switch (tgsi.getOpcode()) {
1749 case TGSI_OPCODE_ADD:
1750 case TGSI_OPCODE_UADD:
1751 case TGSI_OPCODE_AND:
1752 case TGSI_OPCODE_DIV:
1753 case TGSI_OPCODE_IDIV:
1754 case TGSI_OPCODE_UDIV:
1755 case TGSI_OPCODE_MAX:
1756 case TGSI_OPCODE_MIN:
1757 case TGSI_OPCODE_IMAX:
1758 case TGSI_OPCODE_IMIN:
1759 case TGSI_OPCODE_UMAX:
1760 case TGSI_OPCODE_UMIN:
1761 case TGSI_OPCODE_MOD:
1762 case TGSI_OPCODE_UMOD:
1763 case TGSI_OPCODE_MUL:
1764 case TGSI_OPCODE_UMUL:
1765 case TGSI_OPCODE_OR:
1766 case TGSI_OPCODE_POW:
1767 case TGSI_OPCODE_SHL:
1768 case TGSI_OPCODE_ISHR:
1769 case TGSI_OPCODE_USHR:
1770 case TGSI_OPCODE_SUB:
1771 case TGSI_OPCODE_XOR:
1772 FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
1773 src0 = fetchSrc(0, c);
1774 src1 = fetchSrc(1, c);
1775 mkOp2(op, dstTy, dst0[c], src0, src1);
1776 }
1777 break;
1778 case TGSI_OPCODE_MAD:
1779 case TGSI_OPCODE_UMAD:
1780 case TGSI_OPCODE_SAD:
1781 FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
1782 src0 = fetchSrc(0, c);
1783 src1 = fetchSrc(1, c);
1784 src2 = fetchSrc(2, c);
1785 mkOp3(op, dstTy, dst0[c], src0, src1, src2);
1786 }
1787 break;
1788 case TGSI_OPCODE_MOV:
1789 case TGSI_OPCODE_ABS:
1790 case TGSI_OPCODE_CEIL:
1791 case TGSI_OPCODE_FLR:
1792 case TGSI_OPCODE_TRUNC:
1793 case TGSI_OPCODE_RCP:
1794 case TGSI_OPCODE_IABS:
1795 case TGSI_OPCODE_INEG:
1796 case TGSI_OPCODE_NOT:
1797 case TGSI_OPCODE_DDX:
1798 case TGSI_OPCODE_DDY:
1799 FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
1800 mkOp1(op, dstTy, dst0[c], fetchSrc(0, c));
1801 break;
1802 case TGSI_OPCODE_RSQ:
1803 src0 = fetchSrc(0, 0);
1804 val0 = getScratch();
1805 mkOp1(OP_ABS, TYPE_F32, val0, src0);
1806 mkOp1(OP_RSQ, TYPE_F32, val0, val0);
1807 FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
1808 mkMov(dst0[c], val0);
1809 break;
1810 case TGSI_OPCODE_ARL:
1811 FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
1812 src0 = fetchSrc(0, c);
1813 mkCvt(OP_CVT, TYPE_S32, dst0[c], TYPE_F32, src0)->rnd = ROUND_M;
1814 mkOp2(OP_SHL, TYPE_U32, dst0[c], dst0[c], mkImm(4));
1815 }
1816 break;
1817 case TGSI_OPCODE_UARL:
1818 FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
1819 mkOp2(OP_SHL, TYPE_U32, dst0[c], fetchSrc(0, c), mkImm(4));
1820 break;
1821 case TGSI_OPCODE_EX2:
1822 case TGSI_OPCODE_LG2:
1823 val0 = mkOp1(op, TYPE_F32, getScratch(), fetchSrc(0, 0))->getDef(0);
1824 FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
1825 mkOp1(OP_MOV, TYPE_F32, dst0[c], val0);
1826 break;
1827 case TGSI_OPCODE_COS:
1828 case TGSI_OPCODE_SIN:
1829 val0 = getScratch();
1830 if (mask & 7) {
1831 mkOp1(OP_PRESIN, TYPE_F32, val0, fetchSrc(0, 0));
1832 mkOp1(op, TYPE_F32, val0, val0);
1833 for (c = 0; c < 3; ++c)
1834 if (dst0[c])
1835 mkMov(dst0[c], val0);
1836 }
1837 if (dst0[3]) {
1838 mkOp1(OP_PRESIN, TYPE_F32, val0, fetchSrc(0, 3));
1839 mkOp1(op, TYPE_F32, dst0[3], val0);
1840 }
1841 break;
1842 case TGSI_OPCODE_SCS:
1843 if (mask & 3) {
1844 val0 = mkOp1v(OP_PRESIN, TYPE_F32, getSSA(), fetchSrc(0, 0));
1845 if (dst0[0])
1846 mkOp1(OP_COS, TYPE_F32, dst0[0], val0);
1847 if (dst0[1])
1848 mkOp1(OP_SIN, TYPE_F32, dst0[1], val0);
1849 }
1850 if (dst0[2])
1851 loadImm(dst0[2], 0.0f);
1852 if (dst0[3])
1853 loadImm(dst0[3], 1.0f);
1854 break;
1855 case TGSI_OPCODE_EXP:
1856 src0 = fetchSrc(0, 0);
1857 val0 = mkOp1v(OP_FLOOR, TYPE_F32, getSSA(), src0);
1858 if (dst0[1])
1859 mkOp2(OP_SUB, TYPE_F32, dst0[1], src0, val0);
1860 if (dst0[0])
1861 mkOp1(OP_EX2, TYPE_F32, dst0[0], val0);
1862 if (dst0[2])
1863 mkOp1(OP_EX2, TYPE_F32, dst0[2], src0);
1864 if (dst0[3])
1865 loadImm(dst0[3], 1.0f);
1866 break;
1867 case TGSI_OPCODE_LOG:
1868 src0 = mkOp1v(OP_ABS, TYPE_F32, getSSA(), fetchSrc(0, 0));
1869 val0 = mkOp1v(OP_LG2, TYPE_F32, dst0[2] ? dst0[2] : getSSA(), src0);
1870 if (dst0[0] || dst0[1])
1871 val1 = mkOp1v(OP_FLOOR, TYPE_F32, dst0[0] ? dst0[0] : getSSA(), val0);
1872 if (dst0[1]) {
1873 mkOp1(OP_EX2, TYPE_F32, dst0[1], val1);
1874 mkOp1(OP_RCP, TYPE_F32, dst0[1], dst0[1]);
1875 mkOp2(OP_MUL, TYPE_F32, dst0[1], dst0[1], src0);
1876 }
1877 if (dst0[3])
1878 loadImm(dst0[3], 1.0f);
1879 break;
1880 case TGSI_OPCODE_DP2:
1881 val0 = buildDot(2);
1882 FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
1883 mkMov(dst0[c], val0);
1884 break;
1885 case TGSI_OPCODE_DP3:
1886 val0 = buildDot(3);
1887 FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
1888 mkMov(dst0[c], val0);
1889 break;
1890 case TGSI_OPCODE_DP4:
1891 val0 = buildDot(4);
1892 FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
1893 mkMov(dst0[c], val0);
1894 break;
1895 case TGSI_OPCODE_DPH:
1896 val0 = buildDot(3);
1897 src1 = fetchSrc(1, 3);
1898 mkOp2(OP_ADD, TYPE_F32, val0, val0, src1);
1899 FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
1900 mkMov(dst0[c], val0);
1901 break;
1902 case TGSI_OPCODE_DST:
1903 if (dst0[0])
1904 loadImm(dst0[0], 1.0f);
1905 if (dst0[1]) {
1906 src0 = fetchSrc(0, 1);
1907 src1 = fetchSrc(1, 1);
1908 mkOp2(OP_MUL, TYPE_F32, dst0[1], src0, src1);
1909 }
1910 if (dst0[2])
1911 mkMov(dst0[2], fetchSrc(0, 2));
1912 if (dst0[3])
1913 mkMov(dst0[3], fetchSrc(1, 3));
1914 break;
1915 case TGSI_OPCODE_LRP:
1916 FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
1917 src0 = fetchSrc(0, c);
1918 src1 = fetchSrc(1, c);
1919 src2 = fetchSrc(2, c);
1920 mkOp3(OP_MAD, TYPE_F32, dst0[c],
1921 mkOp2v(OP_SUB, TYPE_F32, getSSA(), src1, src2), src0, src2);
1922 }
1923 break;
1924 case TGSI_OPCODE_LIT:
1925 handleLIT(dst0);
1926 break;
1927 case TGSI_OPCODE_XPD:
1928 FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
1929 if (c < 3) {
1930 val0 = getSSA();
1931 src0 = fetchSrc(1, (c + 1) % 3);
1932 src1 = fetchSrc(0, (c + 2) % 3);
1933 mkOp2(OP_MUL, TYPE_F32, val0, src0, src1);
1934 mkOp1(OP_NEG, TYPE_F32, val0, val0);
1935
1936 src0 = fetchSrc(0, (c + 1) % 3);
1937 src1 = fetchSrc(1, (c + 2) % 3);
1938 mkOp3(OP_MAD, TYPE_F32, dst0[c], src0, src1, val0);
1939 } else {
1940 loadImm(dst0[c], 1.0f);
1941 }
1942 }
1943 break;
1944 case TGSI_OPCODE_ISSG:
1945 case TGSI_OPCODE_SSG:
1946 FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
1947 src0 = fetchSrc(0, c);
1948 val0 = getScratch();
1949 val1 = getScratch();
1950 mkCmp(OP_SET, CC_GT, srcTy, val0, src0, zero);
1951 mkCmp(OP_SET, CC_LT, srcTy, val1, src0, zero);
1952 if (srcTy == TYPE_F32)
1953 mkOp2(OP_SUB, TYPE_F32, dst0[c], val0, val1);
1954 else
1955 mkOp2(OP_SUB, TYPE_S32, dst0[c], val1, val0);
1956 }
1957 break;
1958 case TGSI_OPCODE_UCMP:
1959 case TGSI_OPCODE_CMP:
1960 FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
1961 src0 = fetchSrc(0, c);
1962 src1 = fetchSrc(1, c);
1963 src2 = fetchSrc(2, c);
1964 if (src1 == src2)
1965 mkMov(dst0[c], src1);
1966 else
1967 mkCmp(OP_SLCT, (srcTy == TYPE_F32) ? CC_LT : CC_NE,
1968 srcTy, dst0[c], src1, src2, src0);
1969 }
1970 break;
1971 case TGSI_OPCODE_FRC:
1972 FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
1973 src0 = fetchSrc(0, c);
1974 val0 = getScratch();
1975 mkOp1(OP_FLOOR, TYPE_F32, val0, src0);
1976 mkOp2(OP_SUB, TYPE_F32, dst0[c], src0, val0);
1977 }
1978 break;
1979 case TGSI_OPCODE_ROUND:
1980 FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
1981 mkCvt(OP_CVT, TYPE_F32, dst0[c], TYPE_F32, fetchSrc(0, c))
1982 ->rnd = ROUND_NI;
1983 break;
1984 case TGSI_OPCODE_CLAMP:
1985 FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
1986 src0 = fetchSrc(0, c);
1987 src1 = fetchSrc(1, c);
1988 src2 = fetchSrc(2, c);
1989 val0 = getScratch();
1990 mkOp2(OP_MIN, TYPE_F32, val0, src0, src1);
1991 mkOp2(OP_MAX, TYPE_F32, dst0[c], val0, src2);
1992 }
1993 break;
1994 case TGSI_OPCODE_SLT:
1995 case TGSI_OPCODE_SGE:
1996 case TGSI_OPCODE_SEQ:
1997 case TGSI_OPCODE_SFL:
1998 case TGSI_OPCODE_SGT:
1999 case TGSI_OPCODE_SLE:
2000 case TGSI_OPCODE_SNE:
2001 case TGSI_OPCODE_STR:
2002 case TGSI_OPCODE_ISGE:
2003 case TGSI_OPCODE_ISLT:
2004 case TGSI_OPCODE_USEQ:
2005 case TGSI_OPCODE_USGE:
2006 case TGSI_OPCODE_USLT:
2007 case TGSI_OPCODE_USNE:
2008 FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
2009 src0 = fetchSrc(0, c);
2010 src1 = fetchSrc(1, c);
2011 mkCmp(op, tgsi.getSetCond(), dstTy, dst0[c], src0, src1);
2012 }
2013 break;
2014 case TGSI_OPCODE_KIL:
2015 val0 = new_LValue(func, FILE_PREDICATE);
2016 for (c = 0; c < 4; ++c) {
2017 mkCmp(OP_SET, CC_LT, TYPE_F32, val0, fetchSrc(0, c), zero);
2018 mkOp(OP_DISCARD, TYPE_NONE, NULL)->setPredicate(CC_P, val0);
2019 }
2020 break;
2021 case TGSI_OPCODE_KILP:
2022 mkOp(OP_DISCARD, TYPE_NONE, NULL);
2023 break;
2024 case TGSI_OPCODE_TEX:
2025 case TGSI_OPCODE_TXB:
2026 case TGSI_OPCODE_TXL:
2027 case TGSI_OPCODE_TXP:
2028 // R S L C Dx Dy
2029 handleTEX(dst0, 1, 1, 0x03, 0x0f, 0x00, 0x00);
2030 break;
2031 case TGSI_OPCODE_TXD:
2032 handleTEX(dst0, 3, 3, 0x03, 0x0f, 0x10, 0x20);
2033 break;
2034 case TGSI_OPCODE_SAMPLE:
2035 case TGSI_OPCODE_SAMPLE_B:
2036 case TGSI_OPCODE_SAMPLE_D:
2037 case TGSI_OPCODE_SAMPLE_L:
2038 case TGSI_OPCODE_SAMPLE_C:
2039 case TGSI_OPCODE_SAMPLE_C_LZ:
2040 handleTEX(dst0, 1, 2, 0x30, 0x31, 0x40, 0x50);
2041 break;
2042 case TGSI_OPCODE_TXF:
2043 case TGSI_OPCODE_LOAD:
2044 handleTXF(dst0, 1);
2045 break;
2046 case TGSI_OPCODE_TXQ:
2047 case TGSI_OPCODE_SVIEWINFO:
2048 handleTXQ(dst0, TXQ_DIMS);
2049 break;
2050 case TGSI_OPCODE_F2I:
2051 case TGSI_OPCODE_F2U:
2052 FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
2053 mkCvt(OP_CVT, dstTy, dst0[c], srcTy, fetchSrc(0, c))->rnd = ROUND_Z;
2054 break;
2055 case TGSI_OPCODE_I2F:
2056 case TGSI_OPCODE_U2F:
2057 FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
2058 mkCvt(OP_CVT, dstTy, dst0[c], srcTy, fetchSrc(0, c));
2059 break;
2060 case TGSI_OPCODE_EMIT:
2061 case TGSI_OPCODE_ENDPRIM:
2062 // get vertex stream if specified (must be immediate)
2063 src0 = tgsi.srcCount() ?
2064 mkImm(tgsi.getSrc(0).getValueU32(0, info)) : zero;
2065 mkOp1(op, TYPE_U32, NULL, src0)->fixed = 1;
2066 break;
2067 case TGSI_OPCODE_IF:
2068 {
2069 BasicBlock *ifBB = new BasicBlock(func);
2070
2071 bb->cfg.attach(&ifBB->cfg, Graph::Edge::TREE);
2072 condBBs.push(bb);
2073 joinBBs.push(bb);
2074
2075 mkFlow(OP_BRA, NULL, CC_NOT_P, fetchSrc(0, 0));
2076
2077 setPosition(ifBB, true);
2078 }
2079 break;
2080 case TGSI_OPCODE_ELSE:
2081 {
2082 BasicBlock *elseBB = new BasicBlock(func);
2083 BasicBlock *forkBB = reinterpret_cast<BasicBlock *>(condBBs.pop().u.p);
2084
2085 forkBB->cfg.attach(&elseBB->cfg, Graph::Edge::TREE);
2086 condBBs.push(bb);
2087
2088 forkBB->getExit()->asFlow()->target.bb = elseBB;
2089 if (!bb->isTerminated())
2090 mkFlow(OP_BRA, NULL, CC_ALWAYS, NULL);
2091
2092 setPosition(elseBB, true);
2093 }
2094 break;
2095 case TGSI_OPCODE_ENDIF:
2096 {
2097 BasicBlock *convBB = new BasicBlock(func);
2098 BasicBlock *prevBB = reinterpret_cast<BasicBlock *>(condBBs.pop().u.p);
2099 BasicBlock *forkBB = reinterpret_cast<BasicBlock *>(joinBBs.pop().u.p);
2100
2101 if (!bb->isTerminated()) {
2102 // we only want join if none of the clauses ended with CONT/BREAK/RET
2103 if (prevBB->getExit()->op == OP_BRA && joinBBs.getSize() < 6)
2104 insertConvergenceOps(convBB, forkBB);
2105 mkFlow(OP_BRA, convBB, CC_ALWAYS, NULL);
2106 bb->cfg.attach(&convBB->cfg, Graph::Edge::FORWARD);
2107 }
2108
2109 if (prevBB->getExit()->op == OP_BRA) {
2110 prevBB->cfg.attach(&convBB->cfg, Graph::Edge::FORWARD);
2111 prevBB->getExit()->asFlow()->target.bb = convBB;
2112 }
2113 setPosition(convBB, true);
2114 }
2115 break;
2116 case TGSI_OPCODE_BGNLOOP:
2117 {
2118 BasicBlock *lbgnBB = new BasicBlock(func);
2119 BasicBlock *lbrkBB = new BasicBlock(func);
2120
2121 loopBBs.push(lbgnBB);
2122 breakBBs.push(lbrkBB);
2123 if (loopBBs.getSize() > func->loopNestingBound)
2124 func->loopNestingBound++;
2125
2126 mkFlow(OP_PREBREAK, lbrkBB, CC_ALWAYS, NULL);
2127
2128 bb->cfg.attach(&lbgnBB->cfg, Graph::Edge::TREE);
2129 setPosition(lbgnBB, true);
2130 mkFlow(OP_PRECONT, lbgnBB, CC_ALWAYS, NULL);
2131 }
2132 break;
2133 case TGSI_OPCODE_ENDLOOP:
2134 {
2135 BasicBlock *loopBB = reinterpret_cast<BasicBlock *>(loopBBs.pop().u.p);
2136
2137 if (!bb->isTerminated()) {
2138 mkFlow(OP_CONT, loopBB, CC_ALWAYS, NULL);
2139 bb->cfg.attach(&loopBB->cfg, Graph::Edge::BACK);
2140 }
2141 setPosition(reinterpret_cast<BasicBlock *>(breakBBs.pop().u.p), true);
2142 }
2143 break;
2144 case TGSI_OPCODE_BRK:
2145 {
2146 if (bb->isTerminated())
2147 break;
2148 BasicBlock *brkBB = reinterpret_cast<BasicBlock *>(breakBBs.peek().u.p);
2149 mkFlow(OP_BREAK, brkBB, CC_ALWAYS, NULL);
2150 bb->cfg.attach(&brkBB->cfg, Graph::Edge::CROSS);
2151 }
2152 break;
2153 case TGSI_OPCODE_CONT:
2154 {
2155 if (bb->isTerminated())
2156 break;
2157 BasicBlock *contBB = reinterpret_cast<BasicBlock *>(loopBBs.peek().u.p);
2158 mkFlow(OP_CONT, contBB, CC_ALWAYS, NULL);
2159 contBB->explicitCont = true;
2160 bb->cfg.attach(&contBB->cfg, Graph::Edge::BACK);
2161 }
2162 break;
2163 case TGSI_OPCODE_BGNSUB:
2164 {
2165 Subroutine *s = getSubroutine(ip);
2166 BasicBlock *entry = new BasicBlock(s->f);
2167 BasicBlock *leave = new BasicBlock(s->f);
2168
2169 // multiple entrypoints possible, keep the graph connected
2170 if (prog->getType() == Program::TYPE_COMPUTE)
2171 prog->main->call.attach(&s->f->call, Graph::Edge::TREE);
2172
2173 sub.cur = s;
2174 s->f->setEntry(entry);
2175 s->f->setExit(leave);
2176 setPosition(entry, true);
2177 return true;
2178 }
2179 case TGSI_OPCODE_ENDSUB:
2180 {
2181 sub.cur = getSubroutine(prog->main);
2182 setPosition(BasicBlock::get(sub.cur->f->cfg.getRoot()), true);
2183 return true;
2184 }
2185 case TGSI_OPCODE_CAL:
2186 {
2187 Subroutine *s = getSubroutine(tgsi.getLabel());
2188 mkFlow(OP_CALL, s->f, CC_ALWAYS, NULL);
2189 func->call.attach(&s->f->call, Graph::Edge::TREE);
2190 return true;
2191 }
2192 case TGSI_OPCODE_RET:
2193 {
2194 if (bb->isTerminated())
2195 return true;
2196 BasicBlock *leave = BasicBlock::get(func->cfgExit);
2197
2198 if (!isEndOfSubroutine(ip + 1)) {
2199 // insert a PRERET at the entry if this is an early return
2200 // (only needed for sharing code in the epilogue)
2201 BasicBlock *pos = getBB();
2202 setPosition(BasicBlock::get(func->cfg.getRoot()), false);
2203 mkFlow(OP_PRERET, leave, CC_ALWAYS, NULL)->fixed = 1;
2204 setPosition(pos, true);
2205 }
2206 mkFlow(OP_RET, NULL, CC_ALWAYS, NULL)->fixed = 1;
2207 bb->cfg.attach(&leave->cfg, Graph::Edge::CROSS);
2208 }
2209 break;
2210 case TGSI_OPCODE_END:
2211 {
2212 // attach and generate epilogue code
2213 BasicBlock *epilogue = BasicBlock::get(func->cfgExit);
2214 bb->cfg.attach(&epilogue->cfg, Graph::Edge::TREE);
2215 setPosition(epilogue, true);
2216 if (prog->getType() == Program::TYPE_FRAGMENT)
2217 exportOutputs();
2218 if (info->io.genUserClip > 0)
2219 handleUserClipPlanes();
2220 mkOp(OP_EXIT, TYPE_NONE, NULL)->terminator = 1;
2221 }
2222 break;
2223 case TGSI_OPCODE_SWITCH:
2224 case TGSI_OPCODE_CASE:
2225 ERROR("switch/case opcode encountered, should have been lowered\n");
2226 abort();
2227 break;
2228 default:
2229 ERROR("unhandled TGSI opcode: %u\n", tgsi.getOpcode());
2230 assert(0);
2231 break;
2232 }
2233
2234 if (tgsi.dstCount()) {
2235 for (c = 0; c < 4; ++c) {
2236 if (!dst0[c])
2237 continue;
2238 if (dst0[c] != rDst0[c])
2239 mkMov(rDst0[c], dst0[c]);
2240 storeDst(0, c, rDst0[c]);
2241 }
2242 }
2243 vtxBaseValid = 0;
2244
2245 return true;
2246 }
2247
2248 void
2249 Converter::handleUserClipPlanes()
2250 {
2251 Value *res[8];
2252 int n, i, c;
2253
2254 for (c = 0; c < 4; ++c) {
2255 for (i = 0; i < info->io.genUserClip; ++i) {
2256 Symbol *sym = mkSymbol(FILE_MEMORY_CONST, info->io.ucpBinding,
2257 TYPE_F32, info->io.ucpBase + i * 16 + c * 4);
2258 Value *ucp = mkLoad(TYPE_F32, sym, NULL);
2259 if (c == 0)
2260 res[i] = mkOp2v(OP_MUL, TYPE_F32, getScratch(), clipVtx[c], ucp);
2261 else
2262 mkOp3(OP_MAD, TYPE_F32, res[i], clipVtx[c], ucp, res[i]);
2263 }
2264 }
2265
2266 const int first = info->numOutputs - (info->io.genUserClip + 3) / 4;
2267
2268 for (i = 0; i < info->io.genUserClip; ++i) {
2269 n = i / 4 + first;
2270 c = i % 4;
2271 Symbol *sym =
2272 mkSymbol(FILE_SHADER_OUTPUT, 0, TYPE_F32, info->out[n].slot[c] * 4);
2273 mkStore(OP_EXPORT, TYPE_F32, sym, NULL, res[i]);
2274 }
2275 }
2276
2277 void
2278 Converter::exportOutputs()
2279 {
2280 for (unsigned int i = 0; i < info->numOutputs; ++i) {
2281 for (unsigned int c = 0; c < 4; ++c) {
2282 if (!oData.exists(sub.cur->values, i, c))
2283 continue;
2284 Symbol *sym = mkSymbol(FILE_SHADER_OUTPUT, 0, TYPE_F32,
2285 info->out[i].slot[c] * 4);
2286 Value *val = oData.load(sub.cur->values, i, c, NULL);
2287 if (val)
2288 mkStore(OP_EXPORT, TYPE_F32, sym, NULL, val);
2289 }
2290 }
2291 }
2292
2293 Converter::Converter(Program *ir, const tgsi::Source *code) : BuildUtil(ir),
2294 code(code),
2295 tgsi(NULL),
2296 tData(this), aData(this), pData(this), oData(this)
2297 {
2298 info = code->info;
2299
2300 const DataFile tFile = code->mainTempsInLMem ? FILE_MEMORY_LOCAL : FILE_GPR;
2301
2302 const unsigned tSize = code->fileSize(TGSI_FILE_TEMPORARY);
2303 const unsigned pSize = code->fileSize(TGSI_FILE_PREDICATE);
2304 const unsigned aSize = code->fileSize(TGSI_FILE_ADDRESS);
2305 const unsigned oSize = code->fileSize(TGSI_FILE_OUTPUT);
2306
2307 tData.setup(TGSI_FILE_TEMPORARY, 0, 0, tSize, 4, 4, tFile, 0);
2308 pData.setup(TGSI_FILE_PREDICATE, 0, 0, pSize, 4, 4, FILE_PREDICATE, 0);
2309 aData.setup(TGSI_FILE_ADDRESS, 0, 0, aSize, 4, 4, FILE_ADDRESS, 0);
2310 oData.setup(TGSI_FILE_OUTPUT, 0, 0, oSize, 4, 4, FILE_GPR, 0);
2311
2312 for (int vol = 0, i = 0; i < code->tempArrayCount; ++i) {
2313 int len = code->tempArrays[i].u32 >> 2;
2314 int dim = code->tempArrays[i].u32 & 3;
2315
2316 lData.push_back(DataArray(this));
2317 lData.back().setup(TGSI_FILE_TEMPORARY_ARRAY, i, vol, len, dim, 4,
2318 FILE_MEMORY_LOCAL, 0);
2319
2320 vol += (len * dim * 4 + 0xf) & ~0xf;
2321 }
2322
2323 for (int vol = 0, i = 0; i < code->immdArrayCount; ++i) {
2324 int len = code->immdArrays[i].u32 >> 2;
2325 int dim = code->immdArrays[i].u32 & 3;
2326
2327 lData.push_back(DataArray(this));
2328 lData.back().setup(TGSI_FILE_IMMEDIATE_ARRAY, i, vol, len, dim, 4,
2329 FILE_MEMORY_CONST, 14);
2330
2331 vol += (len * dim * 4 + 0xf) & ~0xf;
2332 }
2333
2334 zero = mkImm((uint32_t)0);
2335
2336 vtxBaseValid = 0;
2337 }
2338
2339 Converter::~Converter()
2340 {
2341 }
2342
2343 template<typename T> inline void
2344 Converter::BindArgumentsPass::updateCallArgs(
2345 Instruction *i, void (Instruction::*setArg)(int, Value *),
2346 T (Function::*proto))
2347 {
2348 Function *g = i->asFlow()->target.fn;
2349 Subroutine *subg = conv.getSubroutine(g);
2350
2351 for (unsigned a = 0; a < (g->*proto).size(); ++a) {
2352 Value *v = (g->*proto)[a].get();
2353 const Converter::Location &l = subg->values.l.find(v)->second;
2354 Converter::DataArray *array = conv.getArrayForFile(l.array, l.arrayIdx);
2355
2356 (i->*setArg)(a, array->acquire(sub->values, l.i, l.c));
2357 }
2358 }
2359
2360 template<typename T> inline void
2361 Converter::BindArgumentsPass::updatePrototype(
2362 BitSet *set, void (Function::*updateSet)(), T (Function::*proto))
2363 {
2364 (func->*updateSet)();
2365
2366 for (unsigned i = 0; i < set->getSize(); ++i) {
2367 Value *v = func->getLValue(i);
2368
2369 // only include values with a matching TGSI register
2370 if (set->test(i) && sub->values.l.find(v) != sub->values.l.end())
2371 (func->*proto).push_back(v);
2372 }
2373 }
2374
2375 bool
2376 Converter::BindArgumentsPass::visit(Function *f)
2377 {
2378 sub = conv.getSubroutine(f);
2379
2380 for (ArrayList::Iterator bi = f->allBBlocks.iterator();
2381 !bi.end(); bi.next()) {
2382 for (Instruction *i = BasicBlock::get(bi)->getFirst();
2383 i; i = i->next) {
2384 if (i->op == OP_CALL && !i->asFlow()->builtin) {
2385 updateCallArgs(i, &Instruction::setSrc, &Function::ins);
2386 updateCallArgs(i, &Instruction::setDef, &Function::outs);
2387 }
2388 }
2389 }
2390
2391 if (func == prog->main && prog->getType() != Program::TYPE_COMPUTE)
2392 return true;
2393 updatePrototype(&BasicBlock::get(f->cfg.getRoot())->liveSet,
2394 &Function::buildLiveSets, &Function::ins);
2395 updatePrototype(&BasicBlock::get(f->cfgExit)->defSet,
2396 &Function::buildDefSets, &Function::outs);
2397
2398 return true;
2399 }
2400
2401 bool
2402 Converter::run()
2403 {
2404 BasicBlock *entry = new BasicBlock(prog->main);
2405 BasicBlock *leave = new BasicBlock(prog->main);
2406
2407 prog->main->setEntry(entry);
2408 prog->main->setExit(leave);
2409
2410 setPosition(entry, true);
2411 sub.cur = getSubroutine(prog->main);
2412
2413 if (info->io.genUserClip > 0) {
2414 for (int c = 0; c < 4; ++c)
2415 clipVtx[c] = getScratch();
2416 }
2417
2418 if (prog->getType() == Program::TYPE_FRAGMENT) {
2419 Symbol *sv = mkSysVal(SV_POSITION, 3);
2420 fragCoord[3] = mkOp1v(OP_RDSV, TYPE_F32, getSSA(), sv);
2421 mkOp1(OP_RCP, TYPE_F32, fragCoord[3], fragCoord[3]);
2422 }
2423
2424 for (ip = 0; ip < code->scan.num_instructions; ++ip) {
2425 if (!handleInstruction(&code->insns[ip]))
2426 return false;
2427 }
2428
2429 if (!BindArgumentsPass(*this).run(prog))
2430 return false;
2431
2432 return true;
2433 }
2434
2435 } // unnamed namespace
2436
2437 namespace nv50_ir {
2438
2439 bool
2440 Program::makeFromTGSI(struct nv50_ir_prog_info *info)
2441 {
2442 tgsi::Source src(info);
2443 if (!src.scanSource())
2444 return false;
2445 tlsSize = info->bin.tlsSpace;
2446
2447 Converter builder(this, &src);
2448 return builder.run();
2449 }
2450
2451 } // namespace nv50_ir