0811420e4258f11ef6c3c24b1e15fc872e619365
4 #define DESCEND_ARBITRARY(j, f) \
6 b->pass_seq = ctx->pc->pass_seq; \
8 for (j = 0; j < 2; ++j) \
9 if (b->out[j] && b->out[j]->pass_seq < ctx->pc->pass_seq) \
13 extern unsigned nv50_inst_min_size(struct nv_instruction
*);
20 values_equal(struct nv_value
*a
, struct nv_value
*b
)
23 return (a
->reg
.file
== b
->reg
.file
&& a
->join
->reg
.id
== b
->join
->reg
.id
);
27 inst_commutation_check(struct nv_instruction
*a
,
28 struct nv_instruction
*b
)
32 for (di
= 0; di
< 4; ++di
) {
35 for (si
= 0; si
< 5; ++si
) {
38 if (values_equal(a
->def
[di
], b
->src
[si
]->value
))
43 if (b
->flags_src
&& b
->flags_src
->value
== a
->flags_def
)
49 /* Check whether we can swap the order of the instructions,
50 * where a & b may be either the earlier or the later one.
53 inst_commutation_legal(struct nv_instruction
*a
,
54 struct nv_instruction
*b
)
56 return inst_commutation_check(a
, b
) && inst_commutation_check(b
, a
);
60 inst_cullable(struct nv_instruction
*nvi
)
62 return (!(nvi
->is_terminator
||
65 nv_nvi_refcount(nvi
)));
69 nvi_isnop(struct nv_instruction
*nvi
)
71 if (nvi
->opcode
== NV_OP_EXPORT
)
80 if (nvi
->def
[0]->join
->reg
.id
< 0)
83 if (nvi
->opcode
!= NV_OP_MOV
&& nvi
->opcode
!= NV_OP_SELECT
)
86 if (nvi
->def
[0]->reg
.file
!= nvi
->src
[0]->value
->reg
.file
)
89 if (nvi
->src
[0]->value
->join
->reg
.id
< 0) {
90 debug_printf("nvi_isnop: orphaned value detected\n");
94 if (nvi
->opcode
== NV_OP_SELECT
)
95 if (!values_equal(nvi
->def
[0], nvi
->src
[1]->value
))
98 return values_equal(nvi
->def
[0], nvi
->src
[0]->value
);
102 nv_pc_pass_pre_emission(struct nv_pc
*pc
, struct nv_basic_block
*b
)
104 struct nv_instruction
*nvi
, *next
;
111 b
->bin_pos
= pc
->bb_list
[pc
->num_blocks
- 1]->bin_pos
+
112 pc
->bb_list
[pc
->num_blocks
- 1]->bin_size
;
114 pc
->bb_list
[pc
->num_blocks
++] = b
;
118 for (nvi
= b
->entry
; nvi
; nvi
= next
) {
124 for (nvi
= b
->entry
; nvi
; nvi
= next
) {
127 size
= nv50_inst_min_size(nvi
);
128 if (nvi
->next
&& size
< 8)
131 if ((n32
& 1) && nvi
->next
&&
132 nv50_inst_min_size(nvi
->next
) == 4 &&
133 inst_commutation_legal(nvi
, nvi
->next
)) {
135 debug_printf("permuting: ");
136 nv_print_instruction(nvi
);
137 nv_print_instruction(nvi
->next
);
138 nv_nvi_permute(nvi
, nvi
->next
);
143 b
->bin_size
+= n32
& 1;
145 nvi
->prev
->is_long
= 1;
148 b
->bin_size
+= 1 + nvi
->is_long
;
152 debug_printf("block %p is now empty\n", b
);
154 if (!b
->exit
->is_long
) {
156 b
->exit
->is_long
= 1;
159 /* might have del'd a hole tail of instructions */
160 if (!b
->exit
->prev
->is_long
&& !(n32
& 1)) {
162 b
->exit
->prev
->is_long
= 1;
165 assert(!b
->exit
|| b
->exit
->is_long
);
167 pc
->bin_size
+= b
->bin_size
*= 4;
173 if (!b
->out
[1] && ++(b
->out
[0]->priv
) != b
->out
[0]->num_in
)
177 /* delete ELSE branch */
179 b
->entry
->opcode
== NV_OP_BRA
&& b
->entry
->target
== b
->out
[0]) {
180 nv_nvi_delete(b
->entry
);
185 for (j
= 0; j
< 2; ++j
)
186 if (b
->out
[j
] && b
->out
[j
] != b
)
187 nv_pc_pass_pre_emission(pc
, b
->out
[j
]);
191 nv_pc_exec_pass2(struct nv_pc
*pc
)
193 debug_printf("preparing %u blocks for emission\n", pc
->num_blocks
);
195 pc
->bb_list
= CALLOC(pc
->num_blocks
, sizeof(struct nv_basic_block
*));
198 nv_pc_pass_pre_emission(pc
, pc
->root
);
203 static INLINE boolean
204 is_cmem_load(struct nv_instruction
*nvi
)
206 return (nvi
->opcode
== NV_OP_LDA
&&
207 nvi
->src
[0]->value
->reg
.file
>= NV_FILE_MEM_C(0) &&
208 nvi
->src
[0]->value
->reg
.file
<= NV_FILE_MEM_C(15));
211 static INLINE boolean
212 is_smem_load(struct nv_instruction
*nvi
)
214 return (nvi
->opcode
== NV_OP_LDA
&&
215 (nvi
->src
[0]->value
->reg
.file
== NV_FILE_MEM_S
||
216 nvi
->src
[0]->value
->reg
.file
<= NV_FILE_MEM_P
));
219 static INLINE boolean
220 is_immd_move(struct nv_instruction
*nvi
)
222 return (nvi
->opcode
== NV_OP_MOV
&&
223 nvi
->src
[0]->value
->reg
.file
== NV_FILE_IMM
);
227 check_swap_src_0_1(struct nv_instruction
*nvi
)
229 static const ubyte cc_swapped
[8] = { 0, 4, 2, 6, 1, 5, 3, 7 };
231 struct nv_ref
*src0
= nvi
->src
[0], *src1
= nvi
->src
[1];
233 if (!nv_op_commutative(nvi
->opcode
))
235 assert(src0
&& src1
);
237 if (is_cmem_load(src0
->value
->insn
)) {
238 if (!is_cmem_load(src1
->value
->insn
)) {
241 /* debug_printf("swapping cmem load to 1\n"); */
244 if (is_smem_load(src1
->value
->insn
)) {
245 if (!is_smem_load(src0
->value
->insn
)) {
248 /* debug_printf("swapping smem load to 0\n"); */
252 if (nvi
->opcode
== NV_OP_SET
&& nvi
->src
[0] != src0
)
253 nvi
->set_cond
= cc_swapped
[nvi
->set_cond
];
263 nv_pass_fold_stores(struct nv_pass
*ctx
, struct nv_basic_block
*b
)
265 struct nv_instruction
*nvi
, *sti
;
268 for (sti
= b
->entry
; sti
; sti
= sti
->next
) {
272 if (sti
->def
[0]->reg
.file
!= NV_FILE_OUT
)
274 if (sti
->opcode
!= NV_OP_MOV
&& sti
->opcode
!= NV_OP_STA
)
277 nvi
= sti
->src
[0]->value
->insn
;
278 if (!nvi
|| nvi
->opcode
== NV_OP_PHI
)
280 assert(nvi
->def
[0] == sti
->src
[0]->value
);
282 if (nvi
->def
[0]->refc
> 1)
285 nvi
->def
[0] = sti
->def
[0];
289 DESCEND_ARBITRARY(j
, nv_pass_fold_stores
);
295 nv_pass_fold_loads(struct nv_pass
*ctx
, struct nv_basic_block
*b
)
297 struct nv_instruction
*nvi
, *ld
;
300 for (nvi
= b
->entry
; nvi
; nvi
= nvi
->next
) {
301 check_swap_src_0_1(nvi
);
303 for (j
= 0; j
< 3; ++j
) {
306 ld
= nvi
->src
[j
]->value
->insn
;
310 if (is_immd_move(ld
) && nv50_nvi_can_use_imm(nvi
, j
)) {
311 nv_reference(ctx
->pc
, &nvi
->src
[j
], ld
->src
[0]->value
);
312 debug_printf("folded immediate %i\n", ld
->def
[0]->n
);
316 if (ld
->opcode
!= NV_OP_LDA
)
318 if (!nv50_nvi_can_load(nvi
, j
, ld
->src
[0]->value
))
321 if (j
== 0 && ld
->src
[4]) /* can't load shared mem */
324 /* fold it ! */ /* XXX: ref->insn */
325 nv_reference(ctx
->pc
, &nvi
->src
[j
], ld
->src
[0]->value
);
327 nv_reference(ctx
->pc
, &nvi
->src
[4], ld
->src
[4]->value
);
330 DESCEND_ARBITRARY(j
, nv_pass_fold_loads
);
336 nv_pass_lower_mods(struct nv_pass
*ctx
, struct nv_basic_block
*b
)
339 struct nv_instruction
*nvi
, *mi
, *next
;
342 for (nvi
= b
->entry
; nvi
; nvi
= next
) {
344 if (nvi
->opcode
== NV_OP_SUB
) {
345 nvi
->opcode
= NV_OP_ADD
;
346 nvi
->src
[1]->mod
^= NV_MOD_NEG
;
349 /* should not put any modifiers on NEG and ABS */
350 assert(nvi
->opcode
!= NV_MOD_NEG
|| !nvi
->src
[0]->mod
);
351 assert(nvi
->opcode
!= NV_MOD_ABS
|| !nvi
->src
[0]->mod
);
353 for (j
= 0; j
< 4; ++j
) {
357 mi
= nvi
->src
[j
]->value
->insn
;
360 if (mi
->def
[0]->refc
> 1)
363 if (mi
->opcode
== NV_OP_NEG
) mod
= NV_MOD_NEG
;
365 if (mi
->opcode
== NV_OP_ABS
) mod
= NV_MOD_ABS
;
369 if (nvi
->opcode
== NV_OP_ABS
)
370 mod
&= ~(NV_MOD_NEG
| NV_MOD_ABS
);
372 if (nvi
->opcode
== NV_OP_NEG
&& mod
== NV_MOD_NEG
) {
373 nvi
->opcode
= NV_OP_MOV
;
377 if (!(nv50_supported_src_mods(nvi
->opcode
, j
) & mod
))
380 nv_reference(ctx
->pc
, &nvi
->src
[j
], mi
->src
[0]->value
);
382 nvi
->src
[j
]->mod
^= mod
;
385 if (nvi
->opcode
== NV_OP_SAT
) {
386 mi
= nvi
->src
[0]->value
->insn
;
388 if ((mi
->opcode
== NV_OP_MAD
) && !mi
->flags_def
) {
390 mi
->def
[0] = nvi
->def
[0];
395 DESCEND_ARBITRARY(j
, nv_pass_lower_mods
);
400 #define SRC_IS_MUL(s) ((s)->insn && (s)->insn->opcode == NV_OP_MUL)
402 static struct nv_value
*
403 find_immediate(struct nv_ref
*ref
)
405 struct nv_value
*src
;
411 while (src
->insn
&& src
->insn
->opcode
== NV_OP_MOV
) {
412 assert(!src
->insn
->src
[0]->mod
);
413 src
= src
->insn
->src
[0]->value
;
415 return (src
->reg
.file
== NV_FILE_IMM
) ? src
: NULL
;
419 constant_operand(struct nv_pc
*pc
,
420 struct nv_instruction
*nvi
, struct nv_value
*val
, int s
)
427 type
= nvi
->def
[0]->reg
.type
;
429 switch (nvi
->opcode
) {
431 if ((type
== NV_TYPE_F32
&& val
->reg
.imm
.f32
== 1.0f
) ||
432 (NV_TYPE_ISINT(type
) && val
->reg
.imm
.u32
== 1)) {
433 nvi
->opcode
= NV_OP_MOV
;
434 nv_reference(pc
, &nvi
->src
[s
], NULL
);
436 nvi
->src
[0] = nvi
->src
[1];
440 if ((type
== NV_TYPE_F32
&& val
->reg
.imm
.f32
== 2.0f
) ||
441 (NV_TYPE_ISINT(type
) && val
->reg
.imm
.u32
== 2)) {
442 nvi
->opcode
= NV_OP_ADD
;
443 nv_reference(pc
, &nvi
->src
[s
], NULL
);
445 nvi
->src
[0] = nvi
->src
[1];
449 if (type
== NV_TYPE_F32
&& val
->reg
.imm
.f32
== -1.0f
) {
450 nvi
->opcode
= NV_OP_NEG
;
451 nv_reference(pc
, &nvi
->src
[s
], NULL
);
452 nvi
->src
[0] = nvi
->src
[t
];
455 if (type
== NV_TYPE_F32
&& val
->reg
.imm
.f32
== -2.0f
) {
456 nvi
->opcode
= NV_OP_ADD
;
457 assert(!nvi
->src
[s
]->mod
);
458 nv_reference(pc
, &nvi
->src
[s
], nvi
->src
[t
]->value
);
459 nvi
->src
[t
]->mod
^= NV_MOD_NEG
;
460 nvi
->src
[s
]->mod
|= NV_MOD_NEG
;
462 if (val
->reg
.imm
.u32
== 0) {
463 nvi
->opcode
= NV_OP_MOV
;
464 nv_reference(pc
, &nvi
->src
[t
], NULL
);
466 nvi
->src
[0] = nvi
->src
[1];
472 if (val
->reg
.imm
.u32
== 0) {
473 nvi
->opcode
= NV_OP_MOV
;
474 nv_reference(pc
, &nvi
->src
[s
], NULL
);
475 nvi
->src
[0] = nvi
->src
[t
];
485 nv_pass_lower_arith(struct nv_pass
*ctx
, struct nv_basic_block
*b
)
487 struct nv_instruction
*nvi
, *next
;
490 for (nvi
= b
->entry
; nvi
; nvi
= next
) {
491 struct nv_value
*src0
, *src1
, *src
;
496 if ((src
= find_immediate(nvi
->src
[0])) != NULL
)
497 constant_operand(ctx
->pc
, nvi
, src
, 0);
499 if ((src
= find_immediate(nvi
->src
[1])) != NULL
)
500 constant_operand(ctx
->pc
, nvi
, src
, 1);
502 /* try to combine MUL, ADD into MAD */
503 if (nvi
->opcode
!= NV_OP_ADD
)
506 src0
= nvi
->src
[0]->value
;
507 src1
= nvi
->src
[1]->value
;
509 if (SRC_IS_MUL(src0
) && src0
->refc
== 1)
512 if (SRC_IS_MUL(src1
) && src1
->refc
== 1)
517 nvi
->opcode
= NV_OP_MAD
;
518 mod
= nvi
->src
[(src
== src0
) ? 0 : 1]->mod
;
519 nv_reference(ctx
->pc
, &nvi
->src
[(src
== src0
) ? 0 : 1], NULL
);
520 nvi
->src
[2] = nvi
->src
[(src
== src0
) ? 1 : 0];
522 assert(!(mod
& ~NV_MOD_NEG
));
523 nvi
->src
[0] = new_ref(ctx
->pc
, src
->insn
->src
[0]->value
);
524 nvi
->src
[1] = new_ref(ctx
->pc
, src
->insn
->src
[1]->value
);
525 nvi
->src
[0]->mod
= src
->insn
->src
[0]->mod
^ mod
;
526 nvi
->src
[1]->mod
= src
->insn
->src
[1]->mod
;
528 DESCEND_ARBITRARY(j
, nv_pass_lower_arith
);
534 set $r2 g f32 $r2 $r3
535 cvt abs rn f32 $r2 s32 $r2
536 cvt f32 $c0 # f32 $r2
541 nv_pass_lower_cond(struct nv_pass
*ctx
, struct nv_basic_block
*b
)
543 /* XXX: easier in IR builder for now */
548 /* TODO: reload elimination, redundant store elimination */
550 struct nv_pass_reldelim
{
555 nv_pass_reload_elim(struct nv_pass_reldelim
*ctx
, struct nv_basic_block
*b
)
558 struct nv_instruction
*ld
, *next
;
560 for (ld
= b
->entry
; ld
; ld
= next
) {
563 if (ld
->opcode
== NV_OP_LINTERP
|| ld
->opcode
== NV_OP_PINTERP
) {
566 if (ld
->opcode
== NV_OP_LDA
) {
569 if (ld
->opcode
== NV_OP_MOV
) {
573 DESCEND_ARBITRARY(j
, nv_pass_reload_elim
);
579 nv_pass_tex_mask(struct nv_pass
*ctx
, struct nv_basic_block
*b
)
583 for (i
= 0; i
< ctx
->pc
->num_instructions
; ++i
) {
584 struct nv_instruction
*nvi
= &ctx
->pc
->instructions
[i
];
585 struct nv_value
*def
[4];
587 if (!nv_is_vector_op(nvi
->opcode
))
591 for (c
= 0; c
< 4; ++c
) {
592 if (nvi
->def
[c
]->refc
)
593 nvi
->tex_mask
|= 1 << c
;
594 def
[c
] = nvi
->def
[c
];
598 for (c
= 0; c
< 4; ++c
)
599 if (nvi
->tex_mask
& (1 << c
))
600 nvi
->def
[j
++] = def
[c
];
601 for (c
= 0; c
< 4; ++c
)
602 if (!(nvi
->tex_mask
& (1 << c
)))
603 nvi
->def
[j
++] = def
[c
];
615 nv_pass_dce(struct nv_pass_dce
*ctx
, struct nv_basic_block
*b
)
618 struct nv_instruction
*nvi
, *next
;
620 for (nvi
= b
->entry
; nvi
; nvi
= next
) {
623 if (inst_cullable(nvi
)) {
629 DESCEND_ARBITRARY(j
, nv_pass_dce
);
634 static INLINE boolean
635 bb_simple_if_endif(struct nv_basic_block
*bb
)
637 return (bb
->out
[0] && bb
->out
[1] &&
638 bb
->out
[0]->out
[0] == bb
->out
[1] &&
639 !bb
->out
[0]->out
[1]);
643 nv_pass_flatten(struct nv_pass
*ctx
, struct nv_basic_block
*b
)
647 if (bb_simple_if_endif(b
)) {
649 debug_printf("nv_pass_flatten: total IF/ENDIF constructs: %i\n", ctx
->n
);
651 DESCEND_ARBITRARY(j
, nv_pass_flatten
);
657 nv_pc_exec_pass0(struct nv_pc
*pc
)
659 struct nv_pass_reldelim
*reldelim
;
661 struct nv_pass_dce dce
;
664 reldelim
= CALLOC_STRUCT(nv_pass_reldelim
);
667 ret
= nv_pass_reload_elim(reldelim
, pc
->root
);
676 ret
= nv_pass_flatten(&pass
, pc
->root
);
680 /* Do this first, so we don't have to pay attention
681 * to whether sources are supported memory loads.
684 ret
= nv_pass_lower_arith(&pass
, pc
->root
);
689 ret
= nv_pass_fold_loads(&pass
, pc
->root
);
694 ret
= nv_pass_fold_stores(&pass
, pc
->root
);
699 ret
= nv_pass_lower_mods(&pass
, pc
->root
);
707 ret
= nv_pass_dce(&dce
, pc
->root
);
710 } while (dce
.removed
);
712 ret
= nv_pass_tex_mask(&pass
, pc
->root
);