2 * Copyright 2008 Ben Skeggs
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 #include "pipe/p_screen.h"
25 #include "nv50_context.h"
26 #include "nv50_screen.h"
28 #include "nouveau/nouveau_stateobj.h"
31 nv50_screen_is_format_supported(struct pipe_screen
*pscreen
,
32 enum pipe_format format
,
33 enum pipe_texture_target target
,
34 unsigned tex_usage
, unsigned geom_flags
)
36 if (tex_usage
& PIPE_TEXTURE_USAGE_RENDER_TARGET
) {
38 case PIPE_FORMAT_A8R8G8B8_UNORM
:
39 case PIPE_FORMAT_R5G6B5_UNORM
:
40 case PIPE_FORMAT_Z24S8_UNORM
:
41 case PIPE_FORMAT_Z16_UNORM
:
48 case PIPE_FORMAT_A8R8G8B8_UNORM
:
49 case PIPE_FORMAT_A1R5G5B5_UNORM
:
50 case PIPE_FORMAT_A4R4G4B4_UNORM
:
51 case PIPE_FORMAT_R5G6B5_UNORM
:
52 case PIPE_FORMAT_L8_UNORM
:
53 case PIPE_FORMAT_A8_UNORM
:
54 case PIPE_FORMAT_I8_UNORM
:
55 case PIPE_FORMAT_A8L8_UNORM
:
56 case PIPE_FORMAT_DXT1_RGB
:
57 case PIPE_FORMAT_DXT1_RGBA
:
58 case PIPE_FORMAT_DXT3_RGBA
:
59 case PIPE_FORMAT_DXT5_RGBA
:
70 nv50_screen_get_param(struct pipe_screen
*pscreen
, int param
)
73 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS
:
75 case PIPE_CAP_NPOT_TEXTURES
:
77 case PIPE_CAP_TWO_SIDED_STENCIL
:
83 case PIPE_CAP_ANISOTROPIC_FILTER
:
85 case PIPE_CAP_POINT_SPRITE
:
87 case PIPE_CAP_MAX_RENDER_TARGETS
:
89 case PIPE_CAP_OCCLUSION_QUERY
:
91 case PIPE_CAP_TEXTURE_SHADOW_MAP
:
93 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS
:
95 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS
:
97 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
:
99 case PIPE_CAP_TEXTURE_MIRROR_CLAMP
:
100 case PIPE_CAP_TEXTURE_MIRROR_REPEAT
:
102 case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS
:
104 case NOUVEAU_CAP_HW_VTXBUF
:
106 case NOUVEAU_CAP_HW_IDXBUF
:
109 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param
);
115 nv50_screen_get_paramf(struct pipe_screen
*pscreen
, int param
)
118 case PIPE_CAP_MAX_LINE_WIDTH
:
119 case PIPE_CAP_MAX_LINE_WIDTH_AA
:
121 case PIPE_CAP_MAX_POINT_WIDTH
:
122 case PIPE_CAP_MAX_POINT_WIDTH_AA
:
124 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY
:
126 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS
:
129 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param
);
135 nv50_screen_destroy(struct pipe_screen
*pscreen
)
137 struct nv50_screen
*screen
= nv50_screen(pscreen
);
139 nouveau_screen_fini(&screen
->base
);
144 nv50_screen_create(struct pipe_winsys
*ws
, struct nouveau_winsys
*nvws
)
146 struct nv50_screen
*screen
= CALLOC_STRUCT(nv50_screen
);
147 struct nouveau_device
*dev
= nvws
->channel
->device
;
148 struct pipe_screen
*pscreen
;
149 struct nouveau_stateobj
*so
;
150 unsigned chipset
= dev
->chipset
;
151 unsigned tesla_class
= 0;
156 pscreen
= &screen
->base
.base
;
158 ret
= nouveau_screen_init(&screen
->base
, nvws
->channel
->device
);
160 nv50_screen_destroy(pscreen
);
167 pscreen
->winsys
= ws
;
168 pscreen
->destroy
= nv50_screen_destroy
;
169 pscreen
->get_param
= nv50_screen_get_param
;
170 pscreen
->get_paramf
= nv50_screen_get_paramf
;
171 pscreen
->is_format_supported
= nv50_screen_is_format_supported
;
173 nv50_screen_init_miptree_functions(pscreen
);
174 nv50_transfer_init_screen_functions(pscreen
);
176 /* DMA engine object */
177 ret
= nvws
->grobj_alloc(nvws
, 0x5039, &screen
->m2mf
);
179 NOUVEAU_ERR("Error creating M2MF object: %d\n", ret
);
180 nv50_screen_destroy(pscreen
);
185 ret
= nvws
->grobj_alloc(nvws
, NV50_2D
, &screen
->eng2d
);
187 NOUVEAU_ERR("Error creating 2D object: %d\n", ret
);
188 nv50_screen_destroy(pscreen
);
193 switch (chipset
& 0xf0) {
195 tesla_class
= 0x5097;
199 tesla_class
= 0x8297;
202 tesla_class
= 0x8397;
205 NOUVEAU_ERR("Not a known NV50 chipset: NV%02x\n", chipset
);
206 nv50_screen_destroy(pscreen
);
210 if (tesla_class
== 0) {
211 NOUVEAU_ERR("Unknown G8x chipset: NV%02x\n", chipset
);
212 nv50_screen_destroy(pscreen
);
216 ret
= nvws
->grobj_alloc(nvws
, tesla_class
, &screen
->tesla
);
218 NOUVEAU_ERR("Error creating 3D object: %d\n", ret
);
219 nv50_screen_destroy(pscreen
);
224 ret
= nvws
->notifier_alloc(nvws
, 1, &screen
->sync
);
226 NOUVEAU_ERR("Error creating notifier object: %d\n", ret
);
227 nv50_screen_destroy(pscreen
);
231 /* Static M2MF init */
233 so_method(so
, screen
->m2mf
, 0x0180, 3);
234 so_data (so
, screen
->sync
->handle
);
235 so_data (so
, screen
->nvws
->channel
->vram
->handle
);
236 so_data (so
, screen
->nvws
->channel
->vram
->handle
);
242 so_method(so
, screen
->eng2d
, NV50_2D_DMA_NOTIFY
, 4);
243 so_data (so
, screen
->sync
->handle
);
244 so_data (so
, screen
->nvws
->channel
->vram
->handle
);
245 so_data (so
, screen
->nvws
->channel
->vram
->handle
);
246 so_data (so
, screen
->nvws
->channel
->vram
->handle
);
247 so_method(so
, screen
->eng2d
, NV50_2D_OPERATION
, 1);
248 so_data (so
, NV50_2D_OPERATION_SRCCOPY
);
249 so_method(so
, screen
->eng2d
, 0x0290, 1);
251 so_method(so
, screen
->eng2d
, 0x0888, 1);
256 /* Static tesla init */
257 so
= so_new(256, 20);
259 so_method(so
, screen
->tesla
, 0x1558, 1);
261 so_method(so
, screen
->tesla
, NV50TCL_DMA_NOTIFY
, 1);
262 so_data (so
, screen
->sync
->handle
);
263 so_method(so
, screen
->tesla
, NV50TCL_DMA_UNK0(0),
264 NV50TCL_DMA_UNK0__SIZE
);
265 for (i
= 0; i
< NV50TCL_DMA_UNK0__SIZE
; i
++)
266 so_data(so
, nvws
->channel
->vram
->handle
);
267 so_method(so
, screen
->tesla
, NV50TCL_DMA_UNK1(0),
268 NV50TCL_DMA_UNK1__SIZE
);
269 for (i
= 0; i
< NV50TCL_DMA_UNK1__SIZE
; i
++)
270 so_data(so
, nvws
->channel
->vram
->handle
);
271 so_method(so
, screen
->tesla
, 0x121c, 1);
274 so_method(so
, screen
->tesla
, 0x13bc, 1);
276 so_method(so
, screen
->tesla
, 0x13ac, 1);
278 so_method(so
, screen
->tesla
, 0x16b8, 1);
281 /* constant buffers for immediates and VP/FP parameters */
282 ret
= nouveau_bo_new(dev
, NOUVEAU_BO_VRAM
, 0, 128*4*4,
283 &screen
->constbuf_misc
[0]);
285 nv50_screen_destroy(pscreen
);
289 for (i
= 0; i
< 2; i
++) {
290 ret
= nouveau_bo_new(dev
, NOUVEAU_BO_VRAM
, 0, 128*4*4,
291 &screen
->constbuf_parm
[i
]);
293 nv50_screen_destroy(pscreen
);
298 if (nvws
->res_init(&screen
->immd_heap
[0], 0, 128) ||
299 nvws
->res_init(&screen
->parm_heap
[0], 0, 128) ||
300 nvws
->res_init(&screen
->parm_heap
[1], 0, 128))
302 NOUVEAU_ERR("Error initialising constant buffers.\n");
303 nv50_screen_destroy(pscreen
);
308 // map constant buffers:
309 // B = buffer ID (maybe more than 1 byte)
310 // N = CB index used in shader instruction
311 // P = program type (0 = VP, 2 = GP, 3 = FP)
312 so_method(so, screen->tesla, 0x1694, 1);
313 so_data (so, 0x000BBNP1);
316 so_method(so
, screen
->tesla
, 0x1280, 3);
317 so_reloc (so
, screen
->constbuf_misc
[0], 0, NOUVEAU_BO_VRAM
|
318 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
319 so_reloc (so
, screen
->constbuf_misc
[0], 0, NOUVEAU_BO_VRAM
|
320 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
321 so_data (so
, (NV50_CB_PMISC
<< 16) | 0x00000800);
322 so_method(so
, screen
->tesla
, 0x1694, 1);
323 so_data (so
, 0x00000001 | (NV50_CB_PMISC
<< 12));
324 so_method(so
, screen
->tesla
, 0x1694, 1);
325 so_data (so
, 0x00000031 | (NV50_CB_PMISC
<< 12));
327 so_method(so
, screen
->tesla
, 0x1280, 3);
328 so_reloc (so
, screen
->constbuf_parm
[0], 0, NOUVEAU_BO_VRAM
|
329 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
330 so_reloc (so
, screen
->constbuf_parm
[0], 0, NOUVEAU_BO_VRAM
|
331 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
332 so_data (so
, (NV50_CB_PVP
<< 16) | 0x00000800);
333 so_method(so
, screen
->tesla
, 0x1694, 1);
334 so_data (so
, 0x00000101 | (NV50_CB_PVP
<< 12));
336 so_method(so
, screen
->tesla
, 0x1280, 3);
337 so_reloc (so
, screen
->constbuf_parm
[1], 0, NOUVEAU_BO_VRAM
|
338 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
339 so_reloc (so
, screen
->constbuf_parm
[1], 0, NOUVEAU_BO_VRAM
|
340 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
341 so_data (so
, (NV50_CB_PFP
<< 16) | 0x00000800);
342 so_method(so
, screen
->tesla
, 0x1694, 1);
343 so_data (so
, 0x00000131 | (NV50_CB_PFP
<< 12));
345 /* Texture sampler/image unit setup - we abuse the constant buffer
346 * upload mechanism for the moment to upload data to the tex config
347 * blocks. At some point we *may* want to go the NVIDIA way of doing
350 ret
= nouveau_bo_new(dev
, NOUVEAU_BO_VRAM
, 0, 32*8*4, &screen
->tic
);
352 nv50_screen_destroy(pscreen
);
356 so_method(so
, screen
->tesla
, 0x1280, 3);
357 so_reloc (so
, screen
->tic
, 0, NOUVEAU_BO_VRAM
|
358 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
359 so_reloc (so
, screen
->tic
, 0, NOUVEAU_BO_VRAM
|
360 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
361 so_data (so
, (NV50_CB_TIC
<< 16) | 0x0800);
362 so_method(so
, screen
->tesla
, 0x1574, 3);
363 so_reloc (so
, screen
->tic
, 0, NOUVEAU_BO_VRAM
|
364 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
365 so_reloc (so
, screen
->tic
, 0, NOUVEAU_BO_VRAM
|
366 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
367 so_data (so
, 0x00000800);
369 ret
= nouveau_bo_new(dev
, NOUVEAU_BO_VRAM
, 0, 32*8*4, &screen
->tsc
);
371 nv50_screen_destroy(pscreen
);
375 so_method(so
, screen
->tesla
, 0x1280, 3);
376 so_reloc (so
, screen
->tsc
, 0, NOUVEAU_BO_VRAM
|
377 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
378 so_reloc (so
, screen
->tsc
, 0, NOUVEAU_BO_VRAM
|
379 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
380 so_data (so
, (NV50_CB_TSC
<< 16) | 0x0800);
381 so_method(so
, screen
->tesla
, 0x155c, 3);
382 so_reloc (so
, screen
->tsc
, 0, NOUVEAU_BO_VRAM
|
383 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
384 so_reloc (so
, screen
->tsc
, 0, NOUVEAU_BO_VRAM
|
385 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
386 so_data (so
, 0x00000800);
389 /* Vertex array limits - max them out */
390 for (i
= 0; i
< 16; i
++) {
391 so_method(so
, screen
->tesla
, 0x1080 + (i
* 8), 2);
392 so_data (so
, 0x000000ff);
393 so_data (so
, 0xffffffff);
396 so_method(so
, screen
->tesla
, NV50TCL_DEPTH_RANGE_NEAR
, 2);
397 so_data (so
, fui(0.0));
398 so_data (so
, fui(1.0));
400 so_method(so
, screen
->tesla
, 0x1234, 1);
402 so_method(so
, screen
->tesla
, 0x1458, 1);
406 so_ref (so
, &screen
->static_init
);
408 nouveau_pushbuf_flush(nvws
->channel
, 0);