3b830847ca151ab3af226b77c91c29e4194f60f8
[mesa.git] / src / gallium / drivers / nv50 / nv50_screen.c
1 /*
2 * Copyright 2008 Ben Skeggs
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 * SOFTWARE.
21 */
22
23 #include "pipe/p_screen.h"
24
25 #include "nv50_context.h"
26 #include "nv50_screen.h"
27
28 #include "nouveau/nouveau_stateobj.h"
29
30 static boolean
31 nv50_screen_is_format_supported(struct pipe_screen *pscreen,
32 enum pipe_format format,
33 enum pipe_texture_target target,
34 unsigned tex_usage, unsigned geom_flags)
35 {
36 if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) {
37 switch (format) {
38 case PIPE_FORMAT_A8R8G8B8_UNORM:
39 case PIPE_FORMAT_R5G6B5_UNORM:
40 case PIPE_FORMAT_Z24S8_UNORM:
41 case PIPE_FORMAT_Z16_UNORM:
42 return TRUE;
43 default:
44 break;
45 }
46 } else {
47 switch (format) {
48 case PIPE_FORMAT_A8R8G8B8_UNORM:
49 case PIPE_FORMAT_A1R5G5B5_UNORM:
50 case PIPE_FORMAT_A4R4G4B4_UNORM:
51 case PIPE_FORMAT_R5G6B5_UNORM:
52 case PIPE_FORMAT_L8_UNORM:
53 case PIPE_FORMAT_A8_UNORM:
54 case PIPE_FORMAT_I8_UNORM:
55 case PIPE_FORMAT_A8L8_UNORM:
56 case PIPE_FORMAT_DXT1_RGB:
57 case PIPE_FORMAT_DXT1_RGBA:
58 case PIPE_FORMAT_DXT3_RGBA:
59 case PIPE_FORMAT_DXT5_RGBA:
60 return TRUE;
61 default:
62 break;
63 }
64 }
65
66 return FALSE;
67 }
68
69 static int
70 nv50_screen_get_param(struct pipe_screen *pscreen, int param)
71 {
72 switch (param) {
73 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
74 return 32;
75 case PIPE_CAP_NPOT_TEXTURES:
76 return 1;
77 case PIPE_CAP_TWO_SIDED_STENCIL:
78 return 1;
79 case PIPE_CAP_GLSL:
80 return 0;
81 case PIPE_CAP_S3TC:
82 return 1;
83 case PIPE_CAP_ANISOTROPIC_FILTER:
84 return 1;
85 case PIPE_CAP_POINT_SPRITE:
86 return 0;
87 case PIPE_CAP_MAX_RENDER_TARGETS:
88 return 8;
89 case PIPE_CAP_OCCLUSION_QUERY:
90 return 1;
91 case PIPE_CAP_TEXTURE_SHADOW_MAP:
92 return 1;
93 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
94 return 13;
95 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
96 return 10;
97 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
98 return 13;
99 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
100 case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
101 return 1;
102 case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
103 return 0;
104 case NOUVEAU_CAP_HW_VTXBUF:
105 return 1;
106 case NOUVEAU_CAP_HW_IDXBUF:
107 return 0;
108 default:
109 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
110 return 0;
111 }
112 }
113
114 static float
115 nv50_screen_get_paramf(struct pipe_screen *pscreen, int param)
116 {
117 switch (param) {
118 case PIPE_CAP_MAX_LINE_WIDTH:
119 case PIPE_CAP_MAX_LINE_WIDTH_AA:
120 return 10.0;
121 case PIPE_CAP_MAX_POINT_WIDTH:
122 case PIPE_CAP_MAX_POINT_WIDTH_AA:
123 return 64.0;
124 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
125 return 16.0;
126 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
127 return 4.0;
128 default:
129 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
130 return 0.0;
131 }
132 }
133
134 static void
135 nv50_screen_destroy(struct pipe_screen *pscreen)
136 {
137 struct nv50_screen *screen = nv50_screen(pscreen);
138
139 nouveau_screen_fini(&screen->base);
140 FREE(screen);
141 }
142
143 struct pipe_screen *
144 nv50_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws)
145 {
146 struct nv50_screen *screen = CALLOC_STRUCT(nv50_screen);
147 struct nouveau_device *dev = nvws->channel->device;
148 struct pipe_screen *pscreen;
149 struct nouveau_stateobj *so;
150 unsigned chipset = dev->chipset;
151 unsigned tesla_class = 0;
152 int ret, i;
153
154 if (!screen)
155 return NULL;
156 pscreen = &screen->base.base;
157
158 ret = nouveau_screen_init(&screen->base, nvws->channel->device);
159 if (ret) {
160 nv50_screen_destroy(pscreen);
161 return NULL;
162 }
163
164 /* Setup the pipe */
165 screen->nvws = nvws;
166
167 pscreen->winsys = ws;
168 pscreen->destroy = nv50_screen_destroy;
169 pscreen->get_param = nv50_screen_get_param;
170 pscreen->get_paramf = nv50_screen_get_paramf;
171 pscreen->is_format_supported = nv50_screen_is_format_supported;
172
173 nv50_screen_init_miptree_functions(pscreen);
174 nv50_transfer_init_screen_functions(pscreen);
175
176 /* DMA engine object */
177 ret = nvws->grobj_alloc(nvws, 0x5039, &screen->m2mf);
178 if (ret) {
179 NOUVEAU_ERR("Error creating M2MF object: %d\n", ret);
180 nv50_screen_destroy(pscreen);
181 return NULL;
182 }
183
184 /* 2D object */
185 ret = nvws->grobj_alloc(nvws, NV50_2D, &screen->eng2d);
186 if (ret) {
187 NOUVEAU_ERR("Error creating 2D object: %d\n", ret);
188 nv50_screen_destroy(pscreen);
189 return NULL;
190 }
191
192 /* 3D object */
193 switch (chipset & 0xf0) {
194 case 0x50:
195 tesla_class = 0x5097;
196 break;
197 case 0x80:
198 case 0x90:
199 tesla_class = 0x8297;
200 break;
201 case 0xa0:
202 tesla_class = 0x8397;
203 break;
204 default:
205 NOUVEAU_ERR("Not a known NV50 chipset: NV%02x\n", chipset);
206 nv50_screen_destroy(pscreen);
207 return NULL;
208 }
209
210 if (tesla_class == 0) {
211 NOUVEAU_ERR("Unknown G8x chipset: NV%02x\n", chipset);
212 nv50_screen_destroy(pscreen);
213 return NULL;
214 }
215
216 ret = nvws->grobj_alloc(nvws, tesla_class, &screen->tesla);
217 if (ret) {
218 NOUVEAU_ERR("Error creating 3D object: %d\n", ret);
219 nv50_screen_destroy(pscreen);
220 return NULL;
221 }
222
223 /* Sync notifier */
224 ret = nvws->notifier_alloc(nvws, 1, &screen->sync);
225 if (ret) {
226 NOUVEAU_ERR("Error creating notifier object: %d\n", ret);
227 nv50_screen_destroy(pscreen);
228 return NULL;
229 }
230
231 /* Static M2MF init */
232 so = so_new(32, 0);
233 so_method(so, screen->m2mf, 0x0180, 3);
234 so_data (so, screen->sync->handle);
235 so_data (so, screen->nvws->channel->vram->handle);
236 so_data (so, screen->nvws->channel->vram->handle);
237 so_emit(nvws, so);
238 so_ref (NULL, &so);
239
240 /* Static 2D init */
241 so = so_new(64, 0);
242 so_method(so, screen->eng2d, NV50_2D_DMA_NOTIFY, 4);
243 so_data (so, screen->sync->handle);
244 so_data (so, screen->nvws->channel->vram->handle);
245 so_data (so, screen->nvws->channel->vram->handle);
246 so_data (so, screen->nvws->channel->vram->handle);
247 so_method(so, screen->eng2d, NV50_2D_OPERATION, 1);
248 so_data (so, NV50_2D_OPERATION_SRCCOPY);
249 so_method(so, screen->eng2d, 0x0290, 1);
250 so_data (so, 0);
251 so_method(so, screen->eng2d, 0x0888, 1);
252 so_data (so, 1);
253 so_emit(nvws, so);
254 so_ref(NULL, &so);
255
256 /* Static tesla init */
257 so = so_new(256, 20);
258
259 so_method(so, screen->tesla, 0x1558, 1);
260 so_data (so, 1);
261 so_method(so, screen->tesla, NV50TCL_DMA_NOTIFY, 1);
262 so_data (so, screen->sync->handle);
263 so_method(so, screen->tesla, NV50TCL_DMA_UNK0(0),
264 NV50TCL_DMA_UNK0__SIZE);
265 for (i = 0; i < NV50TCL_DMA_UNK0__SIZE; i++)
266 so_data(so, nvws->channel->vram->handle);
267 so_method(so, screen->tesla, NV50TCL_DMA_UNK1(0),
268 NV50TCL_DMA_UNK1__SIZE);
269 for (i = 0; i < NV50TCL_DMA_UNK1__SIZE; i++)
270 so_data(so, nvws->channel->vram->handle);
271 so_method(so, screen->tesla, 0x121c, 1);
272 so_data (so, 1);
273
274 so_method(so, screen->tesla, 0x13bc, 1);
275 so_data (so, 0x54);
276 so_method(so, screen->tesla, 0x13ac, 1);
277 so_data (so, 1);
278 so_method(so, screen->tesla, 0x16b8, 1);
279 so_data (so, 8);
280
281 /* constant buffers for immediates and VP/FP parameters */
282 ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 0, 128*4*4,
283 &screen->constbuf_misc[0]);
284 if (ret) {
285 nv50_screen_destroy(pscreen);
286 return NULL;
287 }
288
289 for (i = 0; i < 2; i++) {
290 ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 0, 128*4*4,
291 &screen->constbuf_parm[i]);
292 if (ret) {
293 nv50_screen_destroy(pscreen);
294 return NULL;
295 }
296 }
297
298 if (nvws->res_init(&screen->immd_heap[0], 0, 128) ||
299 nvws->res_init(&screen->parm_heap[0], 0, 128) ||
300 nvws->res_init(&screen->parm_heap[1], 0, 128))
301 {
302 NOUVEAU_ERR("Error initialising constant buffers.\n");
303 nv50_screen_destroy(pscreen);
304 return NULL;
305 }
306
307 /*
308 // map constant buffers:
309 // B = buffer ID (maybe more than 1 byte)
310 // N = CB index used in shader instruction
311 // P = program type (0 = VP, 2 = GP, 3 = FP)
312 so_method(so, screen->tesla, 0x1694, 1);
313 so_data (so, 0x000BBNP1);
314 */
315
316 so_method(so, screen->tesla, 0x1280, 3);
317 so_reloc (so, screen->constbuf_misc[0], 0, NOUVEAU_BO_VRAM |
318 NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
319 so_reloc (so, screen->constbuf_misc[0], 0, NOUVEAU_BO_VRAM |
320 NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
321 so_data (so, (NV50_CB_PMISC << 16) | 0x00000800);
322 so_method(so, screen->tesla, 0x1694, 1);
323 so_data (so, 0x00000001 | (NV50_CB_PMISC << 12));
324 so_method(so, screen->tesla, 0x1694, 1);
325 so_data (so, 0x00000031 | (NV50_CB_PMISC << 12));
326
327 so_method(so, screen->tesla, 0x1280, 3);
328 so_reloc (so, screen->constbuf_parm[0], 0, NOUVEAU_BO_VRAM |
329 NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
330 so_reloc (so, screen->constbuf_parm[0], 0, NOUVEAU_BO_VRAM |
331 NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
332 so_data (so, (NV50_CB_PVP << 16) | 0x00000800);
333 so_method(so, screen->tesla, 0x1694, 1);
334 so_data (so, 0x00000101 | (NV50_CB_PVP << 12));
335
336 so_method(so, screen->tesla, 0x1280, 3);
337 so_reloc (so, screen->constbuf_parm[1], 0, NOUVEAU_BO_VRAM |
338 NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
339 so_reloc (so, screen->constbuf_parm[1], 0, NOUVEAU_BO_VRAM |
340 NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
341 so_data (so, (NV50_CB_PFP << 16) | 0x00000800);
342 so_method(so, screen->tesla, 0x1694, 1);
343 so_data (so, 0x00000131 | (NV50_CB_PFP << 12));
344
345 /* Texture sampler/image unit setup - we abuse the constant buffer
346 * upload mechanism for the moment to upload data to the tex config
347 * blocks. At some point we *may* want to go the NVIDIA way of doing
348 * things?
349 */
350 ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 0, 32*8*4, &screen->tic);
351 if (ret) {
352 nv50_screen_destroy(pscreen);
353 return NULL;
354 }
355
356 so_method(so, screen->tesla, 0x1280, 3);
357 so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
358 NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
359 so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
360 NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
361 so_data (so, (NV50_CB_TIC << 16) | 0x0800);
362 so_method(so, screen->tesla, 0x1574, 3);
363 so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
364 NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
365 so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
366 NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
367 so_data (so, 0x00000800);
368
369 ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 0, 32*8*4, &screen->tsc);
370 if (ret) {
371 nv50_screen_destroy(pscreen);
372 return NULL;
373 }
374
375 so_method(so, screen->tesla, 0x1280, 3);
376 so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
377 NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
378 so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
379 NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
380 so_data (so, (NV50_CB_TSC << 16) | 0x0800);
381 so_method(so, screen->tesla, 0x155c, 3);
382 so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
383 NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
384 so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
385 NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
386 so_data (so, 0x00000800);
387
388
389 /* Vertex array limits - max them out */
390 for (i = 0; i < 16; i++) {
391 so_method(so, screen->tesla, 0x1080 + (i * 8), 2);
392 so_data (so, 0x000000ff);
393 so_data (so, 0xffffffff);
394 }
395
396 so_method(so, screen->tesla, NV50TCL_DEPTH_RANGE_NEAR, 2);
397 so_data (so, fui(0.0));
398 so_data (so, fui(1.0));
399
400 so_method(so, screen->tesla, 0x1234, 1);
401 so_data (so, 1);
402 so_method(so, screen->tesla, 0x1458, 1);
403 so_data (so, 1);
404
405 so_emit(nvws, so);
406 so_ref (so, &screen->static_init);
407 so_ref (NULL, &so);
408 nouveau_pushbuf_flush(nvws->channel, 0);
409
410 return pscreen;
411 }
412