src/gallium/drivers/nv50/nv50_screen.c

   1 /*
   2  * Copyright 2008 Ben Skeggs
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  18  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
  19  * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  20  * SOFTWARE.
  21  */
  22
  23 #include "pipe/p_screen.h"
  24
  25 #include "util/u_simple_screen.h"
  26
  27 #include "nv50_context.h"
  28 #include "nv50_screen.h"
  29
  30 #include "nouveau/nouveau_stateobj.h"
  31
  32 #define NV5X_GRCLASS5097_CHIPSETS 0x00000001
  33 #define NV8X_GRCLASS8297_CHIPSETS 0x00000050
  34 #define NV9X_GRCLASS8297_CHIPSETS 0x00000014
  35
  36 static boolean
  37 nv50_screen_is_format_supported(struct pipe_screen *pscreen,
  38                                 enum pipe_format format,
  39                                 enum pipe_texture_target target,
  40                                 unsigned tex_usage, unsigned geom_flags)
  41 {
  42         if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) {
  43                 switch (format) {
  44                 case PIPE_FORMAT_A8R8G8B8_UNORM:
  45                 case PIPE_FORMAT_R5G6B5_UNORM:
  46                 case PIPE_FORMAT_Z24S8_UNORM:
  47                 case PIPE_FORMAT_Z16_UNORM:
  48                         return TRUE;
  49                 default:
  50                         break;
  51                 }
  52         } else {
  53                 switch (format) {
  54                 case PIPE_FORMAT_A8R8G8B8_UNORM:
  55                 case PIPE_FORMAT_A1R5G5B5_UNORM:
  56                 case PIPE_FORMAT_A4R4G4B4_UNORM:
  57                 case PIPE_FORMAT_R5G6B5_UNORM:
  58                 case PIPE_FORMAT_L8_UNORM:
  59                 case PIPE_FORMAT_A8_UNORM:
  60                 case PIPE_FORMAT_I8_UNORM:
  61                 case PIPE_FORMAT_A8L8_UNORM:
  62                 case PIPE_FORMAT_DXT1_RGB:
  63                 case PIPE_FORMAT_DXT1_RGBA:
  64                 case PIPE_FORMAT_DXT3_RGBA:
  65                 case PIPE_FORMAT_DXT5_RGBA:
  66                         return TRUE;
  67                 default:
  68                         break;
  69                 }
  70         }
  71
  72         return FALSE;
  73 }
  74
  75 static const char *
  76 nv50_screen_get_name(struct pipe_screen *pscreen)
  77 {
  78         struct nv50_screen *screen = nv50_screen(pscreen);
  79         struct nouveau_device *dev = screen->nvws->channel->device;
  80         static char buffer[128];
  81
  82         snprintf(buffer, sizeof(buffer), "NV%02X", dev->chipset);
  83         return buffer;
  84 }
  85
  86 static const char *
  87 nv50_screen_get_vendor(struct pipe_screen *pscreen)
  88 {
  89         return "nouveau";
  90 }
  91
  92 static int
  93 nv50_screen_get_param(struct pipe_screen *pscreen, int param)
  94 {
  95         switch (param) {
  96         case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
  97                 return 32;
  98         case PIPE_CAP_NPOT_TEXTURES:
  99                 return 1;
 100         case PIPE_CAP_TWO_SIDED_STENCIL:
 101                 return 1;
 102         case PIPE_CAP_GLSL:
 103                 return 0;
 104         case PIPE_CAP_S3TC:
 105                 return 1;
 106         case PIPE_CAP_ANISOTROPIC_FILTER:
 107                 return 1;
 108         case PIPE_CAP_POINT_SPRITE:
 109                 return 0;
 110         case PIPE_CAP_MAX_RENDER_TARGETS:
 111                 return 8;
 112         case PIPE_CAP_OCCLUSION_QUERY:
 113                 return 1;
 114         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 115                 return 1;
 116         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 117                 return 13;
 118         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 119                 return 10;
 120         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 121                 return 13;
 122         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 123         case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
 124                 return 1;
 125         case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
 126                 return 0;
 127         case NOUVEAU_CAP_HW_VTXBUF:
 128                 return 1;
 129         case NOUVEAU_CAP_HW_IDXBUF:
 130                 return 0;
 131         default:
 132                 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
 133                 return 0;
 134         }
 135 }
 136
 137 static float
 138 nv50_screen_get_paramf(struct pipe_screen *pscreen, int param)
 139 {
 140         switch (param) {
 141         case PIPE_CAP_MAX_LINE_WIDTH:
 142         case PIPE_CAP_MAX_LINE_WIDTH_AA:
 143                 return 10.0;
 144         case PIPE_CAP_MAX_POINT_WIDTH:
 145         case PIPE_CAP_MAX_POINT_WIDTH_AA:
 146                 return 64.0;
 147         case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
 148                 return 16.0;
 149         case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
 150                 return 4.0;
 151         default:
 152                 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
 153                 return 0.0;
 154         }
 155 }
 156
 157 static void
 158 nv50_screen_destroy(struct pipe_screen *pscreen)
 159 {
 160         FREE(pscreen);
 161 }
 162
 163 struct pipe_screen *
 164 nv50_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws)
 165 {
 166         struct nv50_screen *screen = CALLOC_STRUCT(nv50_screen);
 167         struct nouveau_stateobj *so;
 168         unsigned tesla_class = 0, ret;
 169         unsigned chipset = nvws->channel->device->chipset;
 170         int i;
 171
 172         if (!screen)
 173                 return NULL;
 174         screen->nvws = nvws;
 175
 176         /* 2D object */
 177         ret = nvws->grobj_alloc(nvws, NV50_2D, &screen->eng2d);
 178         if (ret) {
 179                 NOUVEAU_ERR("Error creating 2D object: %d\n", ret);
 180                 nv50_screen_destroy(&screen->pipe);
 181                 return NULL;
 182         }
 183
 184         /* 3D object */
 185         if ((chipset & 0xf0) != 0x50 && (chipset & 0xf0) != 0x80) {
 186                 NOUVEAU_ERR("Not a G8x chipset\n");
 187                 nv50_screen_destroy(&screen->pipe);
 188                 return NULL;
 189         }
 190
 191         switch (chipset & 0xf0) {
 192         case 0x50:
 193                 if (NV5X_GRCLASS5097_CHIPSETS & (1 << (chipset & 0x0f)))
 194                         tesla_class = 0x5097;
 195                 break;
 196         case 0x80:
 197                 if (NV8X_GRCLASS8297_CHIPSETS & (1 << (chipset & 0x0f)))
 198                         tesla_class = 0x8297;
 199                 break;
 200         case 0x90:
 201                 if (NV9X_GRCLASS8297_CHIPSETS & (1 << (chipset & 0x0f)))
 202                         tesla_class = 0x8297;
 203                 break;
 204         default:
 205                 break;
 206         }
 207
 208         if (tesla_class == 0) {
 209                 NOUVEAU_ERR("Unknown G8x chipset: NV%02x\n", chipset);
 210                 nv50_screen_destroy(&screen->pipe);
 211                 return NULL;
 212         }
 213
 214         ret = nvws->grobj_alloc(nvws, tesla_class, &screen->tesla);
 215         if (ret) {
 216                 NOUVEAU_ERR("Error creating 3D object: %d\n", ret);
 217                 nv50_screen_destroy(&screen->pipe);
 218                 return NULL;
 219         }
 220
 221         /* Sync notifier */
 222         ret = nvws->notifier_alloc(nvws, 1, &screen->sync);
 223         if (ret) {
 224                 NOUVEAU_ERR("Error creating notifier object: %d\n", ret);
 225                 nv50_screen_destroy(&screen->pipe);
 226                 return NULL;
 227         }
 228
 229         /* Static 2D init */
 230         so = so_new(64, 0);
 231         so_method(so, screen->eng2d, NV50_2D_DMA_NOTIFY, 4);
 232         so_data  (so, screen->sync->handle);
 233         so_data  (so, screen->nvws->channel->vram->handle);
 234         so_data  (so, screen->nvws->channel->vram->handle);
 235         so_data  (so, screen->nvws->channel->vram->handle);
 236         so_method(so, screen->eng2d, NV50_2D_OPERATION, 1);
 237         so_data  (so, NV50_2D_OPERATION_SRCCOPY);
 238         so_method(so, screen->eng2d, 0x0290, 1);
 239         so_data  (so, 0);
 240         so_method(so, screen->eng2d, 0x0888, 1);
 241         so_data  (so, 1);
 242         so_emit(nvws, so);
 243         so_ref(NULL, &so);
 244
 245         /* Static tesla init */
 246         so = so_new(256, 20);
 247
 248         so_method(so, screen->tesla, 0x1558, 1);
 249         so_data  (so, 1);
 250         so_method(so, screen->tesla, NV50TCL_DMA_NOTIFY, 1);
 251         so_data  (so, screen->sync->handle);
 252         so_method(so, screen->tesla, NV50TCL_DMA_UNK0(0),
 253                                      NV50TCL_DMA_UNK0__SIZE);
 254         for (i = 0; i < NV50TCL_DMA_UNK0__SIZE; i++)
 255                 so_data(so, nvws->channel->vram->handle);
 256         so_method(so, screen->tesla, NV50TCL_DMA_UNK1(0),
 257                                      NV50TCL_DMA_UNK1__SIZE);
 258         for (i = 0; i < NV50TCL_DMA_UNK1__SIZE; i++)
 259                 so_data(so, nvws->channel->vram->handle);
 260         so_method(so, screen->tesla, 0x121c, 1);
 261         so_data  (so, 1);
 262
 263         so_method(so, screen->tesla, 0x13bc, 1);
 264         so_data  (so, 0x54);
 265         so_method(so, screen->tesla, 0x13ac, 1);
 266         so_data  (so, 1);
 267         so_method(so, screen->tesla, 0x16b8, 1);
 268         so_data  (so, 8);
 269
 270         /* Shared constant buffer */
 271         screen->constbuf = ws->buffer_create(ws, 0, 0, 128 * 4 * 4);
 272         if (nvws->res_init(&screen->vp_data_heap, 0, 128)) {
 273                 NOUVEAU_ERR("Error initialising constant buffer\n");
 274                 nv50_screen_destroy(&screen->pipe);
 275                 return NULL;
 276         }
 277
 278         so_method(so, screen->tesla, 0x1280, 3);
 279         so_reloc (so, screen->constbuf, 0, NOUVEAU_BO_VRAM |
 280                   NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
 281         so_reloc (so, screen->constbuf, 0, NOUVEAU_BO_VRAM |
 282                   NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
 283         so_data  (so, (NV50_CB_PMISC << 16) | 0x00001000);
 284
 285         /* Texture sampler/image unit setup - we abuse the constant buffer
 286          * upload mechanism for the moment to upload data to the tex config
 287          * blocks.  At some point we *may* want to go the NVIDIA way of doing
 288          * things?
 289          */
 290         screen->tic = ws->buffer_create(ws, 0, 0, 32 * 8 * 4);
 291         so_method(so, screen->tesla, 0x1280, 3);
 292         so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
 293                   NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
 294         so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
 295                   NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
 296         so_data  (so, (NV50_CB_TIC << 16) | 0x0800);
 297         so_method(so, screen->tesla, 0x1574, 3);
 298         so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
 299                   NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
 300         so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
 301                   NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
 302         so_data  (so, 0x00000800);
 303
 304         screen->tsc = ws->buffer_create(ws, 0, 0, 32 * 8 * 4);
 305         so_method(so, screen->tesla, 0x1280, 3);
 306         so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
 307                   NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
 308         so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
 309                   NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
 310         so_data  (so, (NV50_CB_TSC << 16) | 0x0800);
 311         so_method(so, screen->tesla, 0x155c, 3);
 312         so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
 313                   NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
 314         so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
 315                   NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
 316         so_data  (so, 0x00000800);
 317
 318
 319         /* Vertex array limits - max them out */
 320         for (i = 0; i < 16; i++) {
 321                 so_method(so, screen->tesla, 0x1080 + (i * 8), 2);
 322                 so_data  (so, 0x000000ff);
 323                 so_data  (so, 0xffffffff);
 324         }
 325
 326         so_method(so, screen->tesla, NV50TCL_DEPTH_RANGE_NEAR, 2);
 327         so_data  (so, fui(0.0));
 328         so_data  (so, fui(1.0));
 329
 330         so_method(so, screen->tesla, 0x1234, 1);
 331         so_data  (so, 1);
 332         so_method(so, screen->tesla, 0x1458, 1);
 333         so_data  (so, 1);
 334
 335         so_emit(nvws, so);
 336         so_ref(so, &screen->static_init);
 337         nvws->push_flush(nvws, 0, NULL);
 338
 339         screen->pipe.winsys = ws;
 340
 341         screen->pipe.destroy = nv50_screen_destroy;
 342
 343         screen->pipe.get_name = nv50_screen_get_name;
 344         screen->pipe.get_vendor = nv50_screen_get_vendor;
 345         screen->pipe.get_param = nv50_screen_get_param;
 346         screen->pipe.get_paramf = nv50_screen_get_paramf;
 347
 348         screen->pipe.is_format_supported = nv50_screen_is_format_supported;
 349
 350         nv50_screen_init_miptree_functions(&screen->pipe);
 351         nv50_surface_init_screen_functions(&screen->pipe);
 352         u_simple_screen_init(&screen->pipe);
 353
 354         return &screen->pipe;
 355 }
 356