src/gallium/drivers/nv50/nv50_screen.c

   1 /*
   2  * Copyright 2008 Ben Skeggs
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  18  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
  19  * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  20  * SOFTWARE.
  21  */
  22
  23 #include "pipe/p_screen.h"
  24 #include "pipe/p_util.h"
  25
  26 #include "nv50_context.h"
  27 #include "nv50_screen.h"
  28
  29 #include "nouveau/nouveau_stateobj.h"
  30
  31 #define NV5X_GRCLASS5097_CHIPSETS 0x00000001
  32 #define NV8X_GRCLASS8297_CHIPSETS 0x00000050
  33 #define NV9X_GRCLASS8297_CHIPSETS 0x00000014
  34
  35 static boolean
  36 nv50_screen_is_format_supported(struct pipe_screen *pscreen,
  37                                 enum pipe_format format,
  38                                 enum pipe_texture_target target,
  39                                 unsigned tex_usage, unsigned geom_flags)
  40 {
  41         if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) {
  42                 switch (format) {
  43                 case PIPE_FORMAT_A8R8G8B8_UNORM:
  44                 case PIPE_FORMAT_R5G6B5_UNORM:
  45                 case PIPE_FORMAT_Z24S8_UNORM:
  46                 case PIPE_FORMAT_Z16_UNORM:
  47                         return TRUE;
  48                 default:
  49                         break;
  50                 }
  51         } else {
  52                 switch (format) {
  53                 case PIPE_FORMAT_A8R8G8B8_UNORM:
  54                 case PIPE_FORMAT_A1R5G5B5_UNORM:
  55                 case PIPE_FORMAT_A4R4G4B4_UNORM:
  56                 case PIPE_FORMAT_R5G6B5_UNORM:
  57                 case PIPE_FORMAT_L8_UNORM:
  58                 case PIPE_FORMAT_A8_UNORM:
  59                 case PIPE_FORMAT_I8_UNORM:
  60                 case PIPE_FORMAT_A8L8_UNORM:
  61                         return TRUE;
  62                 default:
  63                         break;
  64                 }
  65         }
  66
  67         return FALSE;
  68 }
  69
  70 static const char *
  71 nv50_screen_get_name(struct pipe_screen *pscreen)
  72 {
  73         struct nv50_screen *screen = nv50_screen(pscreen);
  74         struct nouveau_device *dev = screen->nvws->channel->device;
  75         static char buffer[128];
  76
  77         snprintf(buffer, sizeof(buffer), "NV%02X", dev->chipset);
  78         return buffer;
  79 }
  80
  81 static const char *
  82 nv50_screen_get_vendor(struct pipe_screen *pscreen)
  83 {
  84         return "nouveau";
  85 }
  86
  87 static int
  88 nv50_screen_get_param(struct pipe_screen *pscreen, int param)
  89 {
  90         switch (param) {
  91         case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
  92                 return 32;
  93         case PIPE_CAP_NPOT_TEXTURES:
  94                 return 0;
  95         case PIPE_CAP_TWO_SIDED_STENCIL:
  96                 return 1;
  97         case PIPE_CAP_GLSL:
  98                 return 0;
  99         case PIPE_CAP_S3TC:
 100                 return 0;
 101         case PIPE_CAP_ANISOTROPIC_FILTER:
 102                 return 0;
 103         case PIPE_CAP_POINT_SPRITE:
 104                 return 0;
 105         case PIPE_CAP_MAX_RENDER_TARGETS:
 106                 return 8;
 107         case PIPE_CAP_OCCLUSION_QUERY:
 108                 return 0;
 109         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 110                 return 0;
 111         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 112                 return 13;
 113         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 114                 return 10;
 115         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 116                 return 13;
 117         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 118         case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
 119                 return 1;
 120         case NOUVEAU_CAP_HW_VTXBUF:
 121                 return 1;
 122         case NOUVEAU_CAP_HW_IDXBUF:
 123                 return 0;
 124         default:
 125                 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
 126                 return 0;
 127         }
 128 }
 129
 130 static float
 131 nv50_screen_get_paramf(struct pipe_screen *pscreen, int param)
 132 {
 133         switch (param) {
 134         case PIPE_CAP_MAX_LINE_WIDTH:
 135         case PIPE_CAP_MAX_LINE_WIDTH_AA:
 136                 return 10.0;
 137         case PIPE_CAP_MAX_POINT_WIDTH:
 138         case PIPE_CAP_MAX_POINT_WIDTH_AA:
 139                 return 64.0;
 140         case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
 141                 return 16.0;
 142         case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
 143                 return 4.0;
 144         default:
 145                 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
 146                 return 0.0;
 147         }
 148 }
 149
 150 static void
 151 nv50_screen_destroy(struct pipe_screen *pscreen)
 152 {
 153         FREE(pscreen);
 154 }
 155
 156 struct pipe_screen *
 157 nv50_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws)
 158 {
 159         struct nv50_screen *screen = CALLOC_STRUCT(nv50_screen);
 160         struct nouveau_stateobj *so;
 161         unsigned tesla_class = 0, ret;
 162         unsigned chipset = nvws->channel->device->chipset;
 163         int i;
 164
 165         if (!screen)
 166                 return NULL;
 167         screen->nvws = nvws;
 168
 169         /* 3D object */
 170         if ((chipset & 0xf0) != 0x50 && (chipset & 0xf0) != 0x80) {
 171                 NOUVEAU_ERR("Not a G8x chipset\n");
 172                 nv50_screen_destroy(&screen->pipe);
 173                 return NULL;
 174         }
 175
 176         switch (chipset & 0xf0) {
 177         case 0x50:
 178                 if (NV5X_GRCLASS5097_CHIPSETS & (1 << (chipset & 0x0f)))
 179                         tesla_class = 0x5097;
 180                 break;
 181         case 0x80:
 182                 if (NV8X_GRCLASS8297_CHIPSETS & (1 << (chipset & 0x0f)))
 183                         tesla_class = 0x8297;
 184                 break;
 185         case 0x90:
 186                 if (NV9X_GRCLASS8297_CHIPSETS & (1 << (chipset & 0x0f)))
 187                         tesla_class = 0x8297;
 188                 break;
 189         default:
 190                 break;
 191         }
 192
 193         if (tesla_class == 0) {
 194                 NOUVEAU_ERR("Unknown G8x chipset: NV%02x\n", chipset);
 195                 nv50_screen_destroy(&screen->pipe);
 196                 return NULL;
 197         }
 198
 199         ret = nvws->grobj_alloc(nvws, tesla_class, &screen->tesla);
 200         if (ret) {
 201                 NOUVEAU_ERR("Error creating 3D object: %d\n", ret);
 202                 nv50_screen_destroy(&screen->pipe);
 203                 return NULL;
 204         }
 205
 206         /* Sync notifier */
 207         ret = nvws->notifier_alloc(nvws, 1, &screen->sync);
 208         if (ret) {
 209                 NOUVEAU_ERR("Error creating notifier object: %d\n", ret);
 210                 nv50_screen_destroy(&screen->pipe);
 211                 return NULL;
 212         }
 213
 214         /* Static tesla init */
 215         so = so_new(256, 20);
 216
 217         so_method(so, screen->tesla, 0x1558, 1);
 218         so_data  (so, 1);
 219         so_method(so, screen->tesla, NV50TCL_DMA_NOTIFY, 1);
 220         so_data  (so, screen->sync->handle);
 221         so_method(so, screen->tesla, NV50TCL_DMA_UNK0(0),
 222                                      NV50TCL_DMA_UNK0__SIZE);
 223         for (i = 0; i < NV50TCL_DMA_UNK0__SIZE; i++)
 224                 so_data(so, nvws->channel->vram->handle);
 225         so_method(so, screen->tesla, NV50TCL_DMA_UNK1(0),
 226                                      NV50TCL_DMA_UNK1__SIZE);
 227         for (i = 0; i < NV50TCL_DMA_UNK1__SIZE; i++)
 228                 so_data(so, nvws->channel->vram->handle);
 229         so_method(so, screen->tesla, 0x121c, 1);
 230         so_data  (so, 1);
 231
 232         so_method(so, screen->tesla, 0x13bc, 1);
 233         so_data  (so, 0x54);
 234         so_method(so, screen->tesla, 0x13ac, 1);
 235         so_data  (so, 1);
 236         so_method(so, screen->tesla, 0x16b8, 1);
 237         so_data  (so, 8);
 238
 239         /* Shared constant buffer */
 240         screen->constbuf = ws->buffer_create(ws, 0, 0, 128 * 4 * 4);
 241         if (nvws->res_init(&screen->vp_data_heap, 0, 128)) {
 242                 NOUVEAU_ERR("Error initialising constant buffer\n");
 243                 nv50_screen_destroy(&screen->pipe);
 244                 return NULL;
 245         }
 246
 247         so_method(so, screen->tesla, 0x1280, 3);
 248         so_reloc (so, screen->constbuf, 0, NOUVEAU_BO_VRAM |
 249                   NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
 250         so_reloc (so, screen->constbuf, 0, NOUVEAU_BO_VRAM |
 251                   NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
 252         so_data  (so, (NV50_CB_PMISC << 16) | 0x00001000);
 253
 254         /* Texture sampler/image unit setup - we abuse the constant buffer
 255          * upload mechanism for the moment to upload data to the tex config
 256          * blocks.  At some point we *may* want to go the NVIDIA way of doing
 257          * things?
 258          */
 259         screen->tic = ws->buffer_create(ws, 0, 0, 32 * 8 * 4);
 260         so_method(so, screen->tesla, 0x1280, 3);
 261         so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
 262                   NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
 263         so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
 264                   NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
 265         so_data  (so, (NV50_CB_TIC << 16) | 0x0800);
 266         so_method(so, screen->tesla, 0x1574, 3);
 267         so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
 268                   NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
 269         so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
 270                   NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
 271         so_data  (so, 0x00000800);
 272
 273         screen->tsc = ws->buffer_create(ws, 0, 0, 32 * 8 * 4);
 274         so_method(so, screen->tesla, 0x1280, 3);
 275         so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
 276                   NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
 277         so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
 278                   NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
 279         so_data  (so, (NV50_CB_TSC << 16) | 0x0800);
 280         so_method(so, screen->tesla, 0x155c, 3);
 281         so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
 282                   NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
 283         so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
 284                   NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
 285         so_data  (so, 0x00000800);
 286
 287
 288         /* Vertex array limits - max them out */
 289         for (i = 0; i < 16; i++) {
 290                 so_method(so, screen->tesla, 0x1080 + (i * 8), 2);
 291                 so_data  (so, 0x000000ff);
 292                 so_data  (so, 0xffffffff);
 293         }
 294
 295         so_method(so, screen->tesla, NV50TCL_DEPTH_RANGE_NEAR, 2);
 296         so_data  (so, fui(0.0));
 297         so_data  (so, fui(1.0));
 298
 299         so_method(so, screen->tesla, 0x1234, 1);
 300         so_data  (so, 1);
 301         so_method(so, screen->tesla, 0x1458, 1);
 302         so_data  (so, 1);
 303
 304         so_emit(nvws, so);
 305         so_ref(so, &screen->static_init);
 306         nvws->push_flush(nvws, 0, NULL);
 307
 308         screen->pipe.winsys = ws;
 309
 310         screen->pipe.destroy = nv50_screen_destroy;
 311
 312         screen->pipe.get_name = nv50_screen_get_name;
 313         screen->pipe.get_vendor = nv50_screen_get_vendor;
 314         screen->pipe.get_param = nv50_screen_get_param;
 315         screen->pipe.get_paramf = nv50_screen_get_paramf;
 316
 317         screen->pipe.is_format_supported = nv50_screen_is_format_supported;
 318
 319         nv50_screen_init_miptree_functions(&screen->pipe);
 320         nv50_surface_init_screen_functions(&screen->pipe);
 321
 322         return &screen->pipe;
 323 }
 324