src/gallium/drivers/nv50/nv50_screen.c

   1 #include "pipe/p_screen.h"
   2 #include "pipe/p_util.h"
   3
   4 #include "nv50_context.h"
   5 #include "nv50_screen.h"
   6
   7 #include "nouveau/nouveau_stateobj.h"
   8
   9 #define GRCLASS5097_CHIPSETS 0x00000000
  10 #define GRCLASS8297_CHIPSETS 0x00000010
  11
  12 static boolean
  13 nv50_screen_is_format_supported(struct pipe_screen *pscreen,
  14                                 enum pipe_format format, uint type)
  15 {
  16         return FALSE;
  17 }
  18
  19 static const char *
  20 nv50_screen_get_name(struct pipe_screen *pscreen)
  21 {
  22         struct nv50_screen *screen = nv50_screen(pscreen);
  23         static char buffer[128];
  24
  25         snprintf(buffer, sizeof(buffer), "NV%02X", screen->chipset);
  26         return buffer;
  27 }
  28
  29 static const char *
  30 nv50_screen_get_vendor(struct pipe_screen *pscreen)
  31 {
  32         return "nouveau";
  33 }
  34
  35 static int
  36 nv50_screen_get_param(struct pipe_screen *pscreen, int param)
  37 {
  38         switch (param) {
  39         case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
  40                 return 32;
  41         case PIPE_CAP_NPOT_TEXTURES:
  42                 return 0;
  43         case PIPE_CAP_TWO_SIDED_STENCIL:
  44                 return 1;
  45         case PIPE_CAP_GLSL:
  46                 return 0;
  47         case PIPE_CAP_S3TC:
  48                 return 0;
  49         case PIPE_CAP_ANISOTROPIC_FILTER:
  50                 return 0;
  51         case PIPE_CAP_POINT_SPRITE:
  52                 return 0;
  53         case PIPE_CAP_MAX_RENDER_TARGETS:
  54                 return 8;
  55         case PIPE_CAP_OCCLUSION_QUERY:
  56                 return 0;
  57         case PIPE_CAP_TEXTURE_SHADOW_MAP:
  58                 return 0;
  59         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
  60                 return 13;
  61         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
  62                 return 10;
  63         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
  64                 return 13;
  65         default:
  66                 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
  67                 return 0;
  68         }
  69 }
  70
  71 static float
  72 nv50_screen_get_paramf(struct pipe_screen *pscreen, int param)
  73 {
  74         switch (param) {
  75         case PIPE_CAP_MAX_LINE_WIDTH:
  76         case PIPE_CAP_MAX_LINE_WIDTH_AA:
  77                 return 10.0;
  78         case PIPE_CAP_MAX_POINT_WIDTH:
  79         case PIPE_CAP_MAX_POINT_WIDTH_AA:
  80                 return 64.0;
  81         case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
  82                 return 16.0;
  83         case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
  84                 return 4.0;
  85         case PIPE_CAP_BITMAP_TEXCOORD_BIAS:
  86                 return 0.0;
  87         default:
  88                 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
  89                 return 0.0;
  90         }
  91 }
  92
  93 static void
  94 nv50_screen_destroy(struct pipe_screen *pscreen)
  95 {
  96         FREE(pscreen);
  97 }
  98
  99 struct pipe_screen *
 100 nv50_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws,
 101                    unsigned chipset)
 102 {
 103         struct nv50_screen *screen = CALLOC_STRUCT(nv50_screen);
 104         struct nouveau_stateobj *so;
 105         unsigned tesla_class = 0, ret;
 106         int i;
 107
 108         if (!screen)
 109                 return NULL;
 110         screen->chipset = chipset;
 111         screen->nvws = nvws;
 112
 113         /* 3D object */
 114         if ((chipset & 0xf0) != 0x50 && (chipset & 0xf0) != 0x80) {
 115                 NOUVEAU_ERR("Not a G8x chipset\n");
 116                 nv50_screen_destroy(&screen->pipe);
 117                 return NULL;
 118         }
 119
 120         if (GRCLASS5097_CHIPSETS & (1 << (chipset & 0x0f))) {
 121                 tesla_class = 0x5097;
 122         } else
 123         if (GRCLASS8297_CHIPSETS & (1 << (chipset & 0x0f))) {
 124                 tesla_class = 0x8297;
 125         } else {
 126                 NOUVEAU_ERR("Unknown G8x chipset: NV%02x\n", chipset);
 127                 nv50_screen_destroy(&screen->pipe);
 128                 return NULL;
 129         }
 130
 131         ret = nvws->grobj_alloc(nvws, tesla_class, &screen->tesla);
 132         if (ret) {
 133                 NOUVEAU_ERR("Error creating 3D object: %d\n", ret);
 134                 nv50_screen_destroy(&screen->pipe);
 135                 return NULL;
 136         }
 137
 138         /* Sync notifier */
 139         ret = nvws->notifier_alloc(nvws, 1, &screen->sync);
 140         if (ret) {
 141                 NOUVEAU_ERR("Error creating notifier object: %d\n", ret);
 142                 nv50_screen_destroy(&screen->pipe);
 143                 return NULL;
 144         }
 145
 146         /* Static tesla init */
 147         so = so_new(128, 0);
 148         so_method(so, screen->tesla, NV50TCL_DMA_NOTIFY, 1);
 149         so_data  (so, screen->sync->handle);
 150         so_method(so, screen->tesla, NV50TCL_DMA_IN_MEMORY0(0),
 151                   NV50TCL_DMA_IN_MEMORY0__SIZE);
 152         for (i = 0; i < NV50TCL_DMA_IN_MEMORY0__SIZE; i++)
 153                 so_data(so, nvws->channel->vram->handle);
 154         so_method(so, screen->tesla, NV50TCL_DMA_IN_MEMORY1(0),
 155                   NV50TCL_DMA_IN_MEMORY1__SIZE);
 156         for (i = 0; i < NV50TCL_DMA_IN_MEMORY1__SIZE; i++)
 157                 so_data(so, nvws->channel->vram->handle);
 158
 159         so_emit(nvws, so);
 160         so_ref(NULL, &so);
 161         nvws->push_flush(nvws->channel, 0);
 162
 163         screen->pipe.winsys = ws;
 164
 165         screen->pipe.destroy = nv50_screen_destroy;
 166
 167         screen->pipe.get_name = nv50_screen_get_name;
 168         screen->pipe.get_vendor = nv50_screen_get_vendor;
 169         screen->pipe.get_param = nv50_screen_get_param;
 170         screen->pipe.get_paramf = nv50_screen_get_paramf;
 171
 172         screen->pipe.is_format_supported = nv50_screen_is_format_supported;
 173
 174         nv50_screen_init_miptree_functions(&screen->pipe);
 175
 176         return &screen->pipe;
 177 }
 178