nouveau: call nouveau_pushbuf directly rather than going through nvws
[mesa.git] / src / gallium / drivers / nv50 / nv50_screen.c
1 /*
2 * Copyright 2008 Ben Skeggs
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 * SOFTWARE.
21 */
22
23 #include "pipe/p_screen.h"
24
25 #include "util/u_simple_screen.h"
26
27 #include "nv50_context.h"
28 #include "nv50_screen.h"
29
30 #include "nouveau/nouveau_stateobj.h"
31
32 static boolean
33 nv50_screen_is_format_supported(struct pipe_screen *pscreen,
34 enum pipe_format format,
35 enum pipe_texture_target target,
36 unsigned tex_usage, unsigned geom_flags)
37 {
38 if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) {
39 switch (format) {
40 case PIPE_FORMAT_A8R8G8B8_UNORM:
41 case PIPE_FORMAT_R5G6B5_UNORM:
42 case PIPE_FORMAT_Z24S8_UNORM:
43 case PIPE_FORMAT_Z16_UNORM:
44 return TRUE;
45 default:
46 break;
47 }
48 } else {
49 switch (format) {
50 case PIPE_FORMAT_A8R8G8B8_UNORM:
51 case PIPE_FORMAT_A1R5G5B5_UNORM:
52 case PIPE_FORMAT_A4R4G4B4_UNORM:
53 case PIPE_FORMAT_R5G6B5_UNORM:
54 case PIPE_FORMAT_L8_UNORM:
55 case PIPE_FORMAT_A8_UNORM:
56 case PIPE_FORMAT_I8_UNORM:
57 case PIPE_FORMAT_A8L8_UNORM:
58 case PIPE_FORMAT_DXT1_RGB:
59 case PIPE_FORMAT_DXT1_RGBA:
60 case PIPE_FORMAT_DXT3_RGBA:
61 case PIPE_FORMAT_DXT5_RGBA:
62 return TRUE;
63 default:
64 break;
65 }
66 }
67
68 return FALSE;
69 }
70
71 static const char *
72 nv50_screen_get_name(struct pipe_screen *pscreen)
73 {
74 struct nv50_screen *screen = nv50_screen(pscreen);
75 struct nouveau_device *dev = screen->nvws->channel->device;
76 static char buffer[128];
77
78 snprintf(buffer, sizeof(buffer), "NV%02X", dev->chipset);
79 return buffer;
80 }
81
82 static const char *
83 nv50_screen_get_vendor(struct pipe_screen *pscreen)
84 {
85 return "nouveau";
86 }
87
88 static int
89 nv50_screen_get_param(struct pipe_screen *pscreen, int param)
90 {
91 switch (param) {
92 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
93 return 32;
94 case PIPE_CAP_NPOT_TEXTURES:
95 return 1;
96 case PIPE_CAP_TWO_SIDED_STENCIL:
97 return 1;
98 case PIPE_CAP_GLSL:
99 return 0;
100 case PIPE_CAP_S3TC:
101 return 1;
102 case PIPE_CAP_ANISOTROPIC_FILTER:
103 return 1;
104 case PIPE_CAP_POINT_SPRITE:
105 return 0;
106 case PIPE_CAP_MAX_RENDER_TARGETS:
107 return 8;
108 case PIPE_CAP_OCCLUSION_QUERY:
109 return 1;
110 case PIPE_CAP_TEXTURE_SHADOW_MAP:
111 return 1;
112 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
113 return 13;
114 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
115 return 10;
116 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
117 return 13;
118 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
119 case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
120 return 1;
121 case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
122 return 0;
123 case NOUVEAU_CAP_HW_VTXBUF:
124 return 1;
125 case NOUVEAU_CAP_HW_IDXBUF:
126 return 0;
127 default:
128 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
129 return 0;
130 }
131 }
132
133 static float
134 nv50_screen_get_paramf(struct pipe_screen *pscreen, int param)
135 {
136 switch (param) {
137 case PIPE_CAP_MAX_LINE_WIDTH:
138 case PIPE_CAP_MAX_LINE_WIDTH_AA:
139 return 10.0;
140 case PIPE_CAP_MAX_POINT_WIDTH:
141 case PIPE_CAP_MAX_POINT_WIDTH_AA:
142 return 64.0;
143 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
144 return 16.0;
145 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
146 return 4.0;
147 default:
148 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
149 return 0.0;
150 }
151 }
152
153 static void
154 nv50_screen_destroy(struct pipe_screen *pscreen)
155 {
156 FREE(pscreen);
157 }
158
159 struct pipe_screen *
160 nv50_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws)
161 {
162 struct nv50_screen *screen = CALLOC_STRUCT(nv50_screen);
163 struct nouveau_stateobj *so;
164 unsigned tesla_class = 0, ret;
165 unsigned chipset = nvws->channel->device->chipset;
166 int i;
167
168 if (!screen)
169 return NULL;
170 screen->nvws = nvws;
171
172 /* DMA engine object */
173 ret = nvws->grobj_alloc(nvws, 0x5039, &screen->m2mf);
174 if (ret) {
175 NOUVEAU_ERR("Error creating M2MF object: %d\n", ret);
176 nv50_screen_destroy(&screen->pipe);
177 return NULL;
178 }
179
180 /* 2D object */
181 ret = nvws->grobj_alloc(nvws, NV50_2D, &screen->eng2d);
182 if (ret) {
183 NOUVEAU_ERR("Error creating 2D object: %d\n", ret);
184 nv50_screen_destroy(&screen->pipe);
185 return NULL;
186 }
187
188 /* 3D object */
189 switch (chipset & 0xf0) {
190 case 0x50:
191 tesla_class = 0x5097;
192 break;
193 case 0x80:
194 case 0x90:
195 tesla_class = 0x8297;
196 break;
197 case 0xa0:
198 tesla_class = 0x8397;
199 break;
200 default:
201 NOUVEAU_ERR("Not a known NV50 chipset: NV%02x\n", chipset);
202 nv50_screen_destroy(&screen->pipe);
203 return NULL;
204 }
205
206 if (tesla_class == 0) {
207 NOUVEAU_ERR("Unknown G8x chipset: NV%02x\n", chipset);
208 nv50_screen_destroy(&screen->pipe);
209 return NULL;
210 }
211
212 ret = nvws->grobj_alloc(nvws, tesla_class, &screen->tesla);
213 if (ret) {
214 NOUVEAU_ERR("Error creating 3D object: %d\n", ret);
215 nv50_screen_destroy(&screen->pipe);
216 return NULL;
217 }
218
219 /* Sync notifier */
220 ret = nvws->notifier_alloc(nvws, 1, &screen->sync);
221 if (ret) {
222 NOUVEAU_ERR("Error creating notifier object: %d\n", ret);
223 nv50_screen_destroy(&screen->pipe);
224 return NULL;
225 }
226
227 /* Setup the pipe */
228 screen->pipe.winsys = ws;
229
230 screen->pipe.destroy = nv50_screen_destroy;
231
232 screen->pipe.get_name = nv50_screen_get_name;
233 screen->pipe.get_vendor = nv50_screen_get_vendor;
234 screen->pipe.get_param = nv50_screen_get_param;
235 screen->pipe.get_paramf = nv50_screen_get_paramf;
236
237 screen->pipe.is_format_supported = nv50_screen_is_format_supported;
238
239 nv50_screen_init_miptree_functions(&screen->pipe);
240 nv50_transfer_init_screen_functions(&screen->pipe);
241 u_simple_screen_init(&screen->pipe);
242
243 /* Static M2MF init */
244 so = so_new(32, 0);
245 so_method(so, screen->m2mf, 0x0180, 3);
246 so_data (so, screen->sync->handle);
247 so_data (so, screen->nvws->channel->vram->handle);
248 so_data (so, screen->nvws->channel->vram->handle);
249 so_emit(nvws, so);
250 so_ref (NULL, &so);
251
252 /* Static 2D init */
253 so = so_new(64, 0);
254 so_method(so, screen->eng2d, NV50_2D_DMA_NOTIFY, 4);
255 so_data (so, screen->sync->handle);
256 so_data (so, screen->nvws->channel->vram->handle);
257 so_data (so, screen->nvws->channel->vram->handle);
258 so_data (so, screen->nvws->channel->vram->handle);
259 so_method(so, screen->eng2d, NV50_2D_OPERATION, 1);
260 so_data (so, NV50_2D_OPERATION_SRCCOPY);
261 so_method(so, screen->eng2d, 0x0290, 1);
262 so_data (so, 0);
263 so_method(so, screen->eng2d, 0x0888, 1);
264 so_data (so, 1);
265 so_emit(nvws, so);
266 so_ref(NULL, &so);
267
268 /* Static tesla init */
269 so = so_new(256, 20);
270
271 so_method(so, screen->tesla, 0x1558, 1);
272 so_data (so, 1);
273 so_method(so, screen->tesla, NV50TCL_DMA_NOTIFY, 1);
274 so_data (so, screen->sync->handle);
275 so_method(so, screen->tesla, NV50TCL_DMA_UNK0(0),
276 NV50TCL_DMA_UNK0__SIZE);
277 for (i = 0; i < NV50TCL_DMA_UNK0__SIZE; i++)
278 so_data(so, nvws->channel->vram->handle);
279 so_method(so, screen->tesla, NV50TCL_DMA_UNK1(0),
280 NV50TCL_DMA_UNK1__SIZE);
281 for (i = 0; i < NV50TCL_DMA_UNK1__SIZE; i++)
282 so_data(so, nvws->channel->vram->handle);
283 so_method(so, screen->tesla, 0x121c, 1);
284 so_data (so, 1);
285
286 so_method(so, screen->tesla, 0x13bc, 1);
287 so_data (so, 0x54);
288 so_method(so, screen->tesla, 0x13ac, 1);
289 so_data (so, 1);
290 so_method(so, screen->tesla, 0x16b8, 1);
291 so_data (so, 8);
292
293 /* constant buffers for immediates and VP/FP parameters */
294 screen->constbuf_misc[0] =
295 screen->pipe.buffer_create(&screen->pipe, 0, 0, 128 * 4 * 4);
296
297 screen->constbuf_parm[0] =
298 screen->pipe.buffer_create(&screen->pipe, 0, 0, 128 * 4 * 4);
299
300 screen->constbuf_parm[1] =
301 screen->pipe.buffer_create(&screen->pipe, 0, 0, 128 * 4 * 4);
302
303 if (nvws->res_init(&screen->immd_heap[0], 0, 128) ||
304 nvws->res_init(&screen->parm_heap[0], 0, 128) ||
305 nvws->res_init(&screen->parm_heap[1], 0, 128))
306 {
307 NOUVEAU_ERR("Error initialising constant buffers.\n");
308 nv50_screen_destroy(&screen->pipe);
309 return NULL;
310 }
311
312 /*
313 // map constant buffers:
314 // B = buffer ID (maybe more than 1 byte)
315 // N = CB index used in shader instruction
316 // P = program type (0 = VP, 2 = GP, 3 = FP)
317 so_method(so, screen->tesla, 0x1694, 1);
318 so_data (so, 0x000BBNP1);
319 */
320
321 so_method(so, screen->tesla, 0x1280, 3);
322 so_reloc (so, screen->constbuf_misc[0], 0, NOUVEAU_BO_VRAM |
323 NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
324 so_reloc (so, screen->constbuf_misc[0], 0, NOUVEAU_BO_VRAM |
325 NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
326 so_data (so, (NV50_CB_PMISC << 16) | 0x00000800);
327 so_method(so, screen->tesla, 0x1694, 1);
328 so_data (so, 0x00000001 | (NV50_CB_PMISC << 12));
329 so_method(so, screen->tesla, 0x1694, 1);
330 so_data (so, 0x00000031 | (NV50_CB_PMISC << 12));
331
332 so_method(so, screen->tesla, 0x1280, 3);
333 so_reloc (so, screen->constbuf_parm[0], 0, NOUVEAU_BO_VRAM |
334 NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
335 so_reloc (so, screen->constbuf_parm[0], 0, NOUVEAU_BO_VRAM |
336 NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
337 so_data (so, (NV50_CB_PVP << 16) | 0x00000800);
338 so_method(so, screen->tesla, 0x1694, 1);
339 so_data (so, 0x00000101 | (NV50_CB_PVP << 12));
340
341 so_method(so, screen->tesla, 0x1280, 3);
342 so_reloc (so, screen->constbuf_parm[1], 0, NOUVEAU_BO_VRAM |
343 NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
344 so_reloc (so, screen->constbuf_parm[1], 0, NOUVEAU_BO_VRAM |
345 NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
346 so_data (so, (NV50_CB_PFP << 16) | 0x00000800);
347 so_method(so, screen->tesla, 0x1694, 1);
348 so_data (so, 0x00000131 | (NV50_CB_PFP << 12));
349
350 /* Texture sampler/image unit setup - we abuse the constant buffer
351 * upload mechanism for the moment to upload data to the tex config
352 * blocks. At some point we *may* want to go the NVIDIA way of doing
353 * things?
354 */
355 screen->tic = screen->pipe.buffer_create(&screen->pipe, 0, 0, 32 * 8 * 4);
356 so_method(so, screen->tesla, 0x1280, 3);
357 so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
358 NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
359 so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
360 NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
361 so_data (so, (NV50_CB_TIC << 16) | 0x0800);
362 so_method(so, screen->tesla, 0x1574, 3);
363 so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
364 NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
365 so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
366 NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
367 so_data (so, 0x00000800);
368
369 screen->tsc = screen->pipe.buffer_create(&screen->pipe, 0, 0, 32 * 8 * 4);
370 so_method(so, screen->tesla, 0x1280, 3);
371 so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
372 NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
373 so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
374 NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
375 so_data (so, (NV50_CB_TSC << 16) | 0x0800);
376 so_method(so, screen->tesla, 0x155c, 3);
377 so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
378 NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
379 so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
380 NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
381 so_data (so, 0x00000800);
382
383
384 /* Vertex array limits - max them out */
385 for (i = 0; i < 16; i++) {
386 so_method(so, screen->tesla, 0x1080 + (i * 8), 2);
387 so_data (so, 0x000000ff);
388 so_data (so, 0xffffffff);
389 }
390
391 so_method(so, screen->tesla, NV50TCL_DEPTH_RANGE_NEAR, 2);
392 so_data (so, fui(0.0));
393 so_data (so, fui(1.0));
394
395 so_method(so, screen->tesla, 0x1234, 1);
396 so_data (so, 1);
397 so_method(so, screen->tesla, 0x1458, 1);
398 so_data (so, 1);
399
400 so_emit(nvws, so);
401 so_ref (so, &screen->static_init);
402 so_ref (NULL, &so);
403 nouveau_pushbuf_flush(nvws->channel, 0);
404
405 return &screen->pipe;
406 }
407