2 * Copyright 2008 Ben Skeggs
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 #include "pipe/p_screen.h"
25 #include "util/u_simple_screen.h"
27 #include "nv50_context.h"
28 #include "nv50_screen.h"
30 #include "nouveau/nouveau_stateobj.h"
33 nv50_screen_is_format_supported(struct pipe_screen
*pscreen
,
34 enum pipe_format format
,
35 enum pipe_texture_target target
,
36 unsigned tex_usage
, unsigned geom_flags
)
38 if (tex_usage
& PIPE_TEXTURE_USAGE_RENDER_TARGET
) {
40 case PIPE_FORMAT_A8R8G8B8_UNORM
:
41 case PIPE_FORMAT_R5G6B5_UNORM
:
42 case PIPE_FORMAT_Z24S8_UNORM
:
43 case PIPE_FORMAT_Z16_UNORM
:
50 case PIPE_FORMAT_A8R8G8B8_UNORM
:
51 case PIPE_FORMAT_A1R5G5B5_UNORM
:
52 case PIPE_FORMAT_A4R4G4B4_UNORM
:
53 case PIPE_FORMAT_R5G6B5_UNORM
:
54 case PIPE_FORMAT_L8_UNORM
:
55 case PIPE_FORMAT_A8_UNORM
:
56 case PIPE_FORMAT_I8_UNORM
:
57 case PIPE_FORMAT_A8L8_UNORM
:
58 case PIPE_FORMAT_DXT1_RGB
:
59 case PIPE_FORMAT_DXT1_RGBA
:
60 case PIPE_FORMAT_DXT3_RGBA
:
61 case PIPE_FORMAT_DXT5_RGBA
:
72 nv50_screen_get_name(struct pipe_screen
*pscreen
)
74 struct nv50_screen
*screen
= nv50_screen(pscreen
);
75 struct nouveau_device
*dev
= screen
->nvws
->channel
->device
;
76 static char buffer
[128];
78 snprintf(buffer
, sizeof(buffer
), "NV%02X", dev
->chipset
);
83 nv50_screen_get_vendor(struct pipe_screen
*pscreen
)
89 nv50_screen_get_param(struct pipe_screen
*pscreen
, int param
)
92 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS
:
94 case PIPE_CAP_NPOT_TEXTURES
:
96 case PIPE_CAP_TWO_SIDED_STENCIL
:
102 case PIPE_CAP_ANISOTROPIC_FILTER
:
104 case PIPE_CAP_POINT_SPRITE
:
106 case PIPE_CAP_MAX_RENDER_TARGETS
:
108 case PIPE_CAP_OCCLUSION_QUERY
:
110 case PIPE_CAP_TEXTURE_SHADOW_MAP
:
112 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS
:
114 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS
:
116 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
:
118 case PIPE_CAP_TEXTURE_MIRROR_CLAMP
:
119 case PIPE_CAP_TEXTURE_MIRROR_REPEAT
:
121 case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS
:
123 case NOUVEAU_CAP_HW_VTXBUF
:
125 case NOUVEAU_CAP_HW_IDXBUF
:
128 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param
);
134 nv50_screen_get_paramf(struct pipe_screen
*pscreen
, int param
)
137 case PIPE_CAP_MAX_LINE_WIDTH
:
138 case PIPE_CAP_MAX_LINE_WIDTH_AA
:
140 case PIPE_CAP_MAX_POINT_WIDTH
:
141 case PIPE_CAP_MAX_POINT_WIDTH_AA
:
143 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY
:
145 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS
:
148 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param
);
154 nv50_screen_destroy(struct pipe_screen
*pscreen
)
160 nv50_screen_create(struct pipe_winsys
*ws
, struct nouveau_winsys
*nvws
)
162 struct nv50_screen
*screen
= CALLOC_STRUCT(nv50_screen
);
163 struct nouveau_stateobj
*so
;
164 unsigned tesla_class
= 0, ret
;
165 unsigned chipset
= nvws
->channel
->device
->chipset
;
172 /* DMA engine object */
173 ret
= nvws
->grobj_alloc(nvws
, 0x5039, &screen
->m2mf
);
175 NOUVEAU_ERR("Error creating M2MF object: %d\n", ret
);
176 nv50_screen_destroy(&screen
->pipe
);
181 ret
= nvws
->grobj_alloc(nvws
, NV50_2D
, &screen
->eng2d
);
183 NOUVEAU_ERR("Error creating 2D object: %d\n", ret
);
184 nv50_screen_destroy(&screen
->pipe
);
189 switch (chipset
& 0xf0) {
191 tesla_class
= 0x5097;
195 tesla_class
= 0x8297;
198 tesla_class
= 0x8397;
201 NOUVEAU_ERR("Not a known NV50 chipset: NV%02x\n", chipset
);
202 nv50_screen_destroy(&screen
->pipe
);
206 if (tesla_class
== 0) {
207 NOUVEAU_ERR("Unknown G8x chipset: NV%02x\n", chipset
);
208 nv50_screen_destroy(&screen
->pipe
);
212 ret
= nvws
->grobj_alloc(nvws
, tesla_class
, &screen
->tesla
);
214 NOUVEAU_ERR("Error creating 3D object: %d\n", ret
);
215 nv50_screen_destroy(&screen
->pipe
);
220 ret
= nvws
->notifier_alloc(nvws
, 1, &screen
->sync
);
222 NOUVEAU_ERR("Error creating notifier object: %d\n", ret
);
223 nv50_screen_destroy(&screen
->pipe
);
228 screen
->pipe
.winsys
= ws
;
230 screen
->pipe
.destroy
= nv50_screen_destroy
;
232 screen
->pipe
.get_name
= nv50_screen_get_name
;
233 screen
->pipe
.get_vendor
= nv50_screen_get_vendor
;
234 screen
->pipe
.get_param
= nv50_screen_get_param
;
235 screen
->pipe
.get_paramf
= nv50_screen_get_paramf
;
237 screen
->pipe
.is_format_supported
= nv50_screen_is_format_supported
;
239 nv50_screen_init_miptree_functions(&screen
->pipe
);
240 nv50_transfer_init_screen_functions(&screen
->pipe
);
241 u_simple_screen_init(&screen
->pipe
);
243 /* Static M2MF init */
245 so_method(so
, screen
->m2mf
, 0x0180, 3);
246 so_data (so
, screen
->sync
->handle
);
247 so_data (so
, screen
->nvws
->channel
->vram
->handle
);
248 so_data (so
, screen
->nvws
->channel
->vram
->handle
);
254 so_method(so
, screen
->eng2d
, NV50_2D_DMA_NOTIFY
, 4);
255 so_data (so
, screen
->sync
->handle
);
256 so_data (so
, screen
->nvws
->channel
->vram
->handle
);
257 so_data (so
, screen
->nvws
->channel
->vram
->handle
);
258 so_data (so
, screen
->nvws
->channel
->vram
->handle
);
259 so_method(so
, screen
->eng2d
, NV50_2D_OPERATION
, 1);
260 so_data (so
, NV50_2D_OPERATION_SRCCOPY
);
261 so_method(so
, screen
->eng2d
, 0x0290, 1);
263 so_method(so
, screen
->eng2d
, 0x0888, 1);
268 /* Static tesla init */
269 so
= so_new(256, 20);
271 so_method(so
, screen
->tesla
, 0x1558, 1);
273 so_method(so
, screen
->tesla
, NV50TCL_DMA_NOTIFY
, 1);
274 so_data (so
, screen
->sync
->handle
);
275 so_method(so
, screen
->tesla
, NV50TCL_DMA_UNK0(0),
276 NV50TCL_DMA_UNK0__SIZE
);
277 for (i
= 0; i
< NV50TCL_DMA_UNK0__SIZE
; i
++)
278 so_data(so
, nvws
->channel
->vram
->handle
);
279 so_method(so
, screen
->tesla
, NV50TCL_DMA_UNK1(0),
280 NV50TCL_DMA_UNK1__SIZE
);
281 for (i
= 0; i
< NV50TCL_DMA_UNK1__SIZE
; i
++)
282 so_data(so
, nvws
->channel
->vram
->handle
);
283 so_method(so
, screen
->tesla
, 0x121c, 1);
286 so_method(so
, screen
->tesla
, 0x13bc, 1);
288 so_method(so
, screen
->tesla
, 0x13ac, 1);
290 so_method(so
, screen
->tesla
, 0x16b8, 1);
293 /* constant buffers for immediates and VP/FP parameters */
294 screen
->constbuf_misc
[0] =
295 screen
->pipe
.buffer_create(&screen
->pipe
, 0, 0, 128 * 4 * 4);
297 screen
->constbuf_parm
[0] =
298 screen
->pipe
.buffer_create(&screen
->pipe
, 0, 0, 128 * 4 * 4);
300 screen
->constbuf_parm
[1] =
301 screen
->pipe
.buffer_create(&screen
->pipe
, 0, 0, 128 * 4 * 4);
303 if (nvws
->res_init(&screen
->immd_heap
[0], 0, 128) ||
304 nvws
->res_init(&screen
->parm_heap
[0], 0, 128) ||
305 nvws
->res_init(&screen
->parm_heap
[1], 0, 128))
307 NOUVEAU_ERR("Error initialising constant buffers.\n");
308 nv50_screen_destroy(&screen
->pipe
);
313 // map constant buffers:
314 // B = buffer ID (maybe more than 1 byte)
315 // N = CB index used in shader instruction
316 // P = program type (0 = VP, 2 = GP, 3 = FP)
317 so_method(so, screen->tesla, 0x1694, 1);
318 so_data (so, 0x000BBNP1);
321 so_method(so
, screen
->tesla
, 0x1280, 3);
322 so_reloc (so
, screen
->constbuf_misc
[0], 0, NOUVEAU_BO_VRAM
|
323 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
324 so_reloc (so
, screen
->constbuf_misc
[0], 0, NOUVEAU_BO_VRAM
|
325 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
326 so_data (so
, (NV50_CB_PMISC
<< 16) | 0x00000800);
327 so_method(so
, screen
->tesla
, 0x1694, 1);
328 so_data (so
, 0x00000001 | (NV50_CB_PMISC
<< 12));
329 so_method(so
, screen
->tesla
, 0x1694, 1);
330 so_data (so
, 0x00000031 | (NV50_CB_PMISC
<< 12));
332 so_method(so
, screen
->tesla
, 0x1280, 3);
333 so_reloc (so
, screen
->constbuf_parm
[0], 0, NOUVEAU_BO_VRAM
|
334 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
335 so_reloc (so
, screen
->constbuf_parm
[0], 0, NOUVEAU_BO_VRAM
|
336 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
337 so_data (so
, (NV50_CB_PVP
<< 16) | 0x00000800);
338 so_method(so
, screen
->tesla
, 0x1694, 1);
339 so_data (so
, 0x00000101 | (NV50_CB_PVP
<< 12));
341 so_method(so
, screen
->tesla
, 0x1280, 3);
342 so_reloc (so
, screen
->constbuf_parm
[1], 0, NOUVEAU_BO_VRAM
|
343 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
344 so_reloc (so
, screen
->constbuf_parm
[1], 0, NOUVEAU_BO_VRAM
|
345 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
346 so_data (so
, (NV50_CB_PFP
<< 16) | 0x00000800);
347 so_method(so
, screen
->tesla
, 0x1694, 1);
348 so_data (so
, 0x00000131 | (NV50_CB_PFP
<< 12));
350 /* Texture sampler/image unit setup - we abuse the constant buffer
351 * upload mechanism for the moment to upload data to the tex config
352 * blocks. At some point we *may* want to go the NVIDIA way of doing
355 screen
->tic
= screen
->pipe
.buffer_create(&screen
->pipe
, 0, 0, 32 * 8 * 4);
356 so_method(so
, screen
->tesla
, 0x1280, 3);
357 so_reloc (so
, screen
->tic
, 0, NOUVEAU_BO_VRAM
|
358 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
359 so_reloc (so
, screen
->tic
, 0, NOUVEAU_BO_VRAM
|
360 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
361 so_data (so
, (NV50_CB_TIC
<< 16) | 0x0800);
362 so_method(so
, screen
->tesla
, 0x1574, 3);
363 so_reloc (so
, screen
->tic
, 0, NOUVEAU_BO_VRAM
|
364 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
365 so_reloc (so
, screen
->tic
, 0, NOUVEAU_BO_VRAM
|
366 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
367 so_data (so
, 0x00000800);
369 screen
->tsc
= screen
->pipe
.buffer_create(&screen
->pipe
, 0, 0, 32 * 8 * 4);
370 so_method(so
, screen
->tesla
, 0x1280, 3);
371 so_reloc (so
, screen
->tsc
, 0, NOUVEAU_BO_VRAM
|
372 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
373 so_reloc (so
, screen
->tsc
, 0, NOUVEAU_BO_VRAM
|
374 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
375 so_data (so
, (NV50_CB_TSC
<< 16) | 0x0800);
376 so_method(so
, screen
->tesla
, 0x155c, 3);
377 so_reloc (so
, screen
->tsc
, 0, NOUVEAU_BO_VRAM
|
378 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
379 so_reloc (so
, screen
->tsc
, 0, NOUVEAU_BO_VRAM
|
380 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
381 so_data (so
, 0x00000800);
384 /* Vertex array limits - max them out */
385 for (i
= 0; i
< 16; i
++) {
386 so_method(so
, screen
->tesla
, 0x1080 + (i
* 8), 2);
387 so_data (so
, 0x000000ff);
388 so_data (so
, 0xffffffff);
391 so_method(so
, screen
->tesla
, NV50TCL_DEPTH_RANGE_NEAR
, 2);
392 so_data (so
, fui(0.0));
393 so_data (so
, fui(1.0));
395 so_method(so
, screen
->tesla
, 0x1234, 1);
397 so_method(so
, screen
->tesla
, 0x1458, 1);
401 so_ref (so
, &screen
->static_init
);
403 nouveau_pushbuf_flush(nvws
->channel
, 0);
405 return &screen
->pipe
;