2 * Copyright 2008 Ben Skeggs
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 #include "pipe/p_screen.h"
25 #include "nv50_context.h"
26 #include "nv50_screen.h"
28 #include "nouveau/nouveau_stateobj.h"
31 nv50_screen_is_format_supported(struct pipe_screen
*pscreen
,
32 enum pipe_format format
,
33 enum pipe_texture_target target
,
34 unsigned tex_usage
, unsigned geom_flags
)
36 if (tex_usage
& PIPE_TEXTURE_USAGE_RENDER_TARGET
) {
38 case PIPE_FORMAT_B8G8R8X8_UNORM
:
39 case PIPE_FORMAT_B8G8R8A8_UNORM
:
40 case PIPE_FORMAT_B5G6R5_UNORM
:
41 case PIPE_FORMAT_R16G16B16A16_SNORM
:
42 case PIPE_FORMAT_R16G16B16A16_UNORM
:
43 case PIPE_FORMAT_R32G32B32A32_FLOAT
:
44 case PIPE_FORMAT_R16G16_SNORM
:
45 case PIPE_FORMAT_R16G16_UNORM
:
51 if (tex_usage
& PIPE_TEXTURE_USAGE_DEPTH_STENCIL
) {
53 case PIPE_FORMAT_Z32_FLOAT
:
54 case PIPE_FORMAT_S8Z24_UNORM
:
55 case PIPE_FORMAT_Z24X8_UNORM
:
56 case PIPE_FORMAT_Z24S8_UNORM
:
63 case PIPE_FORMAT_B8G8R8A8_UNORM
:
64 case PIPE_FORMAT_B8G8R8X8_UNORM
:
65 case PIPE_FORMAT_B8G8R8A8_SRGB
:
66 case PIPE_FORMAT_B8G8R8X8_SRGB
:
67 case PIPE_FORMAT_B5G5R5A1_UNORM
:
68 case PIPE_FORMAT_B4G4R4A4_UNORM
:
69 case PIPE_FORMAT_B5G6R5_UNORM
:
70 case PIPE_FORMAT_L8_UNORM
:
71 case PIPE_FORMAT_A8_UNORM
:
72 case PIPE_FORMAT_I8_UNORM
:
73 case PIPE_FORMAT_L8A8_UNORM
:
74 case PIPE_FORMAT_DXT1_RGB
:
75 case PIPE_FORMAT_DXT1_RGBA
:
76 case PIPE_FORMAT_DXT3_RGBA
:
77 case PIPE_FORMAT_DXT5_RGBA
:
78 case PIPE_FORMAT_S8Z24_UNORM
:
79 case PIPE_FORMAT_Z24S8_UNORM
:
80 case PIPE_FORMAT_Z32_FLOAT
:
81 case PIPE_FORMAT_R16G16B16A16_SNORM
:
82 case PIPE_FORMAT_R16G16B16A16_UNORM
:
83 case PIPE_FORMAT_R32G32B32A32_FLOAT
:
84 case PIPE_FORMAT_R16G16_SNORM
:
85 case PIPE_FORMAT_R16G16_UNORM
:
96 nv50_screen_get_param(struct pipe_screen
*pscreen
, int param
)
98 struct nv50_screen
*screen
= nv50_screen(pscreen
);
101 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS
:
103 case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS
:
105 case PIPE_CAP_MAX_COMBINED_SAMPLERS
:
107 case PIPE_CAP_NPOT_TEXTURES
:
109 case PIPE_CAP_TWO_SIDED_STENCIL
:
113 case PIPE_CAP_ANISOTROPIC_FILTER
:
115 case PIPE_CAP_POINT_SPRITE
:
117 case PIPE_CAP_MAX_RENDER_TARGETS
:
119 case PIPE_CAP_OCCLUSION_QUERY
:
121 case PIPE_CAP_TEXTURE_SHADOW_MAP
:
123 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS
:
125 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS
:
127 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
:
129 case PIPE_CAP_TEXTURE_MIRROR_CLAMP
:
130 case PIPE_CAP_TEXTURE_MIRROR_REPEAT
:
132 case PIPE_CAP_TGSI_CONT_SUPPORTED
:
134 case PIPE_CAP_BLEND_EQUATION_SEPARATE
:
136 case NOUVEAU_CAP_HW_VTXBUF
:
137 return screen
->force_push
? 0 : 1;
138 case NOUVEAU_CAP_HW_IDXBUF
:
139 return screen
->force_push
? 0 : 1;
140 case PIPE_CAP_INDEP_BLEND_ENABLE
:
142 case PIPE_CAP_INDEP_BLEND_FUNC
:
144 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
:
145 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
:
147 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
:
148 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
:
151 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param
);
157 nv50_screen_get_paramf(struct pipe_screen
*pscreen
, int param
)
160 case PIPE_CAP_MAX_LINE_WIDTH
:
161 case PIPE_CAP_MAX_LINE_WIDTH_AA
:
163 case PIPE_CAP_MAX_POINT_WIDTH
:
164 case PIPE_CAP_MAX_POINT_WIDTH_AA
:
166 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY
:
168 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS
:
171 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param
);
177 nv50_screen_destroy(struct pipe_screen
*pscreen
)
179 struct nv50_screen
*screen
= nv50_screen(pscreen
);
182 for (i
= 0; i
< 3; i
++) {
183 if (screen
->constbuf_parm
[i
])
184 nouveau_bo_ref(NULL
, &screen
->constbuf_parm
[i
]);
187 if (screen
->constbuf_misc
[0])
188 nouveau_bo_ref(NULL
, &screen
->constbuf_misc
[0]);
190 nouveau_bo_ref(NULL
, &screen
->tic
);
192 nouveau_bo_ref(NULL
, &screen
->tsc
);
194 nouveau_notifier_free(&screen
->sync
);
195 nouveau_grobj_free(&screen
->tesla
);
196 nouveau_grobj_free(&screen
->eng2d
);
197 nouveau_grobj_free(&screen
->m2mf
);
198 nouveau_resource_destroy(&screen
->immd_heap
[0]);
199 nouveau_resource_destroy(&screen
->parm_heap
[0]);
200 nouveau_resource_destroy(&screen
->parm_heap
[1]);
201 nouveau_screen_fini(&screen
->base
);
205 #define BGN_RELOC(ch, bo, gr, m, n, fl) \
206 OUT_RELOC(ch, bo, (n << 18) | (gr->subc << 13) | m, fl, 0, 0)
209 nv50_screen_relocs(struct nv50_screen
*screen
)
211 struct nouveau_channel
*chan
= screen
->base
.channel
;
212 struct nouveau_grobj
*tesla
= screen
->tesla
;
214 const unsigned rl
= NOUVEAU_BO_VRAM
| NOUVEAU_BO_RD
| NOUVEAU_BO_DUMMY
;
216 MARK_RING (chan
, 28, 26);
218 /* cause grobj autobind */
219 BEGIN_RING(chan
, tesla
, 0x0100, 1);
222 BGN_RELOC (chan
, screen
->tic
, tesla
, NV50TCL_TIC_ADDRESS_HIGH
, 2, rl
);
223 OUT_RELOCh(chan
, screen
->tic
, 0, rl
);
224 OUT_RELOCl(chan
, screen
->tic
, 0, rl
);
226 BGN_RELOC (chan
, screen
->tsc
, tesla
, NV50TCL_TSC_ADDRESS_HIGH
, 2, rl
);
227 OUT_RELOCh(chan
, screen
->tsc
, 0, rl
);
228 OUT_RELOCl(chan
, screen
->tsc
, 0, rl
);
230 BGN_RELOC (chan
, screen
->constbuf_misc
[0],
231 tesla
, NV50TCL_CB_DEF_ADDRESS_HIGH
, 3, rl
);
232 OUT_RELOCh(chan
, screen
->constbuf_misc
[0], 0, rl
);
233 OUT_RELOCl(chan
, screen
->constbuf_misc
[0], 0, rl
);
234 OUT_RELOC (chan
, screen
->constbuf_misc
[0],
235 (NV50_CB_PMISC
<< 16) | 0x0200, rl
, 0, 0);
237 BGN_RELOC (chan
, screen
->constbuf_misc
[0],
238 tesla
, NV50TCL_CB_DEF_ADDRESS_HIGH
, 3, rl
);
239 OUT_RELOCh(chan
, screen
->constbuf_misc
[0], 0x200, rl
);
240 OUT_RELOCl(chan
, screen
->constbuf_misc
[0], 0x200, rl
);
241 OUT_RELOC (chan
, screen
->constbuf_misc
[0],
242 (NV50_CB_AUX
<< 16) | 0x0200, rl
, 0, 0);
244 for (i
= 0; i
< 3; ++i
) {
245 BGN_RELOC (chan
, screen
->constbuf_parm
[i
],
246 tesla
, NV50TCL_CB_DEF_ADDRESS_HIGH
, 3, rl
);
247 OUT_RELOCh(chan
, screen
->constbuf_parm
[i
], 0, rl
);
248 OUT_RELOCl(chan
, screen
->constbuf_parm
[i
], 0, rl
);
249 OUT_RELOC (chan
, screen
->constbuf_parm
[i
],
250 ((NV50_CB_PVP
+ i
) << 16) | 0x0800, rl
, 0, 0);
255 nv50_screen_create(struct pipe_winsys
*ws
, struct nouveau_device
*dev
)
257 struct nv50_screen
*screen
= CALLOC_STRUCT(nv50_screen
);
258 struct nouveau_channel
*chan
;
259 struct pipe_screen
*pscreen
;
260 unsigned chipset
= dev
->chipset
;
261 unsigned tesla_class
= 0;
263 const unsigned rl
= NOUVEAU_BO_VRAM
| NOUVEAU_BO_RD
;
267 pscreen
= &screen
->base
.base
;
269 ret
= nouveau_screen_init(&screen
->base
, dev
);
271 nv50_screen_destroy(pscreen
);
274 chan
= screen
->base
.channel
;
276 pscreen
->winsys
= ws
;
277 pscreen
->destroy
= nv50_screen_destroy
;
278 pscreen
->get_param
= nv50_screen_get_param
;
279 pscreen
->get_paramf
= nv50_screen_get_paramf
;
280 pscreen
->is_format_supported
= nv50_screen_is_format_supported
;
281 pscreen
->context_create
= nv50_create
;
283 nv50_screen_init_miptree_functions(pscreen
);
285 /* DMA engine object */
286 ret
= nouveau_grobj_alloc(chan
, 0xbeef5039,
287 NV50_MEMORY_TO_MEMORY_FORMAT
, &screen
->m2mf
);
289 NOUVEAU_ERR("Error creating M2MF object: %d\n", ret
);
290 nv50_screen_destroy(pscreen
);
295 ret
= nouveau_grobj_alloc(chan
, 0xbeef502d, NV50_2D
, &screen
->eng2d
);
297 NOUVEAU_ERR("Error creating 2D object: %d\n", ret
);
298 nv50_screen_destroy(pscreen
);
303 switch (chipset
& 0xf0) {
305 tesla_class
= NV50TCL
;
309 tesla_class
= NV84TCL
;
316 tesla_class
= NVA0TCL
;
319 tesla_class
= NVA8TCL
;
324 NOUVEAU_ERR("Not a known NV50 chipset: NV%02x\n", chipset
);
325 nv50_screen_destroy(pscreen
);
329 ret
= nouveau_grobj_alloc(chan
, 0xbeef5097, tesla_class
,
332 NOUVEAU_ERR("Error creating 3D object: %d\n", ret
);
333 nv50_screen_destroy(pscreen
);
338 ret
= nouveau_notifier_alloc(chan
, 0xbeef0301, 1, &screen
->sync
);
340 NOUVEAU_ERR("Error creating notifier object: %d\n", ret
);
341 nv50_screen_destroy(pscreen
);
345 /* Static M2MF init */
346 BEGIN_RING(chan
, screen
->m2mf
,
347 NV04_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY
, 3);
348 OUT_RING (chan
, screen
->sync
->handle
);
349 OUT_RING (chan
, chan
->vram
->handle
);
350 OUT_RING (chan
, chan
->vram
->handle
);
353 BEGIN_RING(chan
, screen
->eng2d
, NV50_2D_DMA_NOTIFY
, 4);
354 OUT_RING (chan
, screen
->sync
->handle
);
355 OUT_RING (chan
, chan
->vram
->handle
);
356 OUT_RING (chan
, chan
->vram
->handle
);
357 OUT_RING (chan
, chan
->vram
->handle
);
358 BEGIN_RING(chan
, screen
->eng2d
, NV50_2D_OPERATION
, 1);
359 OUT_RING (chan
, NV50_2D_OPERATION_SRCCOPY
);
360 BEGIN_RING(chan
, screen
->eng2d
, NV50_2D_CLIP_ENABLE
, 1);
362 BEGIN_RING(chan
, screen
->eng2d
, 0x0888, 1);
365 /* Static tesla init */
366 BEGIN_RING(chan
, screen
->tesla
, NV50TCL_COND_MODE
, 1);
367 OUT_RING (chan
, NV50TCL_COND_MODE_ALWAYS
);
368 BEGIN_RING(chan
, screen
->tesla
, NV50TCL_DMA_NOTIFY
, 1);
369 OUT_RING (chan
, screen
->sync
->handle
);
370 BEGIN_RING(chan
, screen
->tesla
, NV50TCL_DMA_ZETA
, 11);
371 for (i
= 0; i
< 11; i
++)
372 OUT_RING (chan
, chan
->vram
->handle
);
373 BEGIN_RING(chan
, screen
->tesla
,
374 NV50TCL_DMA_COLOR(0), NV50TCL_DMA_COLOR__SIZE
);
375 for (i
= 0; i
< NV50TCL_DMA_COLOR__SIZE
; i
++)
376 OUT_RING (chan
, chan
->vram
->handle
);
378 BEGIN_RING(chan
, screen
->tesla
, NV50TCL_RT_CONTROL
, 1);
381 /* activate all 32 lanes (threads) in a warp */
382 BEGIN_RING(chan
, screen
->tesla
, NV50TCL_WARP_HALVES
, 1);
384 BEGIN_RING(chan
, screen
->tesla
, 0x1400, 1);
385 OUT_RING (chan
, 0xf);
387 /* max TIC (bits 4:8) & TSC (ignored) bindings, per program type */
388 for (i
= 0; i
< 3; ++i
) {
389 BEGIN_RING(chan
, screen
->tesla
, NV50TCL_TEX_LIMITS(i
), 1);
390 OUT_RING (chan
, 0x54);
393 /* origin is top left (set to 1 for bottom left) */
394 BEGIN_RING(chan
, screen
->tesla
, NV50TCL_Y_ORIGIN_BOTTOM
, 1);
396 BEGIN_RING(chan
, screen
->tesla
, NV50TCL_VP_REG_ALLOC_RESULT
, 1);
399 /* constant buffers for immediates and VP/FP parameters */
400 ret
= nouveau_bo_new(dev
, NOUVEAU_BO_VRAM
, 0, (32 * 4) * 4,
401 &screen
->constbuf_misc
[0]);
403 nv50_screen_destroy(pscreen
);
406 BEGIN_RING(chan
, screen
->tesla
, NV50TCL_CB_DEF_ADDRESS_HIGH
, 3);
407 OUT_RELOCh(chan
, screen
->constbuf_misc
[0], 0, rl
);
408 OUT_RELOCl(chan
, screen
->constbuf_misc
[0], 0, rl
);
409 OUT_RING (chan
, (NV50_CB_PMISC
<< 16) | 0x0200);
410 BEGIN_RING(chan
, screen
->tesla
, NV50TCL_CB_DEF_ADDRESS_HIGH
, 3);
411 OUT_RELOCh(chan
, screen
->constbuf_misc
[0], 0x200, rl
);
412 OUT_RELOCl(chan
, screen
->constbuf_misc
[0], 0x200, rl
);
413 OUT_RING (chan
, (NV50_CB_AUX
<< 16) | 0x0200);
415 for (i
= 0; i
< 3; i
++) {
416 ret
= nouveau_bo_new(dev
, NOUVEAU_BO_VRAM
, 0, (256 * 4) * 4,
417 &screen
->constbuf_parm
[i
]);
419 nv50_screen_destroy(pscreen
);
422 BEGIN_RING(chan
, screen
->tesla
, NV50TCL_CB_DEF_ADDRESS_HIGH
, 3);
423 OUT_RELOCh(chan
, screen
->constbuf_parm
[i
], 0, rl
);
424 OUT_RELOCl(chan
, screen
->constbuf_parm
[i
], 0, rl
);
425 OUT_RING (chan
, ((NV50_CB_PVP
+ i
) << 16) | 0x0800);
428 if (nouveau_resource_init(&screen
->immd_heap
[0], 0, 128) ||
429 nouveau_resource_init(&screen
->parm_heap
[0], 0, 512) ||
430 nouveau_resource_init(&screen
->parm_heap
[1], 0, 512))
432 NOUVEAU_ERR("Error initialising constant buffers.\n");
433 nv50_screen_destroy(pscreen
);
437 ret
= nouveau_bo_new(dev
, NOUVEAU_BO_VRAM
, 0, 3 * 32 * (8 * 4),
440 nv50_screen_destroy(pscreen
);
443 BEGIN_RING(chan
, screen
->tesla
, NV50TCL_TIC_ADDRESS_HIGH
, 3);
444 OUT_RELOCh(chan
, screen
->tic
, 0, NOUVEAU_BO_VRAM
| NOUVEAU_BO_RD
);
445 OUT_RELOCl(chan
, screen
->tic
, 0, NOUVEAU_BO_VRAM
| NOUVEAU_BO_RD
);
446 OUT_RING (chan
, 3 * 32 - 1);
448 ret
= nouveau_bo_new(dev
, NOUVEAU_BO_VRAM
, 0, 3 * 32 * (8 * 4),
451 nv50_screen_destroy(pscreen
);
454 BEGIN_RING(chan
, screen
->tesla
, NV50TCL_TSC_ADDRESS_HIGH
, 3);
455 OUT_RELOCh(chan
, screen
->tsc
, 0, NOUVEAU_BO_VRAM
| NOUVEAU_BO_RD
);
456 OUT_RELOCl(chan
, screen
->tsc
, 0, NOUVEAU_BO_VRAM
| NOUVEAU_BO_RD
);
457 OUT_RING (chan
, 0); /* ignored if TSC_LINKED (0x1234) == 1 */
459 /* map constant buffers:
460 * B = buffer ID (maybe more than 1 byte)
461 * N = CB index used in shader instruction
462 * P = program type (0 = VP, 2 = GP, 3 = FP)
463 * SET_PROGRAM_CB = 0x000BBNP1
465 BEGIN_RING_NI(chan
, screen
->tesla
, NV50TCL_SET_PROGRAM_CB
, 8);
466 /* bind immediate buffer */
467 OUT_RING (chan
, 0x001 | (NV50_CB_PMISC
<< 12));
468 OUT_RING (chan
, 0x021 | (NV50_CB_PMISC
<< 12));
469 OUT_RING (chan
, 0x031 | (NV50_CB_PMISC
<< 12));
470 /* bind auxiliary constbuf to immediate data bo */
471 OUT_RING (chan
, 0x201 | (NV50_CB_AUX
<< 12));
472 OUT_RING (chan
, 0x221 | (NV50_CB_AUX
<< 12));
473 /* bind parameter buffers */
474 OUT_RING (chan
, 0x101 | (NV50_CB_PVP
<< 12));
475 OUT_RING (chan
, 0x121 | (NV50_CB_PGP
<< 12));
476 OUT_RING (chan
, 0x131 | (NV50_CB_PFP
<< 12));
478 /* Vertex array limits - max them out */
479 for (i
= 0; i
< 16; i
++) {
480 BEGIN_RING(chan
, screen
->tesla
,
481 NV50TCL_VERTEX_ARRAY_LIMIT_HIGH(i
), 2);
482 OUT_RING (chan
, 0x000000ff);
483 OUT_RING (chan
, 0xffffffff);
486 BEGIN_RING(chan
, screen
->tesla
, NV50TCL_DEPTH_RANGE_NEAR(0), 2);
487 OUT_RINGf (chan
, 0.0f
);
488 OUT_RINGf (chan
, 1.0f
);
490 /* no dynamic combination of TIC & TSC entries => only BIND_TIC used */
491 BEGIN_RING(chan
, screen
->tesla
, NV50TCL_LINKED_TSC
, 1);
494 BEGIN_RING(chan
, screen
->tesla
, NV50TCL_EDGEFLAG_ENABLE
, 1);
495 OUT_RING (chan
, 1); /* default edgeflag to TRUE */
499 screen
->force_push
= debug_get_bool_option("NV50_ALWAYS_PUSH", FALSE
);