2 * Copyright 2008 Ben Skeggs
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 #include "pipe/p_screen.h"
25 #include "nv50_context.h"
26 #include "nv50_screen.h"
28 #include "nouveau/nouveau_stateobj.h"
31 nv50_screen_is_format_supported(struct pipe_screen
*pscreen
,
32 enum pipe_format format
,
33 enum pipe_texture_target target
,
34 unsigned tex_usage
, unsigned geom_flags
)
36 if (tex_usage
& PIPE_TEXTURE_USAGE_RENDER_TARGET
) {
38 case PIPE_FORMAT_A8R8G8B8_UNORM
:
39 case PIPE_FORMAT_R5G6B5_UNORM
:
40 case PIPE_FORMAT_Z24S8_UNORM
:
41 case PIPE_FORMAT_Z16_UNORM
:
48 case PIPE_FORMAT_A8R8G8B8_UNORM
:
49 case PIPE_FORMAT_A1R5G5B5_UNORM
:
50 case PIPE_FORMAT_A4R4G4B4_UNORM
:
51 case PIPE_FORMAT_R5G6B5_UNORM
:
52 case PIPE_FORMAT_L8_UNORM
:
53 case PIPE_FORMAT_A8_UNORM
:
54 case PIPE_FORMAT_I8_UNORM
:
55 case PIPE_FORMAT_A8L8_UNORM
:
56 case PIPE_FORMAT_DXT1_RGB
:
57 case PIPE_FORMAT_DXT1_RGBA
:
58 case PIPE_FORMAT_DXT3_RGBA
:
59 case PIPE_FORMAT_DXT5_RGBA
:
70 nv50_screen_get_param(struct pipe_screen
*pscreen
, int param
)
73 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS
:
75 case PIPE_CAP_NPOT_TEXTURES
:
77 case PIPE_CAP_TWO_SIDED_STENCIL
:
83 case PIPE_CAP_ANISOTROPIC_FILTER
:
85 case PIPE_CAP_POINT_SPRITE
:
87 case PIPE_CAP_MAX_RENDER_TARGETS
:
89 case PIPE_CAP_OCCLUSION_QUERY
:
91 case PIPE_CAP_TEXTURE_SHADOW_MAP
:
93 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS
:
95 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS
:
97 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
:
99 case PIPE_CAP_TEXTURE_MIRROR_CLAMP
:
100 case PIPE_CAP_TEXTURE_MIRROR_REPEAT
:
102 case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS
:
104 case NOUVEAU_CAP_HW_VTXBUF
:
106 case NOUVEAU_CAP_HW_IDXBUF
:
109 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param
);
115 nv50_screen_get_paramf(struct pipe_screen
*pscreen
, int param
)
118 case PIPE_CAP_MAX_LINE_WIDTH
:
119 case PIPE_CAP_MAX_LINE_WIDTH_AA
:
121 case PIPE_CAP_MAX_POINT_WIDTH
:
122 case PIPE_CAP_MAX_POINT_WIDTH_AA
:
124 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY
:
126 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS
:
129 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param
);
135 nv50_screen_destroy(struct pipe_screen
*pscreen
)
137 struct nv50_screen
*screen
= nv50_screen(pscreen
);
139 nouveau_notifier_free(&screen
->sync
);
140 nouveau_grobj_free(&screen
->tesla
);
141 nouveau_grobj_free(&screen
->eng2d
);
142 nouveau_grobj_free(&screen
->m2mf
);
143 nouveau_screen_fini(&screen
->base
);
148 nv50_screen_create(struct pipe_winsys
*ws
, struct nouveau_device
*dev
)
150 struct nv50_screen
*screen
= CALLOC_STRUCT(nv50_screen
);
151 struct nouveau_channel
*chan
;
152 struct pipe_screen
*pscreen
;
153 struct nouveau_stateobj
*so
;
154 unsigned chipset
= dev
->chipset
;
155 unsigned tesla_class
= 0;
160 pscreen
= &screen
->base
.base
;
162 ret
= nouveau_screen_init(&screen
->base
, dev
);
164 nv50_screen_destroy(pscreen
);
167 chan
= screen
->base
.channel
;
169 pscreen
->winsys
= ws
;
170 pscreen
->destroy
= nv50_screen_destroy
;
171 pscreen
->get_param
= nv50_screen_get_param
;
172 pscreen
->get_paramf
= nv50_screen_get_paramf
;
173 pscreen
->is_format_supported
= nv50_screen_is_format_supported
;
175 nv50_screen_init_miptree_functions(pscreen
);
176 nv50_transfer_init_screen_functions(pscreen
);
178 /* DMA engine object */
179 ret
= nouveau_grobj_alloc(chan
, 0xbeef5039, 0x5039, &screen
->m2mf
);
181 NOUVEAU_ERR("Error creating M2MF object: %d\n", ret
);
182 nv50_screen_destroy(pscreen
);
185 BIND_RING(chan
, screen
->m2mf
, 1);
188 ret
= nouveau_grobj_alloc(chan
, 0xbeef502d, 0x502d, &screen
->eng2d
);
190 NOUVEAU_ERR("Error creating 2D object: %d\n", ret
);
191 nv50_screen_destroy(pscreen
);
194 BIND_RING(chan
, screen
->eng2d
, 2);
197 switch (chipset
& 0xf0) {
199 tesla_class
= 0x5097;
203 tesla_class
= 0x8297;
206 tesla_class
= 0x8397;
209 NOUVEAU_ERR("Not a known NV50 chipset: NV%02x\n", chipset
);
210 nv50_screen_destroy(pscreen
);
214 if (tesla_class
== 0) {
215 NOUVEAU_ERR("Unknown G8x chipset: NV%02x\n", chipset
);
216 nv50_screen_destroy(pscreen
);
220 ret
= nouveau_grobj_alloc(chan
, 0xbeef5097, tesla_class
, &screen
->tesla
);
222 NOUVEAU_ERR("Error creating 3D object: %d\n", ret
);
223 nv50_screen_destroy(pscreen
);
226 BIND_RING(chan
, screen
->tesla
, 3);
229 ret
= nouveau_notifier_alloc(chan
, 0xbeef0301, 1, &screen
->sync
);
231 NOUVEAU_ERR("Error creating notifier object: %d\n", ret
);
232 nv50_screen_destroy(pscreen
);
236 /* Static M2MF init */
238 so_method(so
, screen
->m2mf
, 0x0180, 3);
239 so_data (so
, screen
->sync
->handle
);
240 so_data (so
, chan
->vram
->handle
);
241 so_data (so
, chan
->vram
->handle
);
247 so_method(so
, screen
->eng2d
, NV50_2D_DMA_NOTIFY
, 4);
248 so_data (so
, screen
->sync
->handle
);
249 so_data (so
, chan
->vram
->handle
);
250 so_data (so
, chan
->vram
->handle
);
251 so_data (so
, chan
->vram
->handle
);
252 so_method(so
, screen
->eng2d
, NV50_2D_OPERATION
, 1);
253 so_data (so
, NV50_2D_OPERATION_SRCCOPY
);
254 so_method(so
, screen
->eng2d
, 0x0290, 1);
256 so_method(so
, screen
->eng2d
, 0x0888, 1);
261 /* Static tesla init */
262 so
= so_new(256, 20);
264 so_method(so
, screen
->tesla
, 0x1558, 1);
266 so_method(so
, screen
->tesla
, NV50TCL_DMA_NOTIFY
, 1);
267 so_data (so
, screen
->sync
->handle
);
268 so_method(so
, screen
->tesla
, NV50TCL_DMA_UNK0(0),
269 NV50TCL_DMA_UNK0__SIZE
);
270 for (i
= 0; i
< NV50TCL_DMA_UNK0__SIZE
; i
++)
271 so_data(so
, chan
->vram
->handle
);
272 so_method(so
, screen
->tesla
, NV50TCL_DMA_UNK1(0),
273 NV50TCL_DMA_UNK1__SIZE
);
274 for (i
= 0; i
< NV50TCL_DMA_UNK1__SIZE
; i
++)
275 so_data(so
, chan
->vram
->handle
);
276 so_method(so
, screen
->tesla
, 0x121c, 1);
279 so_method(so
, screen
->tesla
, 0x13bc, 1);
281 so_method(so
, screen
->tesla
, 0x13ac, 1);
283 so_method(so
, screen
->tesla
, 0x16b8, 1);
286 /* constant buffers for immediates and VP/FP parameters */
287 ret
= nouveau_bo_new(dev
, NOUVEAU_BO_VRAM
, 0, 128*4*4,
288 &screen
->constbuf_misc
[0]);
290 nv50_screen_destroy(pscreen
);
294 for (i
= 0; i
< 2; i
++) {
295 ret
= nouveau_bo_new(dev
, NOUVEAU_BO_VRAM
, 0, 128*4*4,
296 &screen
->constbuf_parm
[i
]);
298 nv50_screen_destroy(pscreen
);
303 if (nouveau_resource_init(&screen
->immd_heap
[0], 0, 128) ||
304 nouveau_resource_init(&screen
->parm_heap
[0], 0, 128) ||
305 nouveau_resource_init(&screen
->parm_heap
[1], 0, 128))
307 NOUVEAU_ERR("Error initialising constant buffers.\n");
308 nv50_screen_destroy(pscreen
);
313 // map constant buffers:
314 // B = buffer ID (maybe more than 1 byte)
315 // N = CB index used in shader instruction
316 // P = program type (0 = VP, 2 = GP, 3 = FP)
317 so_method(so, screen->tesla, 0x1694, 1);
318 so_data (so, 0x000BBNP1);
321 so_method(so
, screen
->tesla
, 0x1280, 3);
322 so_reloc (so
, screen
->constbuf_misc
[0], 0, NOUVEAU_BO_VRAM
|
323 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
324 so_reloc (so
, screen
->constbuf_misc
[0], 0, NOUVEAU_BO_VRAM
|
325 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
326 so_data (so
, (NV50_CB_PMISC
<< 16) | 0x00000800);
327 so_method(so
, screen
->tesla
, 0x1694, 1);
328 so_data (so
, 0x00000001 | (NV50_CB_PMISC
<< 12));
329 so_method(so
, screen
->tesla
, 0x1694, 1);
330 so_data (so
, 0x00000031 | (NV50_CB_PMISC
<< 12));
332 so_method(so
, screen
->tesla
, 0x1280, 3);
333 so_reloc (so
, screen
->constbuf_parm
[0], 0, NOUVEAU_BO_VRAM
|
334 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
335 so_reloc (so
, screen
->constbuf_parm
[0], 0, NOUVEAU_BO_VRAM
|
336 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
337 so_data (so
, (NV50_CB_PVP
<< 16) | 0x00000800);
338 so_method(so
, screen
->tesla
, 0x1694, 1);
339 so_data (so
, 0x00000101 | (NV50_CB_PVP
<< 12));
341 so_method(so
, screen
->tesla
, 0x1280, 3);
342 so_reloc (so
, screen
->constbuf_parm
[1], 0, NOUVEAU_BO_VRAM
|
343 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
344 so_reloc (so
, screen
->constbuf_parm
[1], 0, NOUVEAU_BO_VRAM
|
345 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
346 so_data (so
, (NV50_CB_PFP
<< 16) | 0x00000800);
347 so_method(so
, screen
->tesla
, 0x1694, 1);
348 so_data (so
, 0x00000131 | (NV50_CB_PFP
<< 12));
350 /* Texture sampler/image unit setup - we abuse the constant buffer
351 * upload mechanism for the moment to upload data to the tex config
352 * blocks. At some point we *may* want to go the NVIDIA way of doing
355 ret
= nouveau_bo_new(dev
, NOUVEAU_BO_VRAM
, 0, 32*8*4, &screen
->tic
);
357 nv50_screen_destroy(pscreen
);
361 so_method(so
, screen
->tesla
, 0x1280, 3);
362 so_reloc (so
, screen
->tic
, 0, NOUVEAU_BO_VRAM
|
363 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
364 so_reloc (so
, screen
->tic
, 0, NOUVEAU_BO_VRAM
|
365 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
366 so_data (so
, (NV50_CB_TIC
<< 16) | 0x0800);
367 so_method(so
, screen
->tesla
, 0x1574, 3);
368 so_reloc (so
, screen
->tic
, 0, NOUVEAU_BO_VRAM
|
369 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
370 so_reloc (so
, screen
->tic
, 0, NOUVEAU_BO_VRAM
|
371 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
372 so_data (so
, 0x00000800);
374 ret
= nouveau_bo_new(dev
, NOUVEAU_BO_VRAM
, 0, 32*8*4, &screen
->tsc
);
376 nv50_screen_destroy(pscreen
);
380 so_method(so
, screen
->tesla
, 0x1280, 3);
381 so_reloc (so
, screen
->tsc
, 0, NOUVEAU_BO_VRAM
|
382 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
383 so_reloc (so
, screen
->tsc
, 0, NOUVEAU_BO_VRAM
|
384 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
385 so_data (so
, (NV50_CB_TSC
<< 16) | 0x0800);
386 so_method(so
, screen
->tesla
, 0x155c, 3);
387 so_reloc (so
, screen
->tsc
, 0, NOUVEAU_BO_VRAM
|
388 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
389 so_reloc (so
, screen
->tsc
, 0, NOUVEAU_BO_VRAM
|
390 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
391 so_data (so
, 0x00000800);
394 /* Vertex array limits - max them out */
395 for (i
= 0; i
< 16; i
++) {
396 so_method(so
, screen
->tesla
, 0x1080 + (i
* 8), 2);
397 so_data (so
, 0x000000ff);
398 so_data (so
, 0xffffffff);
401 so_method(so
, screen
->tesla
, NV50TCL_DEPTH_RANGE_NEAR
, 2);
402 so_data (so
, fui(0.0));
403 so_data (so
, fui(1.0));
405 so_method(so
, screen
->tesla
, 0x1234, 1);
409 so_ref (so
, &screen
->static_init
);
411 nouveau_pushbuf_flush(chan
, 0);