nv50: support vertex program textures
[mesa.git] / src / gallium / drivers / nv50 / nv50_screen.c
1 /*
2 * Copyright 2008 Ben Skeggs
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 * SOFTWARE.
21 */
22
23 #include "pipe/p_screen.h"
24
25 #include "nv50_context.h"
26 #include "nv50_screen.h"
27
28 #include "nouveau/nouveau_stateobj.h"
29
30 static boolean
31 nv50_screen_is_format_supported(struct pipe_screen *pscreen,
32 enum pipe_format format,
33 enum pipe_texture_target target,
34 unsigned tex_usage, unsigned geom_flags)
35 {
36 if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) {
37 switch (format) {
38 case PIPE_FORMAT_X8R8G8B8_UNORM:
39 case PIPE_FORMAT_A8R8G8B8_UNORM:
40 case PIPE_FORMAT_R5G6B5_UNORM:
41 case PIPE_FORMAT_R16G16B16A16_SNORM:
42 case PIPE_FORMAT_R16G16B16A16_UNORM:
43 case PIPE_FORMAT_R32G32B32A32_FLOAT:
44 case PIPE_FORMAT_R16G16_SNORM:
45 case PIPE_FORMAT_R16G16_UNORM:
46 return TRUE;
47 default:
48 break;
49 }
50 } else
51 if (tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL) {
52 switch (format) {
53 case PIPE_FORMAT_Z32_FLOAT:
54 case PIPE_FORMAT_Z24S8_UNORM:
55 case PIPE_FORMAT_X8Z24_UNORM:
56 case PIPE_FORMAT_S8Z24_UNORM:
57 return TRUE;
58 default:
59 break;
60 }
61 } else {
62 switch (format) {
63 case PIPE_FORMAT_A8R8G8B8_UNORM:
64 case PIPE_FORMAT_X8R8G8B8_UNORM:
65 case PIPE_FORMAT_A8R8G8B8_SRGB:
66 case PIPE_FORMAT_X8R8G8B8_SRGB:
67 case PIPE_FORMAT_A1R5G5B5_UNORM:
68 case PIPE_FORMAT_A4R4G4B4_UNORM:
69 case PIPE_FORMAT_R5G6B5_UNORM:
70 case PIPE_FORMAT_L8_UNORM:
71 case PIPE_FORMAT_A8_UNORM:
72 case PIPE_FORMAT_I8_UNORM:
73 case PIPE_FORMAT_A8L8_UNORM:
74 case PIPE_FORMAT_DXT1_RGB:
75 case PIPE_FORMAT_DXT1_RGBA:
76 case PIPE_FORMAT_DXT3_RGBA:
77 case PIPE_FORMAT_DXT5_RGBA:
78 case PIPE_FORMAT_Z24S8_UNORM:
79 case PIPE_FORMAT_Z32_FLOAT:
80 case PIPE_FORMAT_R16G16B16A16_SNORM:
81 case PIPE_FORMAT_R16G16B16A16_UNORM:
82 case PIPE_FORMAT_R32G32B32A32_FLOAT:
83 case PIPE_FORMAT_R16G16_SNORM:
84 case PIPE_FORMAT_R16G16_UNORM:
85 return TRUE;
86 default:
87 break;
88 }
89 }
90
91 return FALSE;
92 }
93
94 static int
95 nv50_screen_get_param(struct pipe_screen *pscreen, int param)
96 {
97 switch (param) {
98 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
99 return 32;
100 case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
101 return 32;
102 case PIPE_CAP_MAX_COMBINED_SAMPLERS:
103 return 64;
104 case PIPE_CAP_NPOT_TEXTURES:
105 return 1;
106 case PIPE_CAP_TWO_SIDED_STENCIL:
107 return 1;
108 case PIPE_CAP_GLSL:
109 return 0;
110 case PIPE_CAP_ANISOTROPIC_FILTER:
111 return 1;
112 case PIPE_CAP_POINT_SPRITE:
113 return 1;
114 case PIPE_CAP_MAX_RENDER_TARGETS:
115 return 8;
116 case PIPE_CAP_OCCLUSION_QUERY:
117 return 1;
118 case PIPE_CAP_TEXTURE_SHADOW_MAP:
119 return 1;
120 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
121 return 13;
122 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
123 return 10;
124 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
125 return 13;
126 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
127 case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
128 return 1;
129 case PIPE_CAP_TGSI_CONT_SUPPORTED:
130 return 0;
131 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
132 return 1;
133 case NOUVEAU_CAP_HW_VTXBUF:
134 return 1;
135 case NOUVEAU_CAP_HW_IDXBUF:
136 return 0;
137 default:
138 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
139 return 0;
140 }
141 }
142
143 static float
144 nv50_screen_get_paramf(struct pipe_screen *pscreen, int param)
145 {
146 switch (param) {
147 case PIPE_CAP_MAX_LINE_WIDTH:
148 case PIPE_CAP_MAX_LINE_WIDTH_AA:
149 return 10.0;
150 case PIPE_CAP_MAX_POINT_WIDTH:
151 case PIPE_CAP_MAX_POINT_WIDTH_AA:
152 return 64.0;
153 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
154 return 16.0;
155 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
156 return 4.0;
157 default:
158 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
159 return 0.0;
160 }
161 }
162
163 static void
164 nv50_screen_destroy(struct pipe_screen *pscreen)
165 {
166 struct nv50_screen *screen = nv50_screen(pscreen);
167
168 nouveau_notifier_free(&screen->sync);
169 nouveau_grobj_free(&screen->tesla);
170 nouveau_grobj_free(&screen->eng2d);
171 nouveau_grobj_free(&screen->m2mf);
172 nouveau_screen_fini(&screen->base);
173 FREE(screen);
174 }
175
176 struct pipe_screen *
177 nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
178 {
179 struct nv50_screen *screen = CALLOC_STRUCT(nv50_screen);
180 struct nouveau_channel *chan;
181 struct pipe_screen *pscreen;
182 struct nouveau_stateobj *so;
183 unsigned chipset = dev->chipset;
184 unsigned tesla_class = 0;
185 int ret, i;
186
187 if (!screen)
188 return NULL;
189 pscreen = &screen->base.base;
190
191 ret = nouveau_screen_init(&screen->base, dev);
192 if (ret) {
193 nv50_screen_destroy(pscreen);
194 return NULL;
195 }
196 chan = screen->base.channel;
197
198 pscreen->winsys = ws;
199 pscreen->destroy = nv50_screen_destroy;
200 pscreen->get_param = nv50_screen_get_param;
201 pscreen->get_paramf = nv50_screen_get_paramf;
202 pscreen->is_format_supported = nv50_screen_is_format_supported;
203
204 nv50_screen_init_miptree_functions(pscreen);
205 nv50_transfer_init_screen_functions(pscreen);
206
207 /* DMA engine object */
208 ret = nouveau_grobj_alloc(chan, 0xbeef5039,
209 NV50_MEMORY_TO_MEMORY_FORMAT, &screen->m2mf);
210 if (ret) {
211 NOUVEAU_ERR("Error creating M2MF object: %d\n", ret);
212 nv50_screen_destroy(pscreen);
213 return NULL;
214 }
215 BIND_RING(chan, screen->m2mf, 1);
216
217 /* 2D object */
218 ret = nouveau_grobj_alloc(chan, 0xbeef502d, NV50_2D, &screen->eng2d);
219 if (ret) {
220 NOUVEAU_ERR("Error creating 2D object: %d\n", ret);
221 nv50_screen_destroy(pscreen);
222 return NULL;
223 }
224 BIND_RING(chan, screen->eng2d, 2);
225
226 /* 3D object */
227 switch (chipset & 0xf0) {
228 case 0x50:
229 tesla_class = NV50TCL;
230 break;
231 case 0x80:
232 case 0x90:
233 /* this stupid name should be corrected. */
234 tesla_class = NV54TCL;
235 break;
236 case 0xa0:
237 switch (chipset) {
238 case 0xa0:
239 case 0xaa:
240 case 0xac:
241 tesla_class = NVA0TCL;
242 break;
243 default:
244 tesla_class = 0x8597;
245 break;
246 }
247 break;
248 default:
249 NOUVEAU_ERR("Not a known NV50 chipset: NV%02x\n", chipset);
250 nv50_screen_destroy(pscreen);
251 return NULL;
252 }
253
254 ret = nouveau_grobj_alloc(chan, 0xbeef5097, tesla_class,
255 &screen->tesla);
256 if (ret) {
257 NOUVEAU_ERR("Error creating 3D object: %d\n", ret);
258 nv50_screen_destroy(pscreen);
259 return NULL;
260 }
261 BIND_RING(chan, screen->tesla, 3);
262
263 /* Sync notifier */
264 ret = nouveau_notifier_alloc(chan, 0xbeef0301, 1, &screen->sync);
265 if (ret) {
266 NOUVEAU_ERR("Error creating notifier object: %d\n", ret);
267 nv50_screen_destroy(pscreen);
268 return NULL;
269 }
270
271 /* Static M2MF init */
272 so = so_new(32, 0);
273 so_method(so, screen->m2mf, NV04_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY, 3);
274 so_data (so, screen->sync->handle);
275 so_data (so, chan->vram->handle);
276 so_data (so, chan->vram->handle);
277 so_emit(chan, so);
278 so_ref (NULL, &so);
279
280 /* Static 2D init */
281 so = so_new(64, 0);
282 so_method(so, screen->eng2d, NV50_2D_DMA_NOTIFY, 4);
283 so_data (so, screen->sync->handle);
284 so_data (so, chan->vram->handle);
285 so_data (so, chan->vram->handle);
286 so_data (so, chan->vram->handle);
287 so_method(so, screen->eng2d, NV50_2D_OPERATION, 1);
288 so_data (so, NV50_2D_OPERATION_SRCCOPY);
289 so_method(so, screen->eng2d, 0x0290, 1);
290 so_data (so, 0);
291 so_method(so, screen->eng2d, 0x0888, 1);
292 so_data (so, 1);
293 so_emit(chan, so);
294 so_ref(NULL, &so);
295
296 /* Static tesla init */
297 so = so_new(256, 20);
298
299 so_method(so, screen->tesla, 0x1558, 1);
300 so_data (so, 1);
301 so_method(so, screen->tesla, NV50TCL_DMA_NOTIFY, 1);
302 so_data (so, screen->sync->handle);
303 so_method(so, screen->tesla, NV50TCL_DMA_UNK0(0),
304 NV50TCL_DMA_UNK0__SIZE);
305 for (i = 0; i < NV50TCL_DMA_UNK0__SIZE; i++)
306 so_data(so, chan->vram->handle);
307 so_method(so, screen->tesla, NV50TCL_DMA_UNK1(0),
308 NV50TCL_DMA_UNK1__SIZE);
309 for (i = 0; i < NV50TCL_DMA_UNK1__SIZE; i++)
310 so_data(so, chan->vram->handle);
311 so_method(so, screen->tesla, 0x121c, 1);
312 so_data (so, 1);
313
314 /* activate all 32 lanes (threads) in a warp */
315 so_method(so, screen->tesla, 0x19a0, 1);
316 so_data (so, 0x2);
317 so_method(so, screen->tesla, 0x1400, 1);
318 so_data (so, 0xf);
319
320 /* max TIC (bits 4:8) & TSC (ignored) bindings, per program type */
321 so_method(so, screen->tesla, 0x13b4, 1);
322 so_data (so, 0x54);
323 so_method(so, screen->tesla, 0x13bc, 1);
324 so_data (so, 0x54);
325 /* origin is top left (set to 1 for bottom left) */
326 so_method(so, screen->tesla, 0x13ac, 1);
327 so_data (so, 0);
328 so_method(so, screen->tesla, NV50TCL_VP_REG_ALLOC_RESULT, 1);
329 so_data (so, 8);
330
331 /* constant buffers for immediates and VP/FP parameters */
332 ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 0, (32 * 4) * 4,
333 &screen->constbuf_misc[0]);
334 if (ret) {
335 nv50_screen_destroy(pscreen);
336 return NULL;
337 }
338
339 for (i = 0; i < 2; i++) {
340 ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 0, (128 * 4) * 4,
341 &screen->constbuf_parm[i]);
342 if (ret) {
343 nv50_screen_destroy(pscreen);
344 return NULL;
345 }
346 }
347
348 if (nouveau_resource_init(&screen->immd_heap[0], 0, 128) ||
349 nouveau_resource_init(&screen->parm_heap[0], 0, 512) ||
350 nouveau_resource_init(&screen->parm_heap[1], 0, 512))
351 {
352 NOUVEAU_ERR("Error initialising constant buffers.\n");
353 nv50_screen_destroy(pscreen);
354 return NULL;
355 }
356
357 /*
358 // map constant buffers:
359 // B = buffer ID (maybe more than 1 byte)
360 // N = CB index used in shader instruction
361 // P = program type (0 = VP, 2 = GP, 3 = FP)
362 so_method(so, screen->tesla, 0x1694, 1);
363 so_data (so, 0x000BBNP1);
364 */
365
366 so_method(so, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
367 so_reloc (so, screen->constbuf_misc[0], 0, NOUVEAU_BO_VRAM |
368 NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
369 so_reloc (so, screen->constbuf_misc[0], 0, NOUVEAU_BO_VRAM |
370 NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
371 so_data (so, (NV50_CB_PMISC << 16) | 0x00000200);
372 so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1);
373 so_data (so, 0x00000001 | (NV50_CB_PMISC << 12));
374 so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1);
375 so_data (so, 0x00000031 | (NV50_CB_PMISC << 12));
376
377 so_method(so, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
378 so_reloc (so, screen->constbuf_parm[0], 0, NOUVEAU_BO_VRAM |
379 NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
380 so_reloc (so, screen->constbuf_parm[0], 0, NOUVEAU_BO_VRAM |
381 NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
382 so_data (so, (NV50_CB_PVP << 16) | 0x00000800);
383 so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1);
384 so_data (so, 0x00000101 | (NV50_CB_PVP << 12));
385
386 so_method(so, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
387 so_reloc (so, screen->constbuf_parm[1], 0, NOUVEAU_BO_VRAM |
388 NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
389 so_reloc (so, screen->constbuf_parm[1], 0, NOUVEAU_BO_VRAM |
390 NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
391 so_data (so, (NV50_CB_PFP << 16) | 0x00000800);
392 so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1);
393 so_data (so, 0x00000131 | (NV50_CB_PFP << 12));
394
395 ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 0, PIPE_SHADER_TYPES*32*32,
396 &screen->tic);
397 if (ret) {
398 nv50_screen_destroy(pscreen);
399 return NULL;
400 }
401
402 so_method(so, screen->tesla, NV50TCL_TIC_ADDRESS_HIGH, 3);
403 so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
404 NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
405 so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
406 NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
407 so_data (so, PIPE_SHADER_TYPES * 32 - 1);
408
409 ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 0, PIPE_SHADER_TYPES*32*32,
410 &screen->tsc);
411 if (ret) {
412 nv50_screen_destroy(pscreen);
413 return NULL;
414 }
415
416 so_method(so, screen->tesla, NV50TCL_TSC_ADDRESS_HIGH, 3);
417 so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
418 NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
419 so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
420 NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
421 so_data (so, 0x00000000);
422
423
424 /* Vertex array limits - max them out */
425 for (i = 0; i < 16; i++) {
426 so_method(so, screen->tesla, NV50TCL_UNK1080_OFFSET_HIGH(i), 2);
427 so_data (so, 0x000000ff);
428 so_data (so, 0xffffffff);
429 }
430
431 so_method(so, screen->tesla, NV50TCL_DEPTH_RANGE_NEAR, 2);
432 so_data (so, fui(0.0));
433 so_data (so, fui(1.0));
434
435 so_method(so, screen->tesla, 0x1234, 1);
436 so_data (so, 1);
437
438 /* activate first scissor rectangle */
439 so_method(so, screen->tesla, NV50TCL_SCISSOR_ENABLE, 1);
440 so_data (so, 1);
441
442 so_emit(chan, so);
443 so_ref (so, &screen->static_init);
444 so_ref (NULL, &so);
445 nouveau_pushbuf_flush(chan, 0);
446
447 return pscreen;
448 }
449