2 * Copyright 2008 Ben Skeggs
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 #include "pipe/p_screen.h"
25 #include "nv50_context.h"
26 #include "nv50_screen.h"
28 #include "nouveau/nouveau_stateobj.h"
31 nv50_screen_is_format_supported(struct pipe_screen
*pscreen
,
32 enum pipe_format format
,
33 enum pipe_texture_target target
,
34 unsigned tex_usage
, unsigned geom_flags
)
36 if (tex_usage
& PIPE_TEXTURE_USAGE_RENDER_TARGET
) {
38 case PIPE_FORMAT_X8R8G8B8_UNORM
:
39 case PIPE_FORMAT_A8R8G8B8_UNORM
:
40 case PIPE_FORMAT_R5G6B5_UNORM
:
41 case PIPE_FORMAT_R16G16B16A16_SNORM
:
42 case PIPE_FORMAT_R16G16B16A16_UNORM
:
43 case PIPE_FORMAT_R32G32B32A32_FLOAT
:
44 case PIPE_FORMAT_R16G16_SNORM
:
45 case PIPE_FORMAT_R16G16_UNORM
:
51 if (tex_usage
& PIPE_TEXTURE_USAGE_DEPTH_STENCIL
) {
53 case PIPE_FORMAT_Z32_FLOAT
:
54 case PIPE_FORMAT_Z24S8_UNORM
:
55 case PIPE_FORMAT_X8Z24_UNORM
:
56 case PIPE_FORMAT_S8Z24_UNORM
:
63 case PIPE_FORMAT_A8R8G8B8_UNORM
:
64 case PIPE_FORMAT_X8R8G8B8_UNORM
:
65 case PIPE_FORMAT_A8R8G8B8_SRGB
:
66 case PIPE_FORMAT_X8R8G8B8_SRGB
:
67 case PIPE_FORMAT_A1R5G5B5_UNORM
:
68 case PIPE_FORMAT_A4R4G4B4_UNORM
:
69 case PIPE_FORMAT_R5G6B5_UNORM
:
70 case PIPE_FORMAT_L8_UNORM
:
71 case PIPE_FORMAT_A8_UNORM
:
72 case PIPE_FORMAT_I8_UNORM
:
73 case PIPE_FORMAT_A8L8_UNORM
:
74 case PIPE_FORMAT_DXT1_RGB
:
75 case PIPE_FORMAT_DXT1_RGBA
:
76 case PIPE_FORMAT_DXT3_RGBA
:
77 case PIPE_FORMAT_DXT5_RGBA
:
78 case PIPE_FORMAT_Z24S8_UNORM
:
79 case PIPE_FORMAT_Z32_FLOAT
:
80 case PIPE_FORMAT_R16G16B16A16_SNORM
:
81 case PIPE_FORMAT_R16G16B16A16_UNORM
:
82 case PIPE_FORMAT_R32G32B32A32_FLOAT
:
83 case PIPE_FORMAT_R16G16_SNORM
:
84 case PIPE_FORMAT_R16G16_UNORM
:
95 nv50_screen_get_param(struct pipe_screen
*pscreen
, int param
)
98 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS
:
100 case PIPE_CAP_NPOT_TEXTURES
:
102 case PIPE_CAP_TWO_SIDED_STENCIL
:
106 case PIPE_CAP_ANISOTROPIC_FILTER
:
108 case PIPE_CAP_POINT_SPRITE
:
110 case PIPE_CAP_MAX_RENDER_TARGETS
:
112 case PIPE_CAP_OCCLUSION_QUERY
:
114 case PIPE_CAP_TEXTURE_SHADOW_MAP
:
116 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS
:
118 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS
:
120 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
:
122 case PIPE_CAP_TEXTURE_MIRROR_CLAMP
:
123 case PIPE_CAP_TEXTURE_MIRROR_REPEAT
:
125 case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS
:
127 case PIPE_CAP_TGSI_CONT_SUPPORTED
:
129 case PIPE_CAP_BLEND_EQUATION_SEPARATE
:
131 case NOUVEAU_CAP_HW_VTXBUF
:
133 case NOUVEAU_CAP_HW_IDXBUF
:
136 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param
);
142 nv50_screen_get_paramf(struct pipe_screen
*pscreen
, int param
)
145 case PIPE_CAP_MAX_LINE_WIDTH
:
146 case PIPE_CAP_MAX_LINE_WIDTH_AA
:
148 case PIPE_CAP_MAX_POINT_WIDTH
:
149 case PIPE_CAP_MAX_POINT_WIDTH_AA
:
151 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY
:
153 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS
:
156 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param
);
162 nv50_screen_destroy(struct pipe_screen
*pscreen
)
164 struct nv50_screen
*screen
= nv50_screen(pscreen
);
166 nouveau_notifier_free(&screen
->sync
);
167 nouveau_grobj_free(&screen
->tesla
);
168 nouveau_grobj_free(&screen
->eng2d
);
169 nouveau_grobj_free(&screen
->m2mf
);
170 nouveau_screen_fini(&screen
->base
);
175 nv50_screen_create(struct pipe_winsys
*ws
, struct nouveau_device
*dev
)
177 struct nv50_screen
*screen
= CALLOC_STRUCT(nv50_screen
);
178 struct nouveau_channel
*chan
;
179 struct pipe_screen
*pscreen
;
180 struct nouveau_stateobj
*so
;
181 unsigned chipset
= dev
->chipset
;
182 unsigned tesla_class
= 0;
187 pscreen
= &screen
->base
.base
;
189 ret
= nouveau_screen_init(&screen
->base
, dev
);
191 nv50_screen_destroy(pscreen
);
194 chan
= screen
->base
.channel
;
196 pscreen
->winsys
= ws
;
197 pscreen
->destroy
= nv50_screen_destroy
;
198 pscreen
->get_param
= nv50_screen_get_param
;
199 pscreen
->get_paramf
= nv50_screen_get_paramf
;
200 pscreen
->is_format_supported
= nv50_screen_is_format_supported
;
202 nv50_screen_init_miptree_functions(pscreen
);
203 nv50_transfer_init_screen_functions(pscreen
);
205 /* DMA engine object */
206 ret
= nouveau_grobj_alloc(chan
, 0xbeef5039,
207 NV50_MEMORY_TO_MEMORY_FORMAT
, &screen
->m2mf
);
209 NOUVEAU_ERR("Error creating M2MF object: %d\n", ret
);
210 nv50_screen_destroy(pscreen
);
213 BIND_RING(chan
, screen
->m2mf
, 1);
216 ret
= nouveau_grobj_alloc(chan
, 0xbeef502d, NV50_2D
, &screen
->eng2d
);
218 NOUVEAU_ERR("Error creating 2D object: %d\n", ret
);
219 nv50_screen_destroy(pscreen
);
222 BIND_RING(chan
, screen
->eng2d
, 2);
225 switch (chipset
& 0xf0) {
227 tesla_class
= NV50TCL
;
231 /* this stupid name should be corrected. */
232 tesla_class
= NV54TCL
;
239 tesla_class
= NVA0TCL
;
242 tesla_class
= 0x8597;
247 NOUVEAU_ERR("Not a known NV50 chipset: NV%02x\n", chipset
);
248 nv50_screen_destroy(pscreen
);
252 ret
= nouveau_grobj_alloc(chan
, 0xbeef5097, tesla_class
,
255 NOUVEAU_ERR("Error creating 3D object: %d\n", ret
);
256 nv50_screen_destroy(pscreen
);
259 BIND_RING(chan
, screen
->tesla
, 3);
262 ret
= nouveau_notifier_alloc(chan
, 0xbeef0301, 1, &screen
->sync
);
264 NOUVEAU_ERR("Error creating notifier object: %d\n", ret
);
265 nv50_screen_destroy(pscreen
);
269 /* Static M2MF init */
271 so_method(so
, screen
->m2mf
, NV04_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY
, 3);
272 so_data (so
, screen
->sync
->handle
);
273 so_data (so
, chan
->vram
->handle
);
274 so_data (so
, chan
->vram
->handle
);
280 so_method(so
, screen
->eng2d
, NV50_2D_DMA_NOTIFY
, 4);
281 so_data (so
, screen
->sync
->handle
);
282 so_data (so
, chan
->vram
->handle
);
283 so_data (so
, chan
->vram
->handle
);
284 so_data (so
, chan
->vram
->handle
);
285 so_method(so
, screen
->eng2d
, NV50_2D_OPERATION
, 1);
286 so_data (so
, NV50_2D_OPERATION_SRCCOPY
);
287 so_method(so
, screen
->eng2d
, 0x0290, 1);
289 so_method(so
, screen
->eng2d
, 0x0888, 1);
294 /* Static tesla init */
295 so
= so_new(256, 20);
297 so_method(so
, screen
->tesla
, 0x1558, 1);
299 so_method(so
, screen
->tesla
, NV50TCL_DMA_NOTIFY
, 1);
300 so_data (so
, screen
->sync
->handle
);
301 so_method(so
, screen
->tesla
, NV50TCL_DMA_UNK0(0),
302 NV50TCL_DMA_UNK0__SIZE
);
303 for (i
= 0; i
< NV50TCL_DMA_UNK0__SIZE
; i
++)
304 so_data(so
, chan
->vram
->handle
);
305 so_method(so
, screen
->tesla
, NV50TCL_DMA_UNK1(0),
306 NV50TCL_DMA_UNK1__SIZE
);
307 for (i
= 0; i
< NV50TCL_DMA_UNK1__SIZE
; i
++)
308 so_data(so
, chan
->vram
->handle
);
309 so_method(so
, screen
->tesla
, 0x121c, 1);
312 /* activate all 32 lanes (threads) in a warp */
313 so_method(so
, screen
->tesla
, 0x19a0, 1);
315 so_method(so
, screen
->tesla
, 0x1400, 1);
318 so_method(so
, screen
->tesla
, 0x13bc, 1);
320 /* origin is top left (set to 1 for bottom left) */
321 so_method(so
, screen
->tesla
, 0x13ac, 1);
323 so_method(so
, screen
->tesla
, NV50TCL_VP_REG_ALLOC_RESULT
, 1);
326 /* constant buffers for immediates and VP/FP parameters */
327 ret
= nouveau_bo_new(dev
, NOUVEAU_BO_VRAM
, 0, (32 * 4) * 4,
328 &screen
->constbuf_misc
[0]);
330 nv50_screen_destroy(pscreen
);
334 for (i
= 0; i
< 2; i
++) {
335 ret
= nouveau_bo_new(dev
, NOUVEAU_BO_VRAM
, 0, (128 * 4) * 4,
336 &screen
->constbuf_parm
[i
]);
338 nv50_screen_destroy(pscreen
);
343 if (nouveau_resource_init(&screen
->immd_heap
[0], 0, 128) ||
344 nouveau_resource_init(&screen
->parm_heap
[0], 0, 512) ||
345 nouveau_resource_init(&screen
->parm_heap
[1], 0, 512))
347 NOUVEAU_ERR("Error initialising constant buffers.\n");
348 nv50_screen_destroy(pscreen
);
353 // map constant buffers:
354 // B = buffer ID (maybe more than 1 byte)
355 // N = CB index used in shader instruction
356 // P = program type (0 = VP, 2 = GP, 3 = FP)
357 so_method(so, screen->tesla, 0x1694, 1);
358 so_data (so, 0x000BBNP1);
361 so_method(so
, screen
->tesla
, NV50TCL_CB_DEF_ADDRESS_HIGH
, 3);
362 so_reloc (so
, screen
->constbuf_misc
[0], 0, NOUVEAU_BO_VRAM
|
363 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
364 so_reloc (so
, screen
->constbuf_misc
[0], 0, NOUVEAU_BO_VRAM
|
365 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
366 so_data (so
, (NV50_CB_PMISC
<< 16) | 0x00000200);
367 so_method(so
, screen
->tesla
, NV50TCL_SET_PROGRAM_CB
, 1);
368 so_data (so
, 0x00000001 | (NV50_CB_PMISC
<< 12));
369 so_method(so
, screen
->tesla
, NV50TCL_SET_PROGRAM_CB
, 1);
370 so_data (so
, 0x00000031 | (NV50_CB_PMISC
<< 12));
372 so_method(so
, screen
->tesla
, NV50TCL_CB_DEF_ADDRESS_HIGH
, 3);
373 so_reloc (so
, screen
->constbuf_parm
[0], 0, NOUVEAU_BO_VRAM
|
374 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
375 so_reloc (so
, screen
->constbuf_parm
[0], 0, NOUVEAU_BO_VRAM
|
376 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
377 so_data (so
, (NV50_CB_PVP
<< 16) | 0x00000800);
378 so_method(so
, screen
->tesla
, NV50TCL_SET_PROGRAM_CB
, 1);
379 so_data (so
, 0x00000101 | (NV50_CB_PVP
<< 12));
381 so_method(so
, screen
->tesla
, NV50TCL_CB_DEF_ADDRESS_HIGH
, 3);
382 so_reloc (so
, screen
->constbuf_parm
[1], 0, NOUVEAU_BO_VRAM
|
383 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
384 so_reloc (so
, screen
->constbuf_parm
[1], 0, NOUVEAU_BO_VRAM
|
385 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
386 so_data (so
, (NV50_CB_PFP
<< 16) | 0x00000800);
387 so_method(so
, screen
->tesla
, NV50TCL_SET_PROGRAM_CB
, 1);
388 so_data (so
, 0x00000131 | (NV50_CB_PFP
<< 12));
390 ret
= nouveau_bo_new(dev
, NOUVEAU_BO_VRAM
, 0, 64*8*4, &screen
->tic
);
392 nv50_screen_destroy(pscreen
);
396 so_method(so
, screen
->tesla
, NV50TCL_TIC_ADDRESS_HIGH
, 3);
397 so_reloc (so
, screen
->tic
, 0, NOUVEAU_BO_VRAM
|
398 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
399 so_reloc (so
, screen
->tic
, 0, NOUVEAU_BO_VRAM
|
400 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
401 so_data (so
, 0x000007ff);
403 ret
= nouveau_bo_new(dev
, NOUVEAU_BO_VRAM
, 0, 64*8*4, &screen
->tsc
);
405 nv50_screen_destroy(pscreen
);
409 so_method(so
, screen
->tesla
, NV50TCL_TSC_ADDRESS_HIGH
, 3);
410 so_reloc (so
, screen
->tsc
, 0, NOUVEAU_BO_VRAM
|
411 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
412 so_reloc (so
, screen
->tsc
, 0, NOUVEAU_BO_VRAM
|
413 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
414 so_data (so
, 0x00000000);
417 /* Vertex array limits - max them out */
418 for (i
= 0; i
< 16; i
++) {
419 so_method(so
, screen
->tesla
, NV50TCL_UNK1080_OFFSET_HIGH(i
), 2);
420 so_data (so
, 0x000000ff);
421 so_data (so
, 0xffffffff);
424 so_method(so
, screen
->tesla
, NV50TCL_DEPTH_RANGE_NEAR
, 2);
425 so_data (so
, fui(0.0));
426 so_data (so
, fui(1.0));
428 so_method(so
, screen
->tesla
, 0x1234, 1);
431 /* activate first scissor rectangle */
432 so_method(so
, screen
->tesla
, NV50TCL_SCISSOR_ENABLE
, 1);
436 so_ref (so
, &screen
->static_init
);
438 nouveau_pushbuf_flush(chan
, 0);