1 #ifndef __NV50_SCREEN_H__
2 #define __NV50_SCREEN_H__
5 #include "nouveau/nouveau_screen.h"
6 #include "nouveau/nouveau_fence.h"
7 #include "nouveau/nouveau_mm.h"
9 #include "nv50_winsys.h"
10 #include "nv50_stateobj.h"
12 #define NV50_TIC_MAX_ENTRIES 2048
13 #define NV50_TSC_MAX_ENTRIES 2048
17 #define NV50_CODE_BO_SIZE_LOG2 19
19 #define NV50_SCRATCH_SIZE (2 << 20)
20 #define NV50_SCRATCH_NR_BUFFERS 2
23 struct nouveau_screen base
;
24 struct nouveau_winsys
*nvws
;
26 struct nv50_context
*cur_ctx
;
28 struct nouveau_bo
*code
;
29 struct nouveau_bo
*uniforms
;
30 struct nouveau_bo
*txc
; /* TIC (offset 0) and TSC (65536) */
31 struct nouveau_bo
*stack_bo
;
32 struct nouveau_bo
*tls_bo
;
36 struct nouveau_resource
*vp_code_heap
;
37 struct nouveau_resource
*gp_code_heap
;
38 struct nouveau_resource
*fp_code_heap
;
43 uint32_t lock
[NV50_TIC_MAX_ENTRIES
/ 32];
49 uint32_t lock
[NV50_TSC_MAX_ENTRIES
/ 32];
54 struct nouveau_bo
*bo
;
57 struct nouveau_notifier
*sync
;
59 struct nouveau_mman
*mm_VRAM_fe0
;
61 struct nouveau_grobj
*tesla
;
62 struct nouveau_grobj
*eng2d
;
63 struct nouveau_grobj
*m2mf
;
66 static INLINE
struct nv50_screen
*
67 nv50_screen(struct pipe_screen
*screen
)
69 return (struct nv50_screen
*)screen
;
72 void nv50_screen_make_buffers_resident(struct nv50_screen
*);
74 int nv50_screen_tic_alloc(struct nv50_screen
*, void *);
75 int nv50_screen_tsc_alloc(struct nv50_screen
*, void *);
78 nv50_resource_fence(struct nv04_resource
*res
, uint32_t flags
)
80 struct nv50_screen
*screen
= nv50_screen(res
->base
.screen
);
83 nouveau_fence_ref(screen
->base
.fence
.current
, &res
->fence
);
85 if (flags
& NOUVEAU_BO_WR
)
86 nouveau_fence_ref(screen
->base
.fence
.current
, &res
->fence_wr
);
91 nv50_resource_validate(struct nv04_resource
*res
, uint32_t flags
)
93 struct nv50_screen
*screen
= nv50_screen(res
->base
.screen
);
95 if (likely(res
->bo
)) {
96 nouveau_bo_validate(screen
->base
.channel
, res
->bo
, flags
);
98 if (flags
& NOUVEAU_BO_WR
)
99 res
->status
|= NOUVEAU_BUFFER_STATUS_GPU_WRITING
;
100 if (flags
& NOUVEAU_BO_RD
)
101 res
->status
|= NOUVEAU_BUFFER_STATUS_GPU_READING
;
103 nv50_resource_fence(res
, flags
);
114 extern const struct nv50_format nv50_format_table
[];
117 nv50_screen_tic_unlock(struct nv50_screen
*screen
, struct nv50_tic_entry
*tic
)
120 screen
->tic
.lock
[tic
->id
/ 32] &= ~(1 << (tic
->id
% 32));
124 nv50_screen_tsc_unlock(struct nv50_screen
*screen
, struct nv50_tsc_entry
*tsc
)
127 screen
->tsc
.lock
[tsc
->id
/ 32] &= ~(1 << (tsc
->id
% 32));
131 nv50_screen_tic_free(struct nv50_screen
*screen
, struct nv50_tic_entry
*tic
)
134 screen
->tic
.entries
[tic
->id
] = NULL
;
135 screen
->tic
.lock
[tic
->id
/ 32] &= ~(1 << (tic
->id
% 32));
140 nv50_screen_tsc_free(struct nv50_screen
*screen
, struct nv50_tsc_entry
*tsc
)
143 screen
->tsc
.entries
[tsc
->id
] = NULL
;
144 screen
->tsc
.lock
[tsc
->id
/ 32] &= ~(1 << (tsc
->id
% 32));