2 * Copyright 2010 Christoph Bumiller
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 #include "pipe/p_defines.h"
24 #include "util/u_helpers.h"
25 #include "util/u_inlines.h"
26 #include "util/u_transfer.h"
28 #include "tgsi/tgsi_parse.h"
30 #include "nv50_stateobj.h"
31 #include "nv50_context.h"
33 #include "nv50_3d.xml.h"
34 #include "nv50_texture.xml.h"
36 #include "nouveau/nouveau_gldefs.h"
39 * ! pipe_sampler_state.normalized_coords is ignored - rectangle textures will
40 * use non-normalized coordinates, everything else won't
41 * (The relevant bit is in the TIC entry and not the TSC entry.)
43 * ! pipe_sampler_state.seamless_cube_map is ignored - seamless filtering is
44 * always activated on NVA0 +
45 * (Give me the global bit, otherwise it's not worth the CPU work.)
47 * ! pipe_sampler_state.border_color is not swizzled according to the texture
48 * swizzle in pipe_sampler_view
49 * (This will be ugly with indirect independent texture/sampler access,
50 * we'd have to emulate the logic in the shader. GL doesn't have that,
51 * D3D doesn't have swizzle, if we knew what we were implementing we'd be
54 * ! pipe_rasterizer_state.line_last_pixel is ignored - it is never drawn
56 * ! pipe_rasterizer_state.flatshade_first also applies to QUADS
57 * (There's a GL query for that, forcing an exception is just ridiculous.)
59 * ! pipe_rasterizer_state.gl_rasterization_rules is ignored - pixel centers
60 * are always at half integer coordinates and the top-left rule applies
61 * (There does not seem to be a hardware switch for this.)
63 * ! pipe_rasterizer_state.sprite_coord_enable is masked with 0xff on NVC0
64 * (The hardware only has 8 slots meant for TexCoord and we have to assign
65 * in advance to maintain elegant separate shader objects.)
68 static INLINE
uint32_t
69 nv50_colormask(unsigned mask
)
73 if (mask
& PIPE_MASK_R
)
75 if (mask
& PIPE_MASK_G
)
77 if (mask
& PIPE_MASK_B
)
79 if (mask
& PIPE_MASK_A
)
85 #define NV50_BLEND_FACTOR_CASE(a, b) \
86 case PIPE_BLENDFACTOR_##a: return NV50_3D_BLEND_FACTOR_##b
88 static INLINE
uint32_t
89 nv50_blend_fac(unsigned factor
)
92 NV50_BLEND_FACTOR_CASE(ONE
, ONE
);
93 NV50_BLEND_FACTOR_CASE(SRC_COLOR
, SRC_COLOR
);
94 NV50_BLEND_FACTOR_CASE(SRC_ALPHA
, SRC_ALPHA
);
95 NV50_BLEND_FACTOR_CASE(DST_ALPHA
, DST_ALPHA
);
96 NV50_BLEND_FACTOR_CASE(DST_COLOR
, DST_COLOR
);
97 NV50_BLEND_FACTOR_CASE(SRC_ALPHA_SATURATE
, SRC_ALPHA_SATURATE
);
98 NV50_BLEND_FACTOR_CASE(CONST_COLOR
, CONSTANT_COLOR
);
99 NV50_BLEND_FACTOR_CASE(CONST_ALPHA
, CONSTANT_ALPHA
);
100 NV50_BLEND_FACTOR_CASE(SRC1_COLOR
, SRC1_COLOR
);
101 NV50_BLEND_FACTOR_CASE(SRC1_ALPHA
, SRC1_ALPHA
);
102 NV50_BLEND_FACTOR_CASE(ZERO
, ZERO
);
103 NV50_BLEND_FACTOR_CASE(INV_SRC_COLOR
, ONE_MINUS_SRC_COLOR
);
104 NV50_BLEND_FACTOR_CASE(INV_SRC_ALPHA
, ONE_MINUS_SRC_ALPHA
);
105 NV50_BLEND_FACTOR_CASE(INV_DST_ALPHA
, ONE_MINUS_DST_ALPHA
);
106 NV50_BLEND_FACTOR_CASE(INV_DST_COLOR
, ONE_MINUS_DST_COLOR
);
107 NV50_BLEND_FACTOR_CASE(INV_CONST_COLOR
, ONE_MINUS_CONSTANT_COLOR
);
108 NV50_BLEND_FACTOR_CASE(INV_CONST_ALPHA
, ONE_MINUS_CONSTANT_ALPHA
);
109 NV50_BLEND_FACTOR_CASE(INV_SRC1_COLOR
, ONE_MINUS_SRC1_COLOR
);
110 NV50_BLEND_FACTOR_CASE(INV_SRC1_ALPHA
, ONE_MINUS_SRC1_ALPHA
);
112 return NV50_3D_BLEND_FACTOR_ZERO
;
117 nv50_blend_state_create(struct pipe_context
*pipe
,
118 const struct pipe_blend_state
*cso
)
120 struct nv50_blend_stateobj
*so
= CALLOC_STRUCT(nv50_blend_stateobj
);
122 boolean emit_common_func
= cso
->rt
[0].blend_enable
;
125 if (nv50_context(pipe
)->screen
->tesla
->oclass
>= NVA3_3D_CLASS
) {
126 SB_BEGIN_3D(so
, BLEND_INDEPENDENT
, 1);
127 SB_DATA (so
, cso
->independent_blend_enable
);
132 SB_BEGIN_3D(so
, COLOR_MASK_COMMON
, 1);
133 SB_DATA (so
, !cso
->independent_blend_enable
);
135 SB_BEGIN_3D(so
, BLEND_ENABLE_COMMON
, 1);
136 SB_DATA (so
, !cso
->independent_blend_enable
);
138 if (cso
->independent_blend_enable
) {
139 SB_BEGIN_3D(so
, BLEND_ENABLE(0), 8);
140 for (i
= 0; i
< 8; ++i
) {
141 SB_DATA(so
, cso
->rt
[i
].blend_enable
);
142 if (cso
->rt
[i
].blend_enable
)
143 emit_common_func
= TRUE
;
146 if (nv50_context(pipe
)->screen
->tesla
->oclass
>= NVA3_3D_CLASS
) {
147 emit_common_func
= FALSE
;
149 for (i
= 0; i
< 8; ++i
) {
150 if (!cso
->rt
[i
].blend_enable
)
152 SB_BEGIN_3D_(so
, NVA3_3D_IBLEND_EQUATION_RGB(i
), 6);
153 SB_DATA (so
, nvgl_blend_eqn(cso
->rt
[i
].rgb_func
));
154 SB_DATA (so
, nv50_blend_fac(cso
->rt
[i
].rgb_src_factor
));
155 SB_DATA (so
, nv50_blend_fac(cso
->rt
[i
].rgb_dst_factor
));
156 SB_DATA (so
, nvgl_blend_eqn(cso
->rt
[i
].alpha_func
));
157 SB_DATA (so
, nv50_blend_fac(cso
->rt
[i
].alpha_src_factor
));
158 SB_DATA (so
, nv50_blend_fac(cso
->rt
[i
].alpha_dst_factor
));
162 SB_BEGIN_3D(so
, BLEND_ENABLE(0), 1);
163 SB_DATA (so
, cso
->rt
[0].blend_enable
);
166 if (emit_common_func
) {
167 SB_BEGIN_3D(so
, BLEND_EQUATION_RGB
, 5);
168 SB_DATA (so
, nvgl_blend_eqn(cso
->rt
[0].rgb_func
));
169 SB_DATA (so
, nv50_blend_fac(cso
->rt
[0].rgb_src_factor
));
170 SB_DATA (so
, nv50_blend_fac(cso
->rt
[0].rgb_dst_factor
));
171 SB_DATA (so
, nvgl_blend_eqn(cso
->rt
[0].alpha_func
));
172 SB_DATA (so
, nv50_blend_fac(cso
->rt
[0].alpha_src_factor
));
173 SB_BEGIN_3D(so
, BLEND_FUNC_DST_ALPHA
, 1);
174 SB_DATA (so
, nv50_blend_fac(cso
->rt
[0].alpha_dst_factor
));
177 if (cso
->logicop_enable
) {
178 SB_BEGIN_3D(so
, LOGIC_OP_ENABLE
, 2);
180 SB_DATA (so
, nvgl_logicop_func(cso
->logicop_func
));
182 SB_BEGIN_3D(so
, LOGIC_OP_ENABLE
, 1);
186 if (cso
->independent_blend_enable
) {
187 SB_BEGIN_3D(so
, COLOR_MASK(0), 8);
188 for (i
= 0; i
< 8; ++i
)
189 SB_DATA(so
, nv50_colormask(cso
->rt
[i
].colormask
));
191 SB_BEGIN_3D(so
, COLOR_MASK(0), 1);
192 SB_DATA (so
, nv50_colormask(cso
->rt
[0].colormask
));
196 if (cso
->alpha_to_coverage
)
197 ms
|= NV50_3D_MULTISAMPLE_CTRL_ALPHA_TO_COVERAGE
;
198 if (cso
->alpha_to_one
)
199 ms
|= NV50_3D_MULTISAMPLE_CTRL_ALPHA_TO_ONE
;
201 SB_BEGIN_3D(so
, MULTISAMPLE_CTRL
, 1);
204 assert(so
->size
<= (sizeof(so
->state
) / sizeof(so
->state
[0])));
209 nv50_blend_state_bind(struct pipe_context
*pipe
, void *hwcso
)
211 struct nv50_context
*nv50
= nv50_context(pipe
);
214 nv50
->dirty
|= NV50_NEW_BLEND
;
218 nv50_blend_state_delete(struct pipe_context
*pipe
, void *hwcso
)
223 /* NOTE: ignoring line_last_pixel, using FALSE (set on screen init) */
225 nv50_rasterizer_state_create(struct pipe_context
*pipe
,
226 const struct pipe_rasterizer_state
*cso
)
228 struct nv50_rasterizer_stateobj
*so
;
231 so
= CALLOC_STRUCT(nv50_rasterizer_stateobj
);
236 #ifndef NV50_SCISSORS_CLIPPING
237 SB_BEGIN_3D(so
, SCISSOR_ENABLE(0), 1);
238 SB_DATA (so
, cso
->scissor
);
241 SB_BEGIN_3D(so
, SHADE_MODEL
, 1);
242 SB_DATA (so
, cso
->flatshade
? NV50_3D_SHADE_MODEL_FLAT
:
243 NV50_3D_SHADE_MODEL_SMOOTH
);
244 SB_BEGIN_3D(so
, PROVOKING_VERTEX_LAST
, 1);
245 SB_DATA (so
, !cso
->flatshade_first
);
246 SB_BEGIN_3D(so
, VERTEX_TWO_SIDE_ENABLE
, 1);
247 SB_DATA (so
, cso
->light_twoside
);
249 SB_BEGIN_3D(so
, FRAG_COLOR_CLAMP_EN
, 1);
250 SB_DATA (so
, cso
->clamp_fragment_color
? 0x11111111 : 0x00000000);
252 SB_BEGIN_3D(so
, MULTISAMPLE_ENABLE
, 1);
253 SB_DATA (so
, cso
->multisample
);
255 SB_BEGIN_3D(so
, LINE_WIDTH
, 1);
256 SB_DATA (so
, fui(cso
->line_width
));
257 SB_BEGIN_3D(so
, LINE_SMOOTH_ENABLE
, 1);
258 SB_DATA (so
, cso
->line_smooth
);
260 SB_BEGIN_3D(so
, LINE_STIPPLE_ENABLE
, 1);
261 if (cso
->line_stipple_enable
) {
263 SB_BEGIN_3D(so
, LINE_STIPPLE
, 1);
264 SB_DATA (so
, (cso
->line_stipple_pattern
<< 8) |
265 cso
->line_stipple_factor
);
270 if (!cso
->point_size_per_vertex
) {
271 SB_BEGIN_3D(so
, POINT_SIZE
, 1);
272 SB_DATA (so
, fui(cso
->point_size
));
274 SB_BEGIN_3D(so
, POINT_SPRITE_ENABLE
, 1);
275 SB_DATA (so
, cso
->point_quad_rasterization
);
276 SB_BEGIN_3D(so
, POINT_SMOOTH_ENABLE
, 1);
277 SB_DATA (so
, cso
->point_smooth
);
279 SB_BEGIN_3D(so
, POLYGON_MODE_FRONT
, 3);
280 SB_DATA (so
, nvgl_polygon_mode(cso
->fill_front
));
281 SB_DATA (so
, nvgl_polygon_mode(cso
->fill_back
));
282 SB_DATA (so
, cso
->poly_smooth
);
284 SB_BEGIN_3D(so
, CULL_FACE_ENABLE
, 3);
285 SB_DATA (so
, cso
->cull_face
!= PIPE_FACE_NONE
);
286 SB_DATA (so
, cso
->front_ccw
? NV50_3D_FRONT_FACE_CCW
:
287 NV50_3D_FRONT_FACE_CW
);
288 switch (cso
->cull_face
) {
289 case PIPE_FACE_FRONT_AND_BACK
:
290 SB_DATA(so
, NV50_3D_CULL_FACE_FRONT_AND_BACK
);
292 case PIPE_FACE_FRONT
:
293 SB_DATA(so
, NV50_3D_CULL_FACE_FRONT
);
297 SB_DATA(so
, NV50_3D_CULL_FACE_BACK
);
301 SB_BEGIN_3D(so
, POLYGON_STIPPLE_ENABLE
, 1);
302 SB_DATA (so
, cso
->poly_stipple_enable
);
303 SB_BEGIN_3D(so
, POLYGON_OFFSET_POINT_ENABLE
, 3);
304 SB_DATA (so
, cso
->offset_point
);
305 SB_DATA (so
, cso
->offset_line
);
306 SB_DATA (so
, cso
->offset_tri
);
308 if (cso
->offset_point
|| cso
->offset_line
|| cso
->offset_tri
) {
309 SB_BEGIN_3D(so
, POLYGON_OFFSET_FACTOR
, 1);
310 SB_DATA (so
, fui(cso
->offset_scale
));
311 SB_BEGIN_3D(so
, POLYGON_OFFSET_UNITS
, 1);
312 SB_DATA (so
, fui(cso
->offset_units
* 2.0f
));
313 SB_BEGIN_3D(so
, POLYGON_OFFSET_CLAMP
, 1);
314 SB_DATA (so
, fui(cso
->offset_clamp
));
317 if (cso
->depth_clip
) {
321 NV50_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_CLAMP_NEAR
|
322 NV50_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_CLAMP_FAR
|
323 NV50_3D_VIEW_VOLUME_CLIP_CTRL_UNK12_UNK1
;
325 #ifndef NV50_SCISSORS_CLIPPING
327 NV50_3D_VIEW_VOLUME_CLIP_CTRL_UNK7
|
328 NV50_3D_VIEW_VOLUME_CLIP_CTRL_UNK12_UNK1
;
330 SB_BEGIN_3D(so
, VIEW_VOLUME_CLIP_CTRL
, 1);
333 assert(so
->size
<= (sizeof(so
->state
) / sizeof(so
->state
[0])));
338 nv50_rasterizer_state_bind(struct pipe_context
*pipe
, void *hwcso
)
340 struct nv50_context
*nv50
= nv50_context(pipe
);
343 nv50
->dirty
|= NV50_NEW_RASTERIZER
;
347 nv50_rasterizer_state_delete(struct pipe_context
*pipe
, void *hwcso
)
353 nv50_zsa_state_create(struct pipe_context
*pipe
,
354 const struct pipe_depth_stencil_alpha_state
*cso
)
356 struct nv50_zsa_stateobj
*so
= CALLOC_STRUCT(nv50_zsa_stateobj
);
360 SB_BEGIN_3D(so
, DEPTH_WRITE_ENABLE
, 1);
361 SB_DATA (so
, cso
->depth
.writemask
);
362 SB_BEGIN_3D(so
, DEPTH_TEST_ENABLE
, 1);
363 if (cso
->depth
.enabled
) {
365 SB_BEGIN_3D(so
, DEPTH_TEST_FUNC
, 1);
366 SB_DATA (so
, nvgl_comparison_op(cso
->depth
.func
));
371 if (cso
->stencil
[0].enabled
) {
372 SB_BEGIN_3D(so
, STENCIL_ENABLE
, 5);
374 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[0].fail_op
));
375 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[0].zfail_op
));
376 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[0].zpass_op
));
377 SB_DATA (so
, nvgl_comparison_op(cso
->stencil
[0].func
));
378 SB_BEGIN_3D(so
, STENCIL_FRONT_MASK
, 2);
379 SB_DATA (so
, cso
->stencil
[0].writemask
);
380 SB_DATA (so
, cso
->stencil
[0].valuemask
);
382 SB_BEGIN_3D(so
, STENCIL_ENABLE
, 1);
386 if (cso
->stencil
[1].enabled
) {
387 assert(cso
->stencil
[0].enabled
);
388 SB_BEGIN_3D(so
, STENCIL_TWO_SIDE_ENABLE
, 5);
390 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[1].fail_op
));
391 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[1].zfail_op
));
392 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[1].zpass_op
));
393 SB_DATA (so
, nvgl_comparison_op(cso
->stencil
[1].func
));
394 SB_BEGIN_3D(so
, STENCIL_BACK_MASK
, 2);
395 SB_DATA (so
, cso
->stencil
[1].writemask
);
396 SB_DATA (so
, cso
->stencil
[1].valuemask
);
398 SB_BEGIN_3D(so
, STENCIL_TWO_SIDE_ENABLE
, 1);
402 SB_BEGIN_3D(so
, ALPHA_TEST_ENABLE
, 1);
403 if (cso
->alpha
.enabled
) {
405 SB_BEGIN_3D(so
, ALPHA_TEST_REF
, 2);
406 SB_DATA (so
, fui(cso
->alpha
.ref_value
));
407 SB_DATA (so
, nvgl_comparison_op(cso
->alpha
.func
));
412 assert(so
->size
<= (sizeof(so
->state
) / sizeof(so
->state
[0])));
417 nv50_zsa_state_bind(struct pipe_context
*pipe
, void *hwcso
)
419 struct nv50_context
*nv50
= nv50_context(pipe
);
422 nv50
->dirty
|= NV50_NEW_ZSA
;
426 nv50_zsa_state_delete(struct pipe_context
*pipe
, void *hwcso
)
431 /* ====================== SAMPLERS AND TEXTURES ================================
434 #define NV50_TSC_WRAP_CASE(n) \
435 case PIPE_TEX_WRAP_##n: return NV50_TSC_WRAP_##n
437 static INLINE
unsigned
438 nv50_tsc_wrap_mode(unsigned wrap
)
441 NV50_TSC_WRAP_CASE(REPEAT
);
442 NV50_TSC_WRAP_CASE(MIRROR_REPEAT
);
443 NV50_TSC_WRAP_CASE(CLAMP_TO_EDGE
);
444 NV50_TSC_WRAP_CASE(CLAMP_TO_BORDER
);
445 NV50_TSC_WRAP_CASE(CLAMP
);
446 NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_EDGE
);
447 NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_BORDER
);
448 NV50_TSC_WRAP_CASE(MIRROR_CLAMP
);
450 NOUVEAU_ERR("unknown wrap mode: %d\n", wrap
);
451 return NV50_TSC_WRAP_REPEAT
;
456 nv50_sampler_state_create(struct pipe_context
*pipe
,
457 const struct pipe_sampler_state
*cso
)
459 struct nv50_tsc_entry
*so
= CALLOC_STRUCT(nv50_tsc_entry
);
464 so
->tsc
[0] = (0x00026000 |
465 (nv50_tsc_wrap_mode(cso
->wrap_s
) << 0) |
466 (nv50_tsc_wrap_mode(cso
->wrap_t
) << 3) |
467 (nv50_tsc_wrap_mode(cso
->wrap_r
) << 6));
469 if (nouveau_screen(pipe
->screen
)->class_3d
>= NVE4_3D_CLASS
) {
470 if (cso
->seamless_cube_map
)
471 so
->tsc
[1] |= NVE4_TSC_1_CUBE_SEAMLESS
;
472 if (!cso
->normalized_coords
)
473 so
->tsc
[1] |= NVE4_TSC_1_FORCE_NONNORMALIZED_COORDS
;
476 switch (cso
->mag_img_filter
) {
477 case PIPE_TEX_FILTER_LINEAR
:
478 so
->tsc
[1] |= NV50_TSC_1_MAGF_LINEAR
;
480 case PIPE_TEX_FILTER_NEAREST
:
482 so
->tsc
[1] |= NV50_TSC_1_MAGF_NEAREST
;
486 switch (cso
->min_img_filter
) {
487 case PIPE_TEX_FILTER_LINEAR
:
488 so
->tsc
[1] |= NV50_TSC_1_MINF_LINEAR
;
490 case PIPE_TEX_FILTER_NEAREST
:
492 so
->tsc
[1] |= NV50_TSC_1_MINF_NEAREST
;
496 switch (cso
->min_mip_filter
) {
497 case PIPE_TEX_MIPFILTER_LINEAR
:
498 so
->tsc
[1] |= NV50_TSC_1_MIPF_LINEAR
;
500 case PIPE_TEX_MIPFILTER_NEAREST
:
501 so
->tsc
[1] |= NV50_TSC_1_MIPF_NEAREST
;
503 case PIPE_TEX_MIPFILTER_NONE
:
505 so
->tsc
[1] |= NV50_TSC_1_MIPF_NONE
;
509 if (cso
->max_anisotropy
>= 16)
510 so
->tsc
[0] |= (7 << 20);
512 if (cso
->max_anisotropy
>= 12)
513 so
->tsc
[0] |= (6 << 20);
515 so
->tsc
[0] |= (cso
->max_anisotropy
>> 1) << 20;
517 if (cso
->max_anisotropy
>= 4)
518 so
->tsc
[1] |= NV50_TSC_1_UNKN_ANISO_35
;
520 if (cso
->max_anisotropy
>= 2)
521 so
->tsc
[1] |= NV50_TSC_1_UNKN_ANISO_15
;
524 if (cso
->compare_mode
== PIPE_TEX_COMPARE_R_TO_TEXTURE
) {
525 /* NOTE: must be deactivated for non-shadow textures */
526 so
->tsc
[0] |= (1 << 9);
527 so
->tsc
[0] |= (nvgl_comparison_op(cso
->compare_func
) & 0x7) << 10;
530 f
[0] = CLAMP(cso
->lod_bias
, -16.0f
, 15.0f
);
531 so
->tsc
[1] |= ((int)(f
[0] * 256.0f
) & 0x1fff) << 12;
533 f
[0] = CLAMP(cso
->min_lod
, 0.0f
, 15.0f
);
534 f
[1] = CLAMP(cso
->max_lod
, 0.0f
, 15.0f
);
536 (((int)(f
[1] * 256.0f
) & 0xfff) << 12) | ((int)(f
[0] * 256.0f
) & 0xfff);
538 so
->tsc
[4] = fui(cso
->border_color
.f
[0]);
539 so
->tsc
[5] = fui(cso
->border_color
.f
[1]);
540 so
->tsc
[6] = fui(cso
->border_color
.f
[2]);
541 so
->tsc
[7] = fui(cso
->border_color
.f
[3]);
547 nv50_sampler_state_delete(struct pipe_context
*pipe
, void *hwcso
)
551 for (s
= 0; s
< 3; ++s
)
552 for (i
= 0; i
< nv50_context(pipe
)->num_samplers
[s
]; ++i
)
553 if (nv50_context(pipe
)->samplers
[s
][i
] == hwcso
)
554 nv50_context(pipe
)->samplers
[s
][i
] = NULL
;
556 nv50_screen_tsc_free(nv50_context(pipe
)->screen
, nv50_tsc_entry(hwcso
));
562 nv50_stage_sampler_states_bind(struct nv50_context
*nv50
, int s
,
563 unsigned nr
, void **hwcso
)
567 for (i
= 0; i
< nr
; ++i
) {
568 struct nv50_tsc_entry
*old
= nv50
->samplers
[s
][i
];
570 nv50
->samplers
[s
][i
] = nv50_tsc_entry(hwcso
[i
]);
572 nv50_screen_tsc_unlock(nv50
->screen
, old
);
574 for (; i
< nv50
->num_samplers
[s
]; ++i
)
575 if (nv50
->samplers
[s
][i
])
576 nv50_screen_tsc_unlock(nv50
->screen
, nv50
->samplers
[s
][i
]);
578 nv50
->num_samplers
[s
] = nr
;
580 nv50
->dirty
|= NV50_NEW_SAMPLERS
;
584 nv50_vp_sampler_states_bind(struct pipe_context
*pipe
, unsigned nr
, void **s
)
586 nv50_stage_sampler_states_bind(nv50_context(pipe
), 0, nr
, s
);
590 nv50_fp_sampler_states_bind(struct pipe_context
*pipe
, unsigned nr
, void **s
)
592 nv50_stage_sampler_states_bind(nv50_context(pipe
), 2, nr
, s
);
596 nv50_gp_sampler_states_bind(struct pipe_context
*pipe
, unsigned nr
, void **s
)
598 nv50_stage_sampler_states_bind(nv50_context(pipe
), 1, nr
, s
);
601 /* NOTE: only called when not referenced anywhere, won't be bound */
603 nv50_sampler_view_destroy(struct pipe_context
*pipe
,
604 struct pipe_sampler_view
*view
)
606 pipe_resource_reference(&view
->texture
, NULL
);
608 nv50_screen_tic_free(nv50_context(pipe
)->screen
, nv50_tic_entry(view
));
610 FREE(nv50_tic_entry(view
));
614 nv50_stage_set_sampler_views(struct nv50_context
*nv50
, int s
,
616 struct pipe_sampler_view
**views
)
620 for (i
= 0; i
< nr
; ++i
) {
621 struct nv50_tic_entry
*old
= nv50_tic_entry(nv50
->textures
[s
][i
]);
623 nv50_screen_tic_unlock(nv50
->screen
, old
);
625 pipe_sampler_view_reference(&nv50
->textures
[s
][i
], views
[i
]);
628 for (i
= nr
; i
< nv50
->num_textures
[s
]; ++i
) {
629 struct nv50_tic_entry
*old
= nv50_tic_entry(nv50
->textures
[s
][i
]);
632 nv50_screen_tic_unlock(nv50
->screen
, old
);
634 pipe_sampler_view_reference(&nv50
->textures
[s
][i
], NULL
);
637 nv50
->num_textures
[s
] = nr
;
639 nouveau_bufctx_reset(nv50
->bufctx_3d
, NV50_BIND_TEXTURES
);
641 nv50
->dirty
|= NV50_NEW_TEXTURES
;
645 nv50_vp_set_sampler_views(struct pipe_context
*pipe
,
647 struct pipe_sampler_view
**views
)
649 nv50_stage_set_sampler_views(nv50_context(pipe
), 0, nr
, views
);
653 nv50_fp_set_sampler_views(struct pipe_context
*pipe
,
655 struct pipe_sampler_view
**views
)
657 nv50_stage_set_sampler_views(nv50_context(pipe
), 2, nr
, views
);
661 nv50_gp_set_sampler_views(struct pipe_context
*pipe
,
663 struct pipe_sampler_view
**views
)
665 nv50_stage_set_sampler_views(nv50_context(pipe
), 1, nr
, views
);
668 /* ============================= SHADERS =======================================
672 nv50_sp_state_create(struct pipe_context
*pipe
,
673 const struct pipe_shader_state
*cso
, unsigned type
)
675 struct nv50_program
*prog
;
677 prog
= CALLOC_STRUCT(nv50_program
);
682 prog
->pipe
.tokens
= tgsi_dup_tokens(cso
->tokens
);
684 if (cso
->stream_output
.num_outputs
)
685 prog
->pipe
.stream_output
= cso
->stream_output
;
691 nv50_sp_state_delete(struct pipe_context
*pipe
, void *hwcso
)
693 struct nv50_program
*prog
= (struct nv50_program
*)hwcso
;
695 nv50_program_destroy(nv50_context(pipe
), prog
);
697 FREE((void *)prog
->pipe
.tokens
);
702 nv50_vp_state_create(struct pipe_context
*pipe
,
703 const struct pipe_shader_state
*cso
)
705 return nv50_sp_state_create(pipe
, cso
, PIPE_SHADER_VERTEX
);
709 nv50_vp_state_bind(struct pipe_context
*pipe
, void *hwcso
)
711 struct nv50_context
*nv50
= nv50_context(pipe
);
713 nv50
->vertprog
= hwcso
;
714 nv50
->dirty
|= NV50_NEW_VERTPROG
;
718 nv50_fp_state_create(struct pipe_context
*pipe
,
719 const struct pipe_shader_state
*cso
)
721 return nv50_sp_state_create(pipe
, cso
, PIPE_SHADER_FRAGMENT
);
725 nv50_fp_state_bind(struct pipe_context
*pipe
, void *hwcso
)
727 struct nv50_context
*nv50
= nv50_context(pipe
);
729 nv50
->fragprog
= hwcso
;
730 nv50
->dirty
|= NV50_NEW_FRAGPROG
;
734 nv50_gp_state_create(struct pipe_context
*pipe
,
735 const struct pipe_shader_state
*cso
)
737 return nv50_sp_state_create(pipe
, cso
, PIPE_SHADER_GEOMETRY
);
741 nv50_gp_state_bind(struct pipe_context
*pipe
, void *hwcso
)
743 struct nv50_context
*nv50
= nv50_context(pipe
);
745 nv50
->gmtyprog
= hwcso
;
746 nv50
->dirty
|= NV50_NEW_GMTYPROG
;
750 nv50_set_constant_buffer(struct pipe_context
*pipe
, uint shader
, uint index
,
751 struct pipe_constant_buffer
*cb
)
753 struct nv50_context
*nv50
= nv50_context(pipe
);
754 struct pipe_resource
*res
= cb
? cb
->buffer
: NULL
;
755 const unsigned s
= nv50_context_shader_stage(shader
);
756 const unsigned i
= index
;
758 if (shader
== PIPE_SHADER_COMPUTE
)
761 if (nv50
->constbuf
[s
][i
].user
)
762 nv50
->constbuf
[s
][i
].u
.buf
= NULL
;
764 if (nv50
->constbuf
[s
][i
].u
.buf
)
765 nouveau_bufctx_reset(nv50
->bufctx_3d
, NV50_BIND_CB(s
, i
));
767 pipe_resource_reference(&nv50
->constbuf
[s
][i
].u
.buf
, res
);
769 nv50
->constbuf
[s
][i
].user
= (cb
&& cb
->user_buffer
) ? TRUE
: FALSE
;
770 if (nv50
->constbuf
[s
][i
].user
) {
771 nv50
->constbuf
[s
][i
].u
.data
= cb
->user_buffer
;
772 nv50
->constbuf
[s
][i
].size
= cb
->buffer_size
;
773 nv50
->constbuf_valid
[s
] |= 1 << i
;
776 nv50
->constbuf
[s
][i
].offset
= cb
->buffer_offset
;
777 nv50
->constbuf
[s
][i
].size
= align(cb
->buffer_size
, 0x100);
778 nv50
->constbuf_valid
[s
] |= 1 << i
;
780 nv50
->constbuf_valid
[s
] &= ~(1 << i
);
782 nv50
->constbuf_dirty
[s
] |= 1 << i
;
784 nv50
->dirty
|= NV50_NEW_CONSTBUF
;
787 /* =============================================================================
791 nv50_set_blend_color(struct pipe_context
*pipe
,
792 const struct pipe_blend_color
*bcol
)
794 struct nv50_context
*nv50
= nv50_context(pipe
);
796 nv50
->blend_colour
= *bcol
;
797 nv50
->dirty
|= NV50_NEW_BLEND_COLOUR
;
801 nv50_set_stencil_ref(struct pipe_context
*pipe
,
802 const struct pipe_stencil_ref
*sr
)
804 struct nv50_context
*nv50
= nv50_context(pipe
);
806 nv50
->stencil_ref
= *sr
;
807 nv50
->dirty
|= NV50_NEW_STENCIL_REF
;
811 nv50_set_clip_state(struct pipe_context
*pipe
,
812 const struct pipe_clip_state
*clip
)
814 struct nv50_context
*nv50
= nv50_context(pipe
);
816 memcpy(nv50
->clip
.ucp
, clip
->ucp
, sizeof(clip
->ucp
));
818 nv50
->dirty
|= NV50_NEW_CLIP
;
822 nv50_set_sample_mask(struct pipe_context
*pipe
, unsigned sample_mask
)
824 struct nv50_context
*nv50
= nv50_context(pipe
);
826 nv50
->sample_mask
= sample_mask
;
827 nv50
->dirty
|= NV50_NEW_SAMPLE_MASK
;
832 nv50_set_framebuffer_state(struct pipe_context
*pipe
,
833 const struct pipe_framebuffer_state
*fb
)
835 struct nv50_context
*nv50
= nv50_context(pipe
);
838 nouveau_bufctx_reset(nv50
->bufctx_3d
, NV50_BIND_FB
);
840 for (i
= 0; i
< fb
->nr_cbufs
; ++i
)
841 pipe_surface_reference(&nv50
->framebuffer
.cbufs
[i
], fb
->cbufs
[i
]);
842 for (; i
< nv50
->framebuffer
.nr_cbufs
; ++i
)
843 pipe_surface_reference(&nv50
->framebuffer
.cbufs
[i
], NULL
);
845 nv50
->framebuffer
.nr_cbufs
= fb
->nr_cbufs
;
847 nv50
->framebuffer
.width
= fb
->width
;
848 nv50
->framebuffer
.height
= fb
->height
;
850 pipe_surface_reference(&nv50
->framebuffer
.zsbuf
, fb
->zsbuf
);
852 nv50
->dirty
|= NV50_NEW_FRAMEBUFFER
;
856 nv50_set_polygon_stipple(struct pipe_context
*pipe
,
857 const struct pipe_poly_stipple
*stipple
)
859 struct nv50_context
*nv50
= nv50_context(pipe
);
861 nv50
->stipple
= *stipple
;
862 nv50
->dirty
|= NV50_NEW_STIPPLE
;
866 nv50_set_scissor_state(struct pipe_context
*pipe
,
867 const struct pipe_scissor_state
*scissor
)
869 struct nv50_context
*nv50
= nv50_context(pipe
);
871 nv50
->scissor
= *scissor
;
872 nv50
->dirty
|= NV50_NEW_SCISSOR
;
876 nv50_set_viewport_state(struct pipe_context
*pipe
,
877 const struct pipe_viewport_state
*vpt
)
879 struct nv50_context
*nv50
= nv50_context(pipe
);
881 nv50
->viewport
= *vpt
;
882 nv50
->dirty
|= NV50_NEW_VIEWPORT
;
886 nv50_set_vertex_buffers(struct pipe_context
*pipe
,
887 unsigned start_slot
, unsigned count
,
888 const struct pipe_vertex_buffer
*vb
)
890 struct nv50_context
*nv50
= nv50_context(pipe
);
893 util_set_vertex_buffers_count(nv50
->vtxbuf
, &nv50
->num_vtxbufs
, vb
,
897 nv50
->vbo_user
&= ~(((1ull << count
) - 1) << start_slot
);
898 nv50
->vbo_constant
&= ~(((1ull << count
) - 1) << start_slot
);
902 for (i
= 0; i
< count
; ++i
) {
903 unsigned dst_index
= start_slot
+ i
;
905 if (!vb
[i
].buffer
&& vb
[i
].user_buffer
) {
906 nv50
->vbo_user
|= 1 << dst_index
;
908 nv50
->vbo_constant
|= 1 << dst_index
;
910 nv50
->vbo_constant
&= ~(1 << dst_index
);
912 nv50
->vbo_user
&= ~(1 << dst_index
);
913 nv50
->vbo_constant
&= ~(1 << dst_index
);
917 nouveau_bufctx_reset(nv50
->bufctx_3d
, NV50_BIND_VERTEX
);
919 nv50
->dirty
|= NV50_NEW_ARRAYS
;
923 nv50_set_index_buffer(struct pipe_context
*pipe
,
924 const struct pipe_index_buffer
*ib
)
926 struct nv50_context
*nv50
= nv50_context(pipe
);
928 if (nv50
->idxbuf
.buffer
)
929 nouveau_bufctx_reset(nv50
->bufctx_3d
, NV50_BIND_INDEX
);
932 pipe_resource_reference(&nv50
->idxbuf
.buffer
, ib
->buffer
);
933 nv50
->idxbuf
.index_size
= ib
->index_size
;
935 nv50
->idxbuf
.offset
= ib
->offset
;
936 BCTX_REFN(nv50
->bufctx_3d
, INDEX
, nv04_resource(ib
->buffer
), RD
);
938 nv50
->idxbuf
.user_buffer
= ib
->user_buffer
;
941 pipe_resource_reference(&nv50
->idxbuf
.buffer
, NULL
);
946 nv50_vertex_state_bind(struct pipe_context
*pipe
, void *hwcso
)
948 struct nv50_context
*nv50
= nv50_context(pipe
);
950 nv50
->vertex
= hwcso
;
951 nv50
->dirty
|= NV50_NEW_VERTEX
;
954 static struct pipe_stream_output_target
*
955 nv50_so_target_create(struct pipe_context
*pipe
,
956 struct pipe_resource
*res
,
957 unsigned offset
, unsigned size
)
959 struct nv50_so_target
*targ
= MALLOC_STRUCT(nv50_so_target
);
963 if (nouveau_context(pipe
)->screen
->class_3d
>= NVA0_3D_CLASS
) {
964 targ
->pq
= pipe
->create_query(pipe
,
965 NVA0_QUERY_STREAM_OUTPUT_BUFFER_OFFSET
);
975 targ
->pipe
.buffer_size
= size
;
976 targ
->pipe
.buffer_offset
= offset
;
977 targ
->pipe
.context
= pipe
;
978 targ
->pipe
.buffer
= NULL
;
979 pipe_resource_reference(&targ
->pipe
.buffer
, res
);
980 pipe_reference_init(&targ
->pipe
.reference
, 1);
986 nv50_so_target_destroy(struct pipe_context
*pipe
,
987 struct pipe_stream_output_target
*ptarg
)
989 struct nv50_so_target
*targ
= nv50_so_target(ptarg
);
991 pipe
->destroy_query(pipe
, targ
->pq
);
992 pipe_resource_reference(&targ
->pipe
.buffer
, NULL
);
997 nv50_set_stream_output_targets(struct pipe_context
*pipe
,
998 unsigned num_targets
,
999 struct pipe_stream_output_target
**targets
,
1000 unsigned append_mask
)
1002 struct nv50_context
*nv50
= nv50_context(pipe
);
1004 boolean serialize
= TRUE
;
1005 const boolean can_resume
= nv50
->screen
->base
.class_3d
>= NVA0_3D_CLASS
;
1007 assert(num_targets
<= 4);
1009 for (i
= 0; i
< num_targets
; ++i
) {
1010 const boolean changed
= nv50
->so_target
[i
] != targets
[i
];
1011 if (!changed
&& (append_mask
& (1 << i
)))
1013 nv50
->so_targets_dirty
|= 1 << i
;
1015 if (can_resume
&& changed
&& nv50
->so_target
[i
]) {
1016 nva0_so_target_save_offset(pipe
, nv50
->so_target
[i
], i
, serialize
);
1020 if (targets
[i
] && !(append_mask
& (1 << i
)))
1021 nv50_so_target(targets
[i
])->clean
= TRUE
;
1023 pipe_so_target_reference(&nv50
->so_target
[i
], targets
[i
]);
1025 for (; i
< nv50
->num_so_targets
; ++i
) {
1026 if (can_resume
&& nv50
->so_target
[i
]) {
1027 nva0_so_target_save_offset(pipe
, nv50
->so_target
[i
], i
, serialize
);
1030 pipe_so_target_reference(&nv50
->so_target
[i
], NULL
);
1031 nv50
->so_targets_dirty
|= 1 << i
;
1033 nv50
->num_so_targets
= num_targets
;
1035 if (nv50
->so_targets_dirty
)
1036 nv50
->dirty
|= NV50_NEW_STRMOUT
;
1040 nv50_init_state_functions(struct nv50_context
*nv50
)
1042 struct pipe_context
*pipe
= &nv50
->base
.pipe
;
1044 pipe
->create_blend_state
= nv50_blend_state_create
;
1045 pipe
->bind_blend_state
= nv50_blend_state_bind
;
1046 pipe
->delete_blend_state
= nv50_blend_state_delete
;
1048 pipe
->create_rasterizer_state
= nv50_rasterizer_state_create
;
1049 pipe
->bind_rasterizer_state
= nv50_rasterizer_state_bind
;
1050 pipe
->delete_rasterizer_state
= nv50_rasterizer_state_delete
;
1052 pipe
->create_depth_stencil_alpha_state
= nv50_zsa_state_create
;
1053 pipe
->bind_depth_stencil_alpha_state
= nv50_zsa_state_bind
;
1054 pipe
->delete_depth_stencil_alpha_state
= nv50_zsa_state_delete
;
1056 pipe
->create_sampler_state
= nv50_sampler_state_create
;
1057 pipe
->delete_sampler_state
= nv50_sampler_state_delete
;
1058 pipe
->bind_vertex_sampler_states
= nv50_vp_sampler_states_bind
;
1059 pipe
->bind_fragment_sampler_states
= nv50_fp_sampler_states_bind
;
1060 pipe
->bind_geometry_sampler_states
= nv50_gp_sampler_states_bind
;
1062 pipe
->create_sampler_view
= nv50_create_sampler_view
;
1063 pipe
->sampler_view_destroy
= nv50_sampler_view_destroy
;
1064 pipe
->set_vertex_sampler_views
= nv50_vp_set_sampler_views
;
1065 pipe
->set_fragment_sampler_views
= nv50_fp_set_sampler_views
;
1066 pipe
->set_geometry_sampler_views
= nv50_gp_set_sampler_views
;
1068 pipe
->create_vs_state
= nv50_vp_state_create
;
1069 pipe
->create_fs_state
= nv50_fp_state_create
;
1070 pipe
->create_gs_state
= nv50_gp_state_create
;
1071 pipe
->bind_vs_state
= nv50_vp_state_bind
;
1072 pipe
->bind_fs_state
= nv50_fp_state_bind
;
1073 pipe
->bind_gs_state
= nv50_gp_state_bind
;
1074 pipe
->delete_vs_state
= nv50_sp_state_delete
;
1075 pipe
->delete_fs_state
= nv50_sp_state_delete
;
1076 pipe
->delete_gs_state
= nv50_sp_state_delete
;
1078 pipe
->set_blend_color
= nv50_set_blend_color
;
1079 pipe
->set_stencil_ref
= nv50_set_stencil_ref
;
1080 pipe
->set_clip_state
= nv50_set_clip_state
;
1081 pipe
->set_sample_mask
= nv50_set_sample_mask
;
1082 pipe
->set_constant_buffer
= nv50_set_constant_buffer
;
1083 pipe
->set_framebuffer_state
= nv50_set_framebuffer_state
;
1084 pipe
->set_polygon_stipple
= nv50_set_polygon_stipple
;
1085 pipe
->set_scissor_state
= nv50_set_scissor_state
;
1086 pipe
->set_viewport_state
= nv50_set_viewport_state
;
1088 pipe
->create_vertex_elements_state
= nv50_vertex_state_create
;
1089 pipe
->delete_vertex_elements_state
= nv50_vertex_state_delete
;
1090 pipe
->bind_vertex_elements_state
= nv50_vertex_state_bind
;
1092 pipe
->set_vertex_buffers
= nv50_set_vertex_buffers
;
1093 pipe
->set_index_buffer
= nv50_set_index_buffer
;
1095 pipe
->create_stream_output_target
= nv50_so_target_create
;
1096 pipe
->stream_output_target_destroy
= nv50_so_target_destroy
;
1097 pipe
->set_stream_output_targets
= nv50_set_stream_output_targets
;