2 * Copyright 2008 Ben Skeggs
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 #include "nv50_context.h"
24 #include "nv50_texture.h"
26 #include "nouveau/nouveau_stateobj.h"
28 #define _MIXED(pf, t0, t1, t2, t3, cr, cg, cb, ca, f) \
31 NV50TIC_0_0_MAPR_##cr | NV50TIC_0_0_TYPER_##t0 | \
32 NV50TIC_0_0_MAPG_##cg | NV50TIC_0_0_TYPEG_##t1 | \
33 NV50TIC_0_0_MAPB_##cb | NV50TIC_0_0_TYPEB_##t2 | \
34 NV50TIC_0_0_MAPA_##ca | NV50TIC_0_0_TYPEA_##t3 | \
38 #define _(pf, t, cr, cg, cb, ca, f) _MIXED(pf, t, t, t, t, cr, cg, cb, ca, f)
40 struct nv50_texture_format
{
45 #define NV50_TEX_FORMAT_LIST_SIZE \
46 (sizeof(nv50_tex_format_list) / sizeof(struct nv50_texture_format))
48 static const struct nv50_texture_format nv50_tex_format_list
[] =
50 _(A8R8G8B8_UNORM
, UNORM
, C2
, C1
, C0
, C3
, 8_8_8_8
),
51 _(A8R8G8B8_SRGB
, UNORM
, C2
, C1
, C0
, C3
, 8_8_8_8
),
52 _(X8R8G8B8_UNORM
, UNORM
, C2
, C1
, C0
, ONE
, 8_8_8_8
),
53 _(X8R8G8B8_SRGB
, UNORM
, C2
, C1
, C0
, ONE
, 8_8_8_8
),
54 _(A1R5G5B5_UNORM
, UNORM
, C2
, C1
, C0
, C3
, 1_5_5_5
),
55 _(A4R4G4B4_UNORM
, UNORM
, C2
, C1
, C0
, C3
, 4_4_4_4
),
57 _(R5G6B5_UNORM
, UNORM
, C2
, C1
, C0
, ONE
, 5_6_5
),
59 _(L8_UNORM
, UNORM
, C0
, C0
, C0
, ONE
, 8),
60 _(A8_UNORM
, UNORM
, ZERO
, ZERO
, ZERO
, C0
, 8),
61 _(I8_UNORM
, UNORM
, C0
, C0
, C0
, C0
, 8),
63 _(A8L8_UNORM
, UNORM
, C0
, C0
, C0
, C1
, 8_8
),
65 _(DXT1_RGB
, UNORM
, C0
, C1
, C2
, ONE
, DXT1
),
66 _(DXT1_RGBA
, UNORM
, C0
, C1
, C2
, C3
, DXT1
),
67 _(DXT3_RGBA
, UNORM
, C0
, C1
, C2
, C3
, DXT3
),
68 _(DXT5_RGBA
, UNORM
, C0
, C1
, C2
, C3
, DXT5
),
70 _MIXED(Z24S8_UNORM
, UINT
, UNORM
, UINT
, UINT
, C1
, C1
, C1
, ONE
, 24_8
),
72 _(R16G16B16A16_SNORM
, UNORM
, C0
, C1
, C2
, C3
, 16_16_16_16
),
73 _(R16G16B16A16_UNORM
, SNORM
, C0
, C1
, C2
, C3
, 16_16_16_16
),
74 _(R32G32B32A32_FLOAT
, FLOAT
, C0
, C1
, C2
, C3
, 32_32_32_32
),
76 _(R16G16_SNORM
, SNORM
, C0
, C1
, ZERO
, ONE
, 16_16
),
77 _(R16G16_UNORM
, UNORM
, C0
, C1
, ZERO
, ONE
, 16_16
),
79 _MIXED(Z32_FLOAT
, FLOAT
, UINT
, UINT
, UINT
, C0
, C0
, C0
, ONE
, 32_DEPTH
)
87 nv50_tex_construct(struct nv50_context
*nv50
, struct nouveau_stateobj
*so
,
88 struct nv50_miptree
*mt
, int unit
)
93 for (i
= 0; i
< NV50_TEX_FORMAT_LIST_SIZE
; i
++)
94 if (nv50_tex_format_list
[i
].pf
== mt
->base
.base
.format
)
96 if (i
== NV50_TEX_FORMAT_LIST_SIZE
)
99 if (nv50
->sampler
[unit
]->normalized
)
100 mode
= 0x50001000 | (1 << 31);
102 mode
= 0x50001000 | (7 << 14);
103 assert(mt
->base
.base
.target
== PIPE_TEXTURE_2D
);
106 mode
|= ((mt
->base
.bo
->tile_mode
& 0x0f) << 22) |
107 ((mt
->base
.bo
->tile_mode
& 0xf0) << 21);
109 if (pf_type(mt
->base
.base
.format
) == PIPE_FORMAT_TYPE_SRGB
)
112 switch (mt
->base
.base
.target
) {
113 case PIPE_TEXTURE_1D
:
115 case PIPE_TEXTURE_2D
:
118 case PIPE_TEXTURE_3D
:
121 case PIPE_TEXTURE_CUBE
:
125 assert(!"unsupported texture target");
129 so_data (so
, nv50_tex_format_list
[i
].hw
);
130 so_reloc(so
, mt
->base
.bo
, 0, NOUVEAU_BO_VRAM
| NOUVEAU_BO_LOW
|
131 NOUVEAU_BO_RD
, 0, 0);
133 so_data (so
, 0x00300000);
134 so_data (so
, mt
->base
.base
.width
[0] | (1 << 31));
135 so_data (so
, (mt
->base
.base
.last_level
<< 28) |
136 (mt
->base
.base
.depth
[0] << 16) | mt
->base
.base
.height
[0]);
137 so_data (so
, 0x03000000);
138 so_data (so
, mt
->base
.base
.last_level
<< 4);
144 nv50_tex_validate(struct nv50_context
*nv50
)
146 struct nouveau_grobj
*eng2d
= nv50
->screen
->eng2d
;
147 struct nouveau_grobj
*tesla
= nv50
->screen
->tesla
;
148 struct nouveau_stateobj
*so
;
149 unsigned i
, unit
, push
;
151 push
= MAX2(nv50
->miptree_nr
, nv50
->state
.miptree_nr
) * 2 + 23 + 6;
152 so
= so_new(nv50
->miptree_nr
* 9 + push
, nv50
->miptree_nr
* 2 + 2);
154 nv50_so_init_sifc(nv50
, so
, nv50
->screen
->tic
, NOUVEAU_BO_VRAM
,
155 nv50
->miptree_nr
* 8 * 4);
157 for (i
= 0, unit
= 0; unit
< nv50
->miptree_nr
; ++unit
) {
158 struct nv50_miptree
*mt
= nv50
->miptree
[unit
];
163 so_method(so
, eng2d
, NV50_2D_SIFC_DATA
| (2 << 29), 8);
164 if (nv50_tex_construct(nv50
, so
, mt
, unit
)) {
165 NOUVEAU_ERR("failed tex validate\n");
170 so_method(so
, tesla
, NV50TCL_SET_SAMPLER_TEX
, 1);
171 so_data (so
, (i
++ << NV50TCL_SET_SAMPLER_TEX_TIC_SHIFT
) |
172 (unit
<< NV50TCL_SET_SAMPLER_TEX_SAMPLER_SHIFT
) |
173 NV50TCL_SET_SAMPLER_TEX_VALID
);
176 for (; unit
< nv50
->state
.miptree_nr
; unit
++) {
177 so_method(so
, tesla
, NV50TCL_SET_SAMPLER_TEX
, 1);
179 (unit
<< NV50TCL_SET_SAMPLER_TEX_SAMPLER_SHIFT
) | 0);
182 /* not sure if the following really do what I think: */
183 so_method(so
, tesla
, 0x1440, 1); /* sync SIFC */
185 so_method(so
, tesla
, 0x1330, 1); /* flush TIC */
187 so_method(so
, tesla
, 0x1338, 1); /* flush texture caches */
190 so_ref(so
, &nv50
->state
.tic_upload
);
192 nv50
->state
.miptree_nr
= nv50
->miptree_nr
;