src/gallium/drivers/nv50/nv50_texture.h

   1 #ifndef __NV50_TEXTURE_H__
   2 #define __NV50_TEXTURE_H__
   3
   4 /* It'd be really nice to have these in nouveau_class.h generated by
   5  * renouveau like the rest of the object header - but not sure it can
   6  * handle non-object stuff nicely - need to look into it.
   7  */
   8
   9 /* Texture image control block */
  10 #define NV50TIC_0_0_MAPA_MASK                                     0x38000000
  11 #define NV50TIC_0_0_MAPA_ZERO                                     0x00000000
  12 #define NV50TIC_0_0_MAPA_C0                                       0x10000000
  13 #define NV50TIC_0_0_MAPA_C1                                       0x18000000
  14 #define NV50TIC_0_0_MAPA_C2                                       0x20000000
  15 #define NV50TIC_0_0_MAPA_C3                                       0x28000000
  16 #define NV50TIC_0_0_MAPA_ONE                                      0x38000000
  17 #define NV50TIC_0_0_MAPR_MASK                                     0x07000000
  18 #define NV50TIC_0_0_MAPR_ZERO                                     0x00000000
  19 #define NV50TIC_0_0_MAPR_C0                                       0x02000000
  20 #define NV50TIC_0_0_MAPR_C1                                       0x03000000
  21 #define NV50TIC_0_0_MAPR_C2                                       0x04000000
  22 #define NV50TIC_0_0_MAPR_C3                                       0x05000000
  23 #define NV50TIC_0_0_MAPR_ONE                                      0x07000000
  24 #define NV50TIC_0_0_MAPG_MASK                                     0x00e00000
  25 #define NV50TIC_0_0_MAPG_ZERO                                     0x00000000
  26 #define NV50TIC_0_0_MAPG_C0                                       0x00400000
  27 #define NV50TIC_0_0_MAPG_C1                                       0x00600000
  28 #define NV50TIC_0_0_MAPG_C2                                       0x00800000
  29 #define NV50TIC_0_0_MAPG_C3                                       0x00a00000
  30 #define NV50TIC_0_0_MAPG_ONE                                      0x00e00000
  31 #define NV50TIC_0_0_MAPB_MASK                                     0x001c0000
  32 #define NV50TIC_0_0_MAPB_ZERO                                     0x00000000
  33 #define NV50TIC_0_0_MAPB_C0                                       0x00080000
  34 #define NV50TIC_0_0_MAPB_C1                                       0x000c0000
  35 #define NV50TIC_0_0_MAPB_C2                                       0x00100000
  36 #define NV50TIC_0_0_MAPB_C3                                       0x00140000
  37 #define NV50TIC_0_0_MAPB_ONE                                      0x001c0000
  38 #define NV50TIC_0_0_TYPEA_MASK                                    0x00038000
  39 #define NV50TIC_0_0_TYPEA_UNORM                                   0x00010000
  40 #define NV50TIC_0_0_TYPER_MASK                                    0x00007000
  41 #define NV50TIC_0_0_TYPER_UNORM                                   0x00002000
  42 #define NV50TIC_0_0_TYPEG_MASK                                    0x00000e00
  43 #define NV50TIC_0_0_TYPEG_UNORM                                   0x00000400
  44 #define NV50TIC_0_0_TYPEB_MASK                                    0x000001c0
  45 #define NV50TIC_0_0_TYPEB_UNORM                                   0x00000080
  46 #define NV50TIC_0_0_FMT_MASK                                      0x0000003c
  47 #define NV50TIC_0_0_FMT_8_8_8_8                                   0x00000008
  48 #define NV50TIC_0_0_FMT_4_4_4_4                                   0x00000012
  49 #define NV50TIC_0_0_FMT_1_5_5_5                                   0x00000013
  50 #define NV50TIC_0_0_FMT_5_6_5                                     0x00000015
  51 #define NV50TIC_0_0_FMT_8_8                                       0x00000018
  52 #define NV50TIC_0_0_FMT_8                                         0x0000001d
  53
  54 #define NV50TIC_0_1_OFFSET_LOW_MASK                               0xffffffff
  55 #define NV50TIC_0_1_OFFSET_LOW_SHIFT                                       0
  56
  57 #define NV50TIC_0_2_UNKNOWN_MASK                                  0xffffffff
  58
  59 #define NV50TIC_0_3_UNKNOWN_MASK                                  0xffffffff
  60
  61 #define NV50TIC_0_4_WIDTH_MASK                                    0x0000ffff
  62 #define NV50TIC_0_4_WIDTH_SHIFT                                            0
  63
  64 #define NV50TIC_0_5_DEPTH_MASK                                    0xffff0000
  65 #define NV50TIC_0_5_DEPTH_SHIFT                                           16
  66 #define NV50TIC_0_5_HEIGHT_MASK                                   0x0000ffff
  67 #define NV50TIC_0_5_HEIGHT_SHIFT                                           0
  68
  69 #define NV50TIC_0_6_UNKNOWN_MASK                                  0xffffffff
  70
  71 #define NV50TIC_0_7_OFFSET_HIGH_MASK                              0xffffffff
  72 #define NV50TIC_0_7_OFFSET_HIGH_SHIFT                                      0
  73
  74 /* Texture sampler control block */
  75 #define NV50TSC_1_0_WRAPS_MASK                                   0x00000007
  76 #define NV50TSC_1_0_WRAPS_REPEAT                                 0x00000000
  77 #define NV50TSC_1_0_WRAPS_MIRROR_REPEAT                          0x00000001
  78 #define NV50TSC_1_0_WRAPS_CLAMP_TO_EDGE                          0x00000002
  79 #define NV50TSC_1_0_WRAPS_CLAMP_TO_BORDER                        0x00000003
  80 #define NV50TSC_1_0_WRAPS_CLAMP                                  0x00000004
  81 #define NV50TSC_1_0_WRAPS_MIRROR_CLAMP_TO_EDGE                   0x00000005
  82 #define NV50TSC_1_0_WRAPS_MIRROR_CLAMP_TO_BORDER                 0x00000006
  83 #define NV50TSC_1_0_WRAPS_MIRROR_CLAMP                           0x00000007
  84 #define NV50TSC_1_0_WRAPT_MASK                                   0x00000038
  85 #define NV50TSC_1_0_WRAPT_REPEAT                                 0x00000000
  86 #define NV50TSC_1_0_WRAPT_MIRROR_REPEAT                          0x00000008
  87 #define NV50TSC_1_0_WRAPT_CLAMP_TO_EDGE                          0x00000010
  88 #define NV50TSC_1_0_WRAPT_CLAMP_TO_BORDER                        0x00000018
  89 #define NV50TSC_1_0_WRAPT_CLAMP                                  0x00000020
  90 #define NV50TSC_1_0_WRAPT_MIRROR_CLAMP_TO_EDGE                   0x00000028
  91 #define NV50TSC_1_0_WRAPT_MIRROR_CLAMP_TO_BORDER                 0x00000030
  92 #define NV50TSC_1_0_WRAPT_MIRROR_CLAMP                           0x00000038
  93 #define NV50TSC_1_0_WRAPR_MASK                                   0x000001c0
  94 #define NV50TSC_1_0_WRAPR_REPEAT                                 0x00000000
  95 #define NV50TSC_1_0_WRAPR_MIRROR_REPEAT                          0x00000040
  96 #define NV50TSC_1_0_WRAPR_CLAMP_TO_EDGE                          0x00000080
  97 #define NV50TSC_1_0_WRAPR_CLAMP_TO_BORDER                        0x000000c0
  98 #define NV50TSC_1_0_WRAPR_CLAMP                                  0x00000100
  99 #define NV50TSC_1_0_WRAPR_MIRROR_CLAMP_TO_EDGE                   0x00000140
 100 #define NV50TSC_1_0_WRAPR_MIRROR_CLAMP_TO_BORDER                 0x00000180
 101 #define NV50TSC_1_0_WRAPR_MIRROR_CLAMP                           0x000001c0
 102
 103 #define NV50TSC_1_1_MAGF_MASK                                    0x00000003
 104 #define NV50TSC_1_1_MAGF_NEAREST                                 0x00000001
 105 #define NV50TSC_1_1_MAGF_LINEAR                                  0x00000002
 106 #define NV50TSC_1_1_MINF_MASK                                    0x00000030
 107 #define NV50TSC_1_1_MINF_NEAREST                                 0x00000010
 108 #define NV50TSC_1_1_MINF_LINEAR                                  0x00000020
 109 #define NV50TSC_1_1_MIPF_MASK                                    0x000000c0
 110 #define NV50TSC_1_1_MIPF_NONE                                    0x00000040
 111 #define NV50TSC_1_1_MIPF_NEAREST                                 0x00000080
 112 #define NV50TSC_1_1_MIPF_LINEAR                                  0x000000c0
 113
 114 #define NV50TSC_1_2_UNKNOWN_MASK                                 0xffffffff
 115
 116 #define NV50TSC_1_3_UNKNOWN_MASK                                 0xffffffff
 117
 118 #define NV50TSC_1_4_UNKNOWN_MASK                                 0xffffffff
 119
 120 #define NV50TSC_1_5_UNKNOWN_MASK                                 0xffffffff
 121
 122 #define NV50TSC_1_6_UNKNOWN_MASK                                 0xffffffff
 123
 124 #define NV50TSC_1_7_UNKNOWN_MASK                                 0xffffffff
 125
 126 #endif