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0a4c88c81790f67911daa5006bf1655349d618c4
[mesa.git] / src / gallium / drivers / nv50 / nv50_tgsi_to_nc.c
1 /*
2 * Copyright 2010 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 * SOFTWARE.
21 */
22
23 /* #define NV50_TGSI2NC_DEBUG */
24
25 /* XXX: need to clean this up so we get the typecasting right more naturally */
26
27 #include <unistd.h>
28
29 #include "nv50_context.h"
30 #include "nv50_pc.h"
31
32 #include "pipe/p_shader_tokens.h"
33 #include "tgsi/tgsi_parse.h"
34 #include "tgsi/tgsi_util.h"
35
36 #include "util/u_simple_list.h"
37 #include "tgsi/tgsi_dump.h"
38
39 #define BLD_MAX_TEMPS 64
40 #define BLD_MAX_ADDRS 4
41 #define BLD_MAX_PREDS 4
42 #define BLD_MAX_IMMDS 128
43
44 #define BLD_MAX_COND_NESTING 4
45 #define BLD_MAX_LOOP_NESTING 4
46 #define BLD_MAX_CALL_NESTING 2
47
48 /* collects all values assigned to the same TGSI register */
49 struct bld_value_stack {
50 struct nv_value *top;
51 struct nv_value **body;
52 unsigned size;
53 uint16_t loop_use; /* 1 bit per loop level, indicates if used/defd */
54 uint16_t loop_def;
55 };
56
57 static INLINE void
58 bld_vals_push_val(struct bld_value_stack *stk, struct nv_value *val)
59 {
60 assert(!stk->size || (stk->body[stk->size - 1] != val));
61
62 if (!(stk->size % 8)) {
63 unsigned old_sz = (stk->size + 0) * sizeof(struct nv_value *);
64 unsigned new_sz = (stk->size + 8) * sizeof(struct nv_value *);
65 stk->body = (struct nv_value **)REALLOC(stk->body, old_sz, new_sz);
66 }
67 stk->body[stk->size++] = val;
68 }
69
70 static INLINE boolean
71 bld_vals_del_val(struct bld_value_stack *stk, struct nv_value *val)
72 {
73 unsigned i;
74
75 for (i = stk->size - 1; i >= 0; --i)
76 if (stk->body[i] == val)
77 break;
78 if (i < 0)
79 return FALSE;
80
81 if (i != stk->size - 1)
82 stk->body[i] = stk->body[stk->size - 1];
83
84 --stk->size; /* XXX: old size in REALLOC */
85 return TRUE;
86 }
87
88 static INLINE void
89 bld_vals_push(struct bld_value_stack *stk)
90 {
91 bld_vals_push_val(stk, stk->top);
92 stk->top = NULL;
93 }
94
95 static INLINE void
96 bld_push_values(struct bld_value_stack *stacks, int n)
97 {
98 int i, c;
99
100 for (i = 0; i < n; ++i)
101 for (c = 0; c < 4; ++c)
102 if (stacks[i * 4 + c].top)
103 bld_vals_push(&stacks[i * 4 + c]);
104 }
105
106 struct bld_context {
107 struct nv50_translation_info *ti;
108
109 struct nv_pc *pc;
110 struct nv_basic_block *b;
111
112 struct tgsi_parse_context parse[BLD_MAX_CALL_NESTING];
113 int call_lvl;
114
115 struct nv_basic_block *cond_bb[BLD_MAX_COND_NESTING];
116 struct nv_basic_block *join_bb[BLD_MAX_COND_NESTING];
117 struct nv_basic_block *else_bb[BLD_MAX_COND_NESTING];
118 int cond_lvl;
119 struct nv_basic_block *loop_bb[BLD_MAX_LOOP_NESTING];
120 struct nv_basic_block *brkt_bb[BLD_MAX_LOOP_NESTING];
121 int loop_lvl;
122
123 ubyte out_kind; /* CFG_EDGE_FORWARD, or FAKE in case of BREAK/CONT */
124
125 struct bld_value_stack tvs[BLD_MAX_TEMPS][4]; /* TGSI_FILE_TEMPORARY */
126 struct bld_value_stack avs[BLD_MAX_ADDRS][4]; /* TGSI_FILE_ADDRESS */
127 struct bld_value_stack pvs[BLD_MAX_PREDS][4]; /* TGSI_FILE_PREDICATE */
128 struct bld_value_stack ovs[PIPE_MAX_SHADER_OUTPUTS][4];
129
130 uint32_t outputs_written[(PIPE_MAX_SHADER_OUTPUTS + 31) / 32];
131
132 struct nv_value *frgcrd[4];
133 struct nv_value *sysval[4];
134
135 /* wipe on new BB */
136 struct nv_value *saved_addr[4][2];
137 struct nv_value *saved_inputs[128];
138 struct nv_value *saved_immd[BLD_MAX_IMMDS];
139 uint num_immds;
140 };
141
142 static INLINE ubyte
143 bld_stack_file(struct bld_context *bld, struct bld_value_stack *stk)
144 {
145 if (stk < &bld->avs[0][0])
146 return NV_FILE_GPR;
147 else
148 if (stk < &bld->pvs[0][0])
149 return NV_FILE_ADDR;
150 else
151 if (stk < &bld->ovs[0][0])
152 return NV_FILE_FLAGS;
153 else
154 return NV_FILE_OUT;
155 }
156
157 static INLINE struct nv_value *
158 bld_fetch(struct bld_context *bld, struct bld_value_stack *stk, int i, int c)
159 {
160 stk[i * 4 + c].loop_use |= 1 << bld->loop_lvl;
161
162 return stk[i * 4 + c].top;
163 }
164
165 static struct nv_value *
166 bld_loop_phi(struct bld_context *, struct bld_value_stack *, struct nv_value *);
167
168 /* If a variable is defined in a loop without prior use, we don't need
169 * a phi in the loop header to account for backwards flow.
170 *
171 * However, if this variable is then also used outside the loop, we do
172 * need a phi after all. But we must not use this phi's def inside the
173 * loop, so we can eliminate the phi if it is unused later.
174 */
175 static INLINE void
176 bld_store(struct bld_context *bld, struct bld_value_stack *stk, int i, int c,
177 struct nv_value *val)
178 {
179 const uint16_t m = 1 << bld->loop_lvl;
180
181 stk = &stk[i * 4 + c];
182
183 if (bld->loop_lvl && !(m & (stk->loop_def | stk->loop_use)))
184 bld_loop_phi(bld, stk, val);
185
186 stk->top = val;
187 stk->loop_def |= 1 << bld->loop_lvl;
188 }
189
190 static INLINE void
191 bld_clear_def_use(struct bld_value_stack *stk, int n, int lvl)
192 {
193 int i;
194 const uint16_t mask = ~(1 << lvl);
195
196 for (i = 0; i < n * 4; ++i) {
197 stk[i].loop_def &= mask;
198 stk[i].loop_use &= mask;
199 }
200 }
201
202 #define FETCH_TEMP(i, c) bld_fetch(bld, &bld->tvs[0][0], i, c)
203 #define STORE_TEMP(i, c, v) bld_store(bld, &bld->tvs[0][0], i, c, (v))
204 #define FETCH_ADDR(i, c) bld_fetch(bld, &bld->avs[0][0], i, c)
205 #define STORE_ADDR(i, c, v) bld_store(bld, &bld->avs[0][0], i, c, (v))
206 #define FETCH_PRED(i, c) bld_fetch(bld, &bld->pvs[0][0], i, c)
207 #define STORE_PRED(i, c, v) bld_store(bld, &bld->pvs[0][0], i, c, (v))
208
209 #define STORE_OUTR(i, c, v) \
210 do { \
211 bld->ovs[i][c].top = (v); \
212 bld->outputs_written[(i) / 8] |= 1 << (((i) * 4 + (c)) % 32); \
213 } while (0)
214
215 static INLINE void
216 bld_warn_uninitialized(struct bld_context *bld, int kind,
217 struct bld_value_stack *stk, struct nv_basic_block *b)
218 {
219 long i = (stk - &bld->tvs[0][0]) / 4;
220 long c = (stk - &bld->tvs[0][0]) & 3;
221
222 if (c == 3)
223 c = -1;
224
225 debug_printf("WARNING: TEMP[%li].%c %s used uninitialized in BB:%i\n",
226 i, (int)('x' + c), kind ? "may be" : "is", b->id);
227 }
228
229 static INLINE struct nv_value *
230 bld_def(struct nv_instruction *i, int c, struct nv_value *value)
231 {
232 i->def[c] = value;
233 value->insn = i;
234 return value;
235 }
236
237 static INLINE struct nv_value *
238 find_by_bb(struct bld_value_stack *stack, struct nv_basic_block *b)
239 {
240 int i;
241
242 if (stack->top && stack->top->insn->bb == b)
243 return stack->top;
244
245 for (i = stack->size - 1; i >= 0; --i)
246 if (stack->body[i]->insn->bb == b)
247 return stack->body[i];
248 return NULL;
249 }
250
251 /* fetch value from stack that was defined in the specified basic block,
252 * or search for first definitions in all of its predecessors
253 */
254 static void
255 fetch_by_bb(struct bld_value_stack *stack,
256 struct nv_value **vals, int *n,
257 struct nv_basic_block *b)
258 {
259 int i;
260 struct nv_value *val;
261
262 assert(*n < 16); /* MAX_COND_NESTING */
263
264 val = find_by_bb(stack, b);
265 if (val) {
266 for (i = 0; i < *n; ++i)
267 if (vals[i] == val)
268 return;
269 vals[(*n)++] = val;
270 return;
271 }
272 for (i = 0; i < b->num_in; ++i)
273 if (!IS_WALL_EDGE(b->in_kind[i]))
274 fetch_by_bb(stack, vals, n, b->in[i]);
275 }
276
277 static INLINE struct nv_value *
278 bld_load_imm_u32(struct bld_context *bld, uint32_t u);
279
280 static INLINE struct nv_value *
281 bld_undef(struct bld_context *bld, ubyte file)
282 {
283 struct nv_instruction *nvi = new_instruction(bld->pc, NV_OP_UNDEF);
284
285 return bld_def(nvi, 0, new_value(bld->pc, file, NV_TYPE_U32));
286 }
287
288 static struct nv_value *
289 bld_phi(struct bld_context *bld, struct nv_basic_block *b,
290 struct bld_value_stack *stack)
291 {
292 struct nv_basic_block *in;
293 struct nv_value *vals[16], *val;
294 struct nv_instruction *phi;
295 int i, j, n;
296
297 do {
298 i = n = 0;
299 fetch_by_bb(stack, vals, &n, b);
300
301 if (!n) {
302 bld_warn_uninitialized(bld, 0, stack, b);
303 return NULL;
304 }
305
306 if (n == 1) {
307 if (nvbb_dominated_by(b, vals[0]->insn->bb))
308 break;
309
310 bld_warn_uninitialized(bld, 1, stack, b);
311
312 /* back-tracking to insert missing value of other path */
313 in = b;
314 while (in->in[0]) {
315 if (in->num_in == 1) {
316 in = in->in[0];
317 } else {
318 if (!nvbb_reachable_by(in->in[0], vals[0]->insn->bb, b))
319 in = in->in[0];
320 else
321 if (!nvbb_reachable_by(in->in[1], vals[0]->insn->bb, b))
322 in = in->in[1];
323 else
324 in = in->in[0];
325 }
326 }
327 bld->pc->current_block = in;
328
329 /* should make this a no-op */
330 bld_vals_push_val(stack, bld_undef(bld, vals[0]->reg.file));
331 continue;
332 }
333
334 for (i = 0; i < n; ++i) {
335 /* if value dominates b, continue to the redefinitions */
336 if (nvbb_dominated_by(b, vals[i]->insn->bb))
337 continue;
338
339 /* if value dominates any in-block, b should be the dom frontier */
340 for (j = 0; j < b->num_in; ++j)
341 if (nvbb_dominated_by(b->in[j], vals[i]->insn->bb))
342 break;
343 /* otherwise, find the dominance frontier and put the phi there */
344 if (j == b->num_in) {
345 in = nvbb_dom_frontier(vals[i]->insn->bb);
346 val = bld_phi(bld, in, stack);
347 bld_vals_push_val(stack, val);
348 break;
349 }
350 }
351 } while(i < n);
352
353 bld->pc->current_block = b;
354
355 if (n == 1)
356 return vals[0];
357
358 phi = new_instruction(bld->pc, NV_OP_PHI);
359
360 bld_def(phi, 0, new_value(bld->pc, vals[0]->reg.file, vals[0]->reg.type));
361 for (i = 0; i < n; ++i)
362 phi->src[i] = new_ref(bld->pc, vals[i]);
363
364 return phi->def[0];
365 }
366
367 /* Insert a phi function in the loop header.
368 * For nested loops, we need to insert phi functions in all the outer
369 * loop headers if they don't have one yet.
370 *
371 * @def: redefinition from inside loop, or NULL if to be replaced later
372 */
373 static struct nv_value *
374 bld_loop_phi(struct bld_context *bld, struct bld_value_stack *stack,
375 struct nv_value *def)
376 {
377 struct nv_instruction *phi;
378 struct nv_basic_block *bb = bld->pc->current_block;
379 struct nv_value *val = NULL;
380
381 if (bld->loop_lvl > 1) {
382 --bld->loop_lvl;
383 if (!((stack->loop_def | stack->loop_use) & (1 << bld->loop_lvl)))
384 val = bld_loop_phi(bld, stack, NULL);
385 ++bld->loop_lvl;
386 }
387
388 if (!val)
389 val = bld_phi(bld, bld->pc->current_block, stack); /* old definition */
390 if (!val) {
391 bld->pc->current_block = bld->loop_bb[bld->loop_lvl - 1]->in[0];
392 val = bld_undef(bld, bld_stack_file(bld, stack));
393 }
394
395 bld->pc->current_block = bld->loop_bb[bld->loop_lvl - 1];
396
397 phi = new_instruction(bld->pc, NV_OP_PHI);
398
399 bld_def(phi, 0, new_value_like(bld->pc, val));
400 if (!def)
401 def = phi->def[0];
402
403 bld_vals_push_val(stack, phi->def[0]);
404
405 phi->target = (struct nv_basic_block *)stack; /* cheat */
406
407 nv_reference(bld->pc, &phi->src[0], val);
408 nv_reference(bld->pc, &phi->src[1], def);
409
410 bld->pc->current_block = bb;
411
412 return phi->def[0];
413 }
414
415 static INLINE struct nv_value *
416 bld_fetch_global(struct bld_context *bld, struct bld_value_stack *stack)
417 {
418 const uint16_t m = 1 << bld->loop_lvl;
419 const uint16_t use = stack->loop_use;
420
421 stack->loop_use |= m;
422
423 /* If neither used nor def'd inside the loop, build a phi in foresight,
424 * so we don't have to replace stuff later on, which requires tracking.
425 */
426 if (bld->loop_lvl && !((use | stack->loop_def) & m))
427 return bld_loop_phi(bld, stack, NULL);
428
429 return bld_phi(bld, bld->pc->current_block, stack);
430 }
431
432 static INLINE struct nv_value *
433 bld_imm_u32(struct bld_context *bld, uint32_t u)
434 {
435 int i;
436 unsigned n = bld->num_immds;
437
438 for (i = 0; i < n; ++i)
439 if (bld->saved_immd[i]->reg.imm.u32 == u)
440 return bld->saved_immd[i];
441 assert(n < BLD_MAX_IMMDS);
442
443 bld->num_immds++;
444
445 bld->saved_immd[n] = new_value(bld->pc, NV_FILE_IMM, NV_TYPE_U32);
446 bld->saved_immd[n]->reg.imm.u32 = u;
447 return bld->saved_immd[n];
448 }
449
450 static void
451 bld_replace_value(struct nv_pc *, struct nv_basic_block *, struct nv_value *,
452 struct nv_value *);
453
454 /* Replace the source of the phi in the loop header by the last assignment,
455 * or eliminate the phi function if there is no assignment inside the loop.
456 *
457 * Redundancy situation 1 - (used) but (not redefined) value:
458 * %3 = phi %0, %3 = %3 is used
459 * %3 = phi %0, %4 = is new definition
460 *
461 * Redundancy situation 2 - (not used) but (redefined) value:
462 * %3 = phi %0, %2 = %2 is used, %3 could be used outside, deleted by DCE
463 */
464 static void
465 bld_loop_end(struct bld_context *bld, struct nv_basic_block *bb)
466 {
467 struct nv_basic_block *save = bld->pc->current_block;
468 struct nv_instruction *phi, *next;
469 struct nv_value *val;
470 struct bld_value_stack *stk;
471 int i, s, n;
472
473 for (phi = bb->phi; phi && phi->opcode == NV_OP_PHI; phi = next) {
474 next = phi->next;
475
476 stk = (struct bld_value_stack *)phi->target;
477 phi->target = NULL;
478
479 for (s = 1, n = 0; n < bb->num_in; ++n) {
480 if (bb->in_kind[n] != CFG_EDGE_BACK)
481 continue;
482
483 assert(s < 4);
484 bld->pc->current_block = bb->in[n];
485 val = bld_fetch_global(bld, stk);
486
487 for (i = 0; i < 4; ++i)
488 if (phi->src[i] && phi->src[i]->value == val)
489 break;
490 if (i == 4)
491 nv_reference(bld->pc, &phi->src[s++], val);
492 }
493 bld->pc->current_block = save;
494
495 if (phi->src[0]->value == phi->def[0] ||
496 phi->src[0]->value == phi->src[1]->value)
497 s = 1;
498 else
499 if (phi->src[1]->value == phi->def[0])
500 s = 0;
501 else
502 continue;
503
504 if (s >= 0) {
505 /* eliminate the phi */
506 bld_vals_del_val(stk, phi->def[0]);
507
508 ++bld->pc->pass_seq;
509 bld_replace_value(bld->pc, bb, phi->def[0], phi->src[s]->value);
510
511 nv_nvi_delete(phi);
512 }
513 }
514 }
515
516 static INLINE struct nv_value *
517 bld_imm_f32(struct bld_context *bld, float f)
518 {
519 return bld_imm_u32(bld, fui(f));
520 }
521
522 #define SET_TYPE(v, t) ((v)->reg.type = NV_TYPE_##t)
523
524 static struct nv_value *
525 bld_insn_1(struct bld_context *bld, uint opcode, struct nv_value *src0)
526 {
527 struct nv_instruction *insn = new_instruction(bld->pc, opcode);
528 assert(insn);
529
530 nv_reference(bld->pc, &insn->src[0], src0); /* NOTE: new_ref would suffice */
531
532 return bld_def(insn, 0, new_value(bld->pc, NV_FILE_GPR, src0->reg.type));
533 }
534
535 static struct nv_value *
536 bld_insn_2(struct bld_context *bld, uint opcode,
537 struct nv_value *src0, struct nv_value *src1)
538 {
539 struct nv_instruction *insn = new_instruction(bld->pc, opcode);
540
541 nv_reference(bld->pc, &insn->src[0], src0);
542 nv_reference(bld->pc, &insn->src[1], src1);
543
544 return bld_def(insn, 0, new_value(bld->pc, NV_FILE_GPR, src0->reg.type));
545 }
546
547 static struct nv_value *
548 bld_insn_3(struct bld_context *bld, uint opcode,
549 struct nv_value *src0, struct nv_value *src1,
550 struct nv_value *src2)
551 {
552 struct nv_instruction *insn = new_instruction(bld->pc, opcode);
553
554 nv_reference(bld->pc, &insn->src[0], src0);
555 nv_reference(bld->pc, &insn->src[1], src1);
556 nv_reference(bld->pc, &insn->src[2], src2);
557
558 return bld_def(insn, 0, new_value(bld->pc, NV_FILE_GPR, src0->reg.type));
559 }
560
561 #define BLD_INSN_1_EX(d, op, dt, s0, s0t) \
562 do { \
563 (d) = bld_insn_1(bld, (NV_OP_##op), (s0)); \
564 (d)->reg.type = NV_TYPE_##dt; \
565 (d)->insn->src[0]->typecast = NV_TYPE_##s0t; \
566 } while(0)
567
568 #define BLD_INSN_2_EX(d, op, dt, s0, s0t, s1, s1t) \
569 do { \
570 (d) = bld_insn_2(bld, (NV_OP_##op), (s0), (s1)); \
571 (d)->reg.type = NV_TYPE_##dt; \
572 (d)->insn->src[0]->typecast = NV_TYPE_##s0t; \
573 (d)->insn->src[1]->typecast = NV_TYPE_##s1t; \
574 } while(0)
575
576 static struct nv_value *
577 bld_pow(struct bld_context *bld, struct nv_value *x, struct nv_value *e)
578 {
579 struct nv_value *val;
580
581 BLD_INSN_1_EX(val, LG2, F32, x, F32);
582 BLD_INSN_2_EX(val, MUL, F32, e, F32, val, F32);
583 val = bld_insn_1(bld, NV_OP_PREEX2, val);
584 val = bld_insn_1(bld, NV_OP_EX2, val);
585
586 return val;
587 }
588
589 static INLINE struct nv_value *
590 bld_load_imm_f32(struct bld_context *bld, float f)
591 {
592 return bld_insn_1(bld, NV_OP_MOV, bld_imm_f32(bld, f));
593 }
594
595 static INLINE struct nv_value *
596 bld_load_imm_u32(struct bld_context *bld, uint32_t u)
597 {
598 return bld_insn_1(bld, NV_OP_MOV, bld_imm_u32(bld, u));
599 }
600
601 static struct nv_value *
602 bld_get_address(struct bld_context *bld, int id, struct nv_value *indirect)
603 {
604 int i;
605 struct nv_instruction *nvi;
606
607 for (i = 0; i < 4; ++i) {
608 if (!bld->saved_addr[i][0])
609 break;
610 if (bld->saved_addr[i][1] == indirect) {
611 nvi = bld->saved_addr[i][0]->insn;
612 if (nvi->src[0]->value->reg.imm.u32 == id)
613 return bld->saved_addr[i][0];
614 }
615 }
616 i &= 3;
617
618 bld->saved_addr[i][0] = bld_load_imm_u32(bld, id);
619 bld->saved_addr[i][0]->reg.file = NV_FILE_ADDR;
620 bld->saved_addr[i][1] = indirect;
621 return bld->saved_addr[i][0];
622 }
623
624
625 static struct nv_value *
626 bld_predicate(struct bld_context *bld, struct nv_value *src, boolean bool_only)
627 {
628 struct nv_instruction *nvi = src->insn;
629
630 if (nvi->opcode == NV_OP_LDA ||
631 nvi->opcode == NV_OP_PHI ||
632 nvi->bb != bld->pc->current_block) {
633 nvi = new_instruction(bld->pc, NV_OP_CVT);
634 nv_reference(bld->pc, &nvi->src[0], src);
635 } else
636 if (bool_only) {
637 while (nvi->opcode == NV_OP_ABS || nvi->opcode == NV_OP_CVT ||
638 nvi->opcode == NV_OP_NEG) {
639 /* TGSI SET gets conversion to f32, we only need source 0/~0 */
640 if (!nvi->def[0]->insn->flags_src)
641 nvi = nvi->src[0]->value->insn;
642 }
643 }
644
645 if (!nvi->flags_def) {
646 nvi->flags_def = new_value(bld->pc, NV_FILE_FLAGS, NV_TYPE_U16);
647 nvi->flags_def->insn = nvi;
648 }
649 return nvi->flags_def;
650 }
651
652 static void
653 bld_kil(struct bld_context *bld, struct nv_value *src)
654 {
655 struct nv_instruction *nvi;
656
657 src = bld_predicate(bld, src, FALSE);
658 nvi = new_instruction(bld->pc, NV_OP_KIL);
659 nvi->fixed = 1;
660 nvi->flags_src = new_ref(bld->pc, src);
661 nvi->cc = NV_CC_LT;
662 }
663
664 static void
665 bld_flow(struct bld_context *bld, uint opcode, ubyte cc,
666 struct nv_value *src, struct nv_basic_block *target,
667 boolean plan_reconverge)
668 {
669 struct nv_instruction *nvi;
670
671 if (plan_reconverge)
672 new_instruction(bld->pc, NV_OP_JOINAT)->fixed = 1;
673
674 nvi = new_instruction(bld->pc, opcode);
675 nvi->is_terminator = 1;
676 nvi->cc = cc;
677 nvi->target = target;
678 if (src)
679 nvi->flags_src = new_ref(bld->pc, src);
680 }
681
682 static ubyte
683 translate_setcc(unsigned opcode)
684 {
685 switch (opcode) {
686 case TGSI_OPCODE_SLT: return NV_CC_LT;
687 case TGSI_OPCODE_SGE: return NV_CC_GE;
688 case TGSI_OPCODE_SEQ: return NV_CC_EQ;
689 case TGSI_OPCODE_SGT: return NV_CC_GT;
690 case TGSI_OPCODE_SLE: return NV_CC_LE;
691 case TGSI_OPCODE_SNE: return NV_CC_NE | NV_CC_U;
692 case TGSI_OPCODE_STR: return NV_CC_TR;
693 case TGSI_OPCODE_SFL: return NV_CC_FL;
694
695 case TGSI_OPCODE_ISLT: return NV_CC_LT;
696 case TGSI_OPCODE_ISGE: return NV_CC_GE;
697 case TGSI_OPCODE_USEQ: return NV_CC_EQ;
698 case TGSI_OPCODE_USGE: return NV_CC_GE;
699 case TGSI_OPCODE_USLT: return NV_CC_LT;
700 case TGSI_OPCODE_USNE: return NV_CC_NE;
701 default:
702 assert(0);
703 return NV_CC_FL;
704 }
705 }
706
707 static uint
708 translate_opcode(uint opcode)
709 {
710 switch (opcode) {
711 case TGSI_OPCODE_ABS: return NV_OP_ABS;
712 case TGSI_OPCODE_ADD:
713 case TGSI_OPCODE_SUB:
714 case TGSI_OPCODE_UADD: return NV_OP_ADD;
715 case TGSI_OPCODE_AND: return NV_OP_AND;
716 case TGSI_OPCODE_EX2: return NV_OP_EX2;
717 case TGSI_OPCODE_CEIL: return NV_OP_CEIL;
718 case TGSI_OPCODE_FLR: return NV_OP_FLOOR;
719 case TGSI_OPCODE_TRUNC: return NV_OP_TRUNC;
720 case TGSI_OPCODE_COS: return NV_OP_COS;
721 case TGSI_OPCODE_SIN: return NV_OP_SIN;
722 case TGSI_OPCODE_DDX: return NV_OP_DFDX;
723 case TGSI_OPCODE_DDY: return NV_OP_DFDY;
724 case TGSI_OPCODE_F2I:
725 case TGSI_OPCODE_F2U:
726 case TGSI_OPCODE_I2F:
727 case TGSI_OPCODE_U2F: return NV_OP_CVT;
728 case TGSI_OPCODE_INEG: return NV_OP_NEG;
729 case TGSI_OPCODE_LG2: return NV_OP_LG2;
730 case TGSI_OPCODE_ISHR:
731 case TGSI_OPCODE_USHR: return NV_OP_SHR;
732 case TGSI_OPCODE_MAD:
733 case TGSI_OPCODE_UMAD: return NV_OP_MAD;
734 case TGSI_OPCODE_MAX:
735 case TGSI_OPCODE_IMAX:
736 case TGSI_OPCODE_UMAX: return NV_OP_MAX;
737 case TGSI_OPCODE_MIN:
738 case TGSI_OPCODE_IMIN:
739 case TGSI_OPCODE_UMIN: return NV_OP_MIN;
740 case TGSI_OPCODE_MUL:
741 case TGSI_OPCODE_UMUL: return NV_OP_MUL;
742 case TGSI_OPCODE_OR: return NV_OP_OR;
743 case TGSI_OPCODE_RCP: return NV_OP_RCP;
744 case TGSI_OPCODE_RSQ: return NV_OP_RSQ;
745 case TGSI_OPCODE_SAD: return NV_OP_SAD;
746 case TGSI_OPCODE_SHL: return NV_OP_SHL;
747 case TGSI_OPCODE_SLT:
748 case TGSI_OPCODE_SGE:
749 case TGSI_OPCODE_SEQ:
750 case TGSI_OPCODE_SGT:
751 case TGSI_OPCODE_SLE:
752 case TGSI_OPCODE_SNE:
753 case TGSI_OPCODE_ISLT:
754 case TGSI_OPCODE_ISGE:
755 case TGSI_OPCODE_USEQ:
756 case TGSI_OPCODE_USGE:
757 case TGSI_OPCODE_USLT:
758 case TGSI_OPCODE_USNE: return NV_OP_SET;
759 case TGSI_OPCODE_TEX: return NV_OP_TEX;
760 case TGSI_OPCODE_TXP: return NV_OP_TEX;
761 case TGSI_OPCODE_TXB: return NV_OP_TXB;
762 case TGSI_OPCODE_TXL: return NV_OP_TXL;
763 case TGSI_OPCODE_XOR: return NV_OP_XOR;
764 default:
765 return NV_OP_NOP;
766 }
767 }
768
769 static ubyte
770 infer_src_type(unsigned opcode)
771 {
772 switch (opcode) {
773 case TGSI_OPCODE_MOV:
774 case TGSI_OPCODE_AND:
775 case TGSI_OPCODE_OR:
776 case TGSI_OPCODE_XOR:
777 case TGSI_OPCODE_SAD:
778 case TGSI_OPCODE_U2F:
779 case TGSI_OPCODE_UADD:
780 case TGSI_OPCODE_UDIV:
781 case TGSI_OPCODE_UMOD:
782 case TGSI_OPCODE_UMAD:
783 case TGSI_OPCODE_UMUL:
784 case TGSI_OPCODE_UMAX:
785 case TGSI_OPCODE_UMIN:
786 case TGSI_OPCODE_USEQ:
787 case TGSI_OPCODE_USGE:
788 case TGSI_OPCODE_USLT:
789 case TGSI_OPCODE_USNE:
790 case TGSI_OPCODE_USHR:
791 return NV_TYPE_U32;
792 case TGSI_OPCODE_I2F:
793 case TGSI_OPCODE_IDIV:
794 case TGSI_OPCODE_IMAX:
795 case TGSI_OPCODE_IMIN:
796 case TGSI_OPCODE_INEG:
797 case TGSI_OPCODE_ISGE:
798 case TGSI_OPCODE_ISHR:
799 case TGSI_OPCODE_ISLT:
800 return NV_TYPE_S32;
801 default:
802 return NV_TYPE_F32;
803 }
804 }
805
806 static ubyte
807 infer_dst_type(unsigned opcode)
808 {
809 switch (opcode) {
810 case TGSI_OPCODE_MOV:
811 case TGSI_OPCODE_F2U:
812 case TGSI_OPCODE_AND:
813 case TGSI_OPCODE_OR:
814 case TGSI_OPCODE_XOR:
815 case TGSI_OPCODE_SAD:
816 case TGSI_OPCODE_UADD:
817 case TGSI_OPCODE_UDIV:
818 case TGSI_OPCODE_UMOD:
819 case TGSI_OPCODE_UMAD:
820 case TGSI_OPCODE_UMUL:
821 case TGSI_OPCODE_UMAX:
822 case TGSI_OPCODE_UMIN:
823 case TGSI_OPCODE_USEQ:
824 case TGSI_OPCODE_USGE:
825 case TGSI_OPCODE_USLT:
826 case TGSI_OPCODE_USNE:
827 case TGSI_OPCODE_USHR:
828 return NV_TYPE_U32;
829 case TGSI_OPCODE_F2I:
830 case TGSI_OPCODE_IDIV:
831 case TGSI_OPCODE_IMAX:
832 case TGSI_OPCODE_IMIN:
833 case TGSI_OPCODE_INEG:
834 case TGSI_OPCODE_ISGE:
835 case TGSI_OPCODE_ISHR:
836 case TGSI_OPCODE_ISLT:
837 return NV_TYPE_S32;
838 default:
839 return NV_TYPE_F32;
840 }
841 }
842
843 static void
844 emit_store(struct bld_context *bld, const struct tgsi_full_instruction *inst,
845 unsigned chan, struct nv_value *value)
846 {
847 const struct tgsi_full_dst_register *reg = &inst->Dst[0];
848
849 assert(chan < 4);
850
851 if (inst->Instruction.Opcode != TGSI_OPCODE_MOV)
852 value->reg.type = infer_dst_type(inst->Instruction.Opcode);
853
854 switch (inst->Instruction.Saturate) {
855 case TGSI_SAT_NONE:
856 break;
857 case TGSI_SAT_ZERO_ONE:
858 BLD_INSN_1_EX(value, SAT, F32, value, F32);
859 break;
860 case TGSI_SAT_MINUS_PLUS_ONE:
861 value = bld_insn_2(bld, NV_OP_MAX, value, bld_load_imm_f32(bld, -1.0f));
862 value = bld_insn_2(bld, NV_OP_MIN, value, bld_load_imm_f32(bld, 1.0f));
863 value->reg.type = NV_TYPE_F32;
864 break;
865 }
866
867 switch (reg->Register.File) {
868 case TGSI_FILE_OUTPUT:
869 value = bld_insn_1(bld, NV_OP_MOV, value);
870 value->reg.file = bld->ti->output_file;
871
872 if (bld->ti->p->type == PIPE_SHADER_FRAGMENT) {
873 STORE_OUTR(reg->Register.Index, chan, value);
874 } else {
875 value->insn->fixed = 1;
876 value->reg.id = bld->ti->output_map[reg->Register.Index][chan];
877 }
878 break;
879 case TGSI_FILE_TEMPORARY:
880 assert(reg->Register.Index < BLD_MAX_TEMPS);
881 value->reg.file = NV_FILE_GPR;
882 if (value->insn->bb != bld->pc->current_block)
883 value = bld_insn_1(bld, NV_OP_MOV, value);
884 STORE_TEMP(reg->Register.Index, chan, value);
885 break;
886 case TGSI_FILE_ADDRESS:
887 assert(reg->Register.Index < BLD_MAX_ADDRS);
888 value->reg.file = NV_FILE_ADDR;
889 STORE_ADDR(reg->Register.Index, chan, value);
890 break;
891 }
892 }
893
894 static INLINE uint32_t
895 bld_is_output_written(struct bld_context *bld, int i, int c)
896 {
897 if (c < 0)
898 return bld->outputs_written[i / 8] & (0xf << ((i * 4) % 32));
899 return bld->outputs_written[i / 8] & (1 << ((i * 4 + c) % 32));
900 }
901
902 static void
903 bld_export_outputs(struct bld_context *bld)
904 {
905 struct nv_value *vals[4];
906 struct nv_instruction *nvi;
907 int i, c, n;
908
909 bld_push_values(&bld->ovs[0][0], PIPE_MAX_SHADER_OUTPUTS);
910
911 for (i = 0; i < PIPE_MAX_SHADER_OUTPUTS; ++i) {
912 if (!bld_is_output_written(bld, i, -1))
913 continue;
914 for (n = 0, c = 0; c < 4; ++c) {
915 if (!bld_is_output_written(bld, i, c))
916 continue;
917 vals[n] = bld_fetch_global(bld, &bld->ovs[i][c]);
918 assert(vals[n]);
919 vals[n] = bld_insn_1(bld, NV_OP_MOV, vals[n]);
920 vals[n++]->reg.id = bld->ti->output_map[i][c];
921 }
922 assert(n);
923
924 (nvi = new_instruction(bld->pc, NV_OP_EXPORT))->fixed = 1;
925
926 for (c = 0; c < n; ++c)
927 nvi->src[c] = new_ref(bld->pc, vals[c]);
928 }
929 }
930
931 static void
932 bld_new_block(struct bld_context *bld, struct nv_basic_block *b)
933 {
934 int i;
935
936 bld_push_values(&bld->tvs[0][0], BLD_MAX_TEMPS);
937 bld_push_values(&bld->avs[0][0], BLD_MAX_ADDRS);
938 bld_push_values(&bld->pvs[0][0], BLD_MAX_PREDS);
939 bld_push_values(&bld->ovs[0][0], PIPE_MAX_SHADER_OUTPUTS);
940
941 bld->pc->current_block = b;
942
943 for (i = 0; i < 4; ++i)
944 bld->saved_addr[i][0] = NULL;
945
946 for (i = 0; i < 128; ++i)
947 bld->saved_inputs[i] = NULL;
948
949 bld->out_kind = CFG_EDGE_FORWARD;
950 }
951
952 static struct nv_value *
953 bld_saved_input(struct bld_context *bld, unsigned i, unsigned c)
954 {
955 unsigned idx = bld->ti->input_map[i][c];
956
957 if (bld->ti->p->type != PIPE_SHADER_FRAGMENT)
958 return NULL;
959 if (bld->saved_inputs[idx])
960 return bld->saved_inputs[idx];
961 return NULL;
962 }
963
964 static struct nv_value *
965 bld_interpolate(struct bld_context *bld, unsigned mode, struct nv_value *val)
966 {
967 if (mode & (NV50_INTERP_LINEAR | NV50_INTERP_FLAT))
968 val = bld_insn_1(bld, NV_OP_LINTERP, val);
969 else
970 val = bld_insn_2(bld, NV_OP_PINTERP, val, bld->frgcrd[3]);
971
972 val->insn->flat = (mode & NV50_INTERP_FLAT) ? 1 : 0;
973 val->insn->centroid = (mode & NV50_INTERP_CENTROID) ? 1 : 0;
974 return val;
975 }
976
977 static struct nv_value *
978 emit_fetch(struct bld_context *bld, const struct tgsi_full_instruction *insn,
979 const unsigned s, const unsigned chan)
980 {
981 const struct tgsi_full_src_register *src = &insn->Src[s];
982 struct nv_value *res;
983 unsigned idx, swz, dim_idx, ind_idx, ind_swz;
984 ubyte type = infer_src_type(insn->Instruction.Opcode);
985
986 idx = src->Register.Index;
987 swz = tgsi_util_get_full_src_register_swizzle(src, chan);
988 dim_idx = -1;
989 ind_idx = -1;
990 ind_swz = 0;
991
992 if (src->Register.Indirect) {
993 ind_idx = src->Indirect.Index;
994 ind_swz = tgsi_util_get_src_register_swizzle(&src->Indirect, 0);
995 }
996
997 switch (src->Register.File) {
998 case TGSI_FILE_CONSTANT:
999 dim_idx = src->Dimension.Index ? src->Dimension.Index + 2 : 1;
1000 assert(dim_idx < 14);
1001 assert(dim_idx == 1); /* for now */
1002
1003 res = new_value(bld->pc, NV_FILE_MEM_C(dim_idx), type);
1004 res->reg.type = type;
1005 res->reg.id = (idx * 4 + swz) & 127;
1006 res = bld_insn_1(bld, NV_OP_LDA, res);
1007
1008 if (src->Register.Indirect)
1009 res->insn->src[4] = new_ref(bld->pc, FETCH_ADDR(ind_idx, ind_swz));
1010 if (idx >= (128 / 4))
1011 res->insn->src[4] =
1012 new_ref(bld->pc, bld_get_address(bld, (idx * 16) & ~0x1ff, NULL));
1013 break;
1014 case TGSI_FILE_IMMEDIATE:
1015 assert(idx < bld->ti->immd32_nr);
1016 res = bld_load_imm_u32(bld, bld->ti->immd32[idx * 4 + swz]);
1017 res->reg.type = type;
1018 break;
1019 case TGSI_FILE_INPUT:
1020 res = bld_saved_input(bld, idx, swz);
1021 if (res && (insn->Instruction.Opcode != TGSI_OPCODE_TXP))
1022 return res;
1023
1024 res = new_value(bld->pc, bld->ti->input_file, type);
1025 res->reg.id = bld->ti->input_map[idx][swz];
1026
1027 if (res->reg.file == NV_FILE_MEM_V) {
1028 res = bld_interpolate(bld, bld->ti->interp_mode[idx], res);
1029 } else {
1030 assert(src->Dimension.Dimension == 0);
1031 res = bld_insn_1(bld, NV_OP_LDA, res);
1032 }
1033 assert(res->reg.type == type);
1034
1035 bld->saved_inputs[bld->ti->input_map[idx][swz]] = res;
1036 break;
1037 case TGSI_FILE_TEMPORARY:
1038 /* this should be load from l[], with reload elimination later on */
1039 res = bld_fetch_global(bld, &bld->tvs[idx][swz]);
1040 break;
1041 case TGSI_FILE_ADDRESS:
1042 res = bld_fetch_global(bld, &bld->avs[idx][swz]);
1043 break;
1044 case TGSI_FILE_PREDICATE:
1045 res = bld_fetch_global(bld, &bld->pvs[idx][swz]);
1046 break;
1047 default:
1048 NOUVEAU_ERR("illegal/unhandled src reg file: %d\n", src->Register.File);
1049 abort();
1050 break;
1051 }
1052 if (!res)
1053 return bld_undef(bld, NV_FILE_GPR);
1054
1055 switch (tgsi_util_get_full_src_register_sign_mode(src, chan)) {
1056 case TGSI_UTIL_SIGN_KEEP:
1057 break;
1058 case TGSI_UTIL_SIGN_CLEAR:
1059 res = bld_insn_1(bld, NV_OP_ABS, res);
1060 break;
1061 case TGSI_UTIL_SIGN_TOGGLE:
1062 res = bld_insn_1(bld, NV_OP_NEG, res);
1063 break;
1064 case TGSI_UTIL_SIGN_SET:
1065 res = bld_insn_1(bld, NV_OP_ABS, res);
1066 res = bld_insn_1(bld, NV_OP_NEG, res);
1067 break;
1068 default:
1069 NOUVEAU_ERR("illegal/unhandled src reg sign mode\n");
1070 abort();
1071 break;
1072 }
1073
1074 return res;
1075 }
1076
1077 static void
1078 bld_lit(struct bld_context *bld, struct nv_value *dst0[4],
1079 const struct tgsi_full_instruction *insn)
1080 {
1081 struct nv_value *val0, *zero;
1082 unsigned mask = insn->Dst[0].Register.WriteMask;
1083
1084 if (mask & ((1 << 0) | (1 << 3)))
1085 dst0[3] = dst0[0] = bld_load_imm_f32(bld, 1.0f);
1086
1087 if (mask & (3 << 1)) {
1088 zero = bld_load_imm_f32(bld, 0.0f);
1089 val0 = bld_insn_2(bld, NV_OP_MAX, emit_fetch(bld, insn, 0, 0), zero);
1090
1091 if (mask & (1 << 1))
1092 dst0[1] = val0;
1093 }
1094
1095 if (mask & (1 << 2)) {
1096 struct nv_value *val1, *val3, *src1, *src3;
1097 struct nv_value *pos128 = bld_load_imm_f32(bld, 127.999999f);
1098 struct nv_value *neg128 = bld_load_imm_f32(bld, -127.999999f);
1099
1100 src1 = emit_fetch(bld, insn, 0, 1);
1101 src3 = emit_fetch(bld, insn, 0, 3);
1102
1103 val0->insn->flags_def = new_value(bld->pc, NV_FILE_FLAGS, NV_TYPE_U16);
1104 val0->insn->flags_def->insn = val0->insn;
1105
1106 val1 = bld_insn_2(bld, NV_OP_MAX, src1, zero);
1107 val3 = bld_insn_2(bld, NV_OP_MAX, src3, neg128);
1108 val3 = bld_insn_2(bld, NV_OP_MIN, val3, pos128);
1109 val3 = bld_pow(bld, val1, val3);
1110
1111 dst0[2] = bld_insn_1(bld, NV_OP_MOV, zero);
1112 dst0[2]->insn->cc = NV_CC_LE;
1113 dst0[2]->insn->flags_src = new_ref(bld->pc, val0->insn->flags_def);
1114
1115 dst0[2] = bld_insn_2(bld, NV_OP_SELECT, val3, dst0[2]);
1116 }
1117 }
1118
1119 static INLINE void
1120 get_tex_dim(const struct tgsi_full_instruction *insn, int *dim, int *arg)
1121 {
1122 switch (insn->Texture.Texture) {
1123 case TGSI_TEXTURE_1D:
1124 *arg = *dim = 1;
1125 break;
1126 case TGSI_TEXTURE_SHADOW1D:
1127 *dim = 1;
1128 *arg = 2;
1129 break;
1130 case TGSI_TEXTURE_UNKNOWN:
1131 case TGSI_TEXTURE_2D:
1132 case TGSI_TEXTURE_RECT:
1133 *arg = *dim = 2;
1134 break;
1135 case TGSI_TEXTURE_SHADOW2D:
1136 case TGSI_TEXTURE_SHADOWRECT:
1137 *dim = 2;
1138 *arg = 3;
1139 break;
1140 case TGSI_TEXTURE_3D:
1141 case TGSI_TEXTURE_CUBE:
1142 *dim = *arg = 3;
1143 break;
1144 default:
1145 assert(0);
1146 break;
1147 }
1148 }
1149
1150 static void
1151 load_proj_tex_coords(struct bld_context *bld,
1152 struct nv_value *t[4], int dim,
1153 const struct tgsi_full_instruction *insn)
1154 {
1155 int c, mask = 0;
1156
1157 t[3] = emit_fetch(bld, insn, 0, 3);
1158
1159 if (t[3]->insn->opcode == NV_OP_PINTERP) {
1160 t[3]->insn->opcode = NV_OP_LINTERP;
1161 nv_reference(bld->pc, &t[3]->insn->src[1], NULL);
1162 }
1163
1164 t[3] = bld_insn_1(bld, NV_OP_RCP, t[3]);
1165
1166 for (c = 0; c < dim; ++c) {
1167 t[c] = emit_fetch(bld, insn, 0, c);
1168 if (t[c]->insn->opcode == NV_OP_LINTERP)
1169 t[c]->insn->opcode = NV_OP_PINTERP;
1170
1171 if (t[c]->insn->opcode == NV_OP_PINTERP)
1172 nv_reference(bld->pc, &t[c]->insn->src[1], t[3]);
1173 else
1174 mask |= 1 << c;
1175 }
1176
1177 for (c = 0; mask; ++c, mask >>= 1) {
1178 if (!(mask & 1))
1179 continue;
1180 t[c] = bld_insn_2(bld, NV_OP_MUL, t[c], t[3]);
1181 }
1182 }
1183
1184 static void
1185 bld_tex(struct bld_context *bld, struct nv_value *dst0[4],
1186 const struct tgsi_full_instruction *insn)
1187 {
1188 struct nv_value *t[4];
1189 struct nv_instruction *nvi;
1190 uint opcode = translate_opcode(insn->Instruction.Opcode);
1191 int arg, dim, c;
1192
1193 get_tex_dim(insn, &dim, &arg);
1194
1195 if (insn->Texture.Texture == TGSI_TEXTURE_CUBE) {
1196 }
1197 // else
1198 if (insn->Instruction.Opcode == TGSI_OPCODE_TXP) {
1199 load_proj_tex_coords(bld, t, dim, insn);
1200 } else
1201 for (c = 0; c < dim; ++c)
1202 t[c] = emit_fetch(bld, insn, 0, c);
1203
1204 if (arg != dim)
1205 t[dim] = emit_fetch(bld, insn, 0, 2);
1206
1207 if (insn->Instruction.Opcode == TGSI_OPCODE_TXB ||
1208 insn->Instruction.Opcode == TGSI_OPCODE_TXL) {
1209 t[arg++] = emit_fetch(bld, insn, 0, 3);
1210 }
1211
1212 for (c = 0; c < arg; ++c) {
1213 t[c] = bld_insn_1(bld, NV_OP_MOV, t[c]);
1214 t[c]->reg.type = NV_TYPE_F32;
1215 }
1216
1217 nvi = new_instruction(bld->pc, opcode);
1218
1219 for (c = 0; c < 4; ++c) {
1220 nvi->def[c] = dst0[c] = new_value(bld->pc, NV_FILE_GPR, NV_TYPE_F32);
1221 nvi->def[c]->insn = nvi;
1222 }
1223 for (c = 0; c < arg; ++c)
1224 nvi->src[c] = new_ref(bld->pc, t[c]);
1225
1226 nvi->tex_t = insn->Src[1].Register.Index;
1227 nvi->tex_s = 0;
1228 nvi->tex_mask = 0xf;
1229 nvi->tex_cube = (insn->Texture.Texture == TGSI_TEXTURE_CUBE) ? 1 : 0;
1230 nvi->tex_live = 0;
1231 nvi->tex_argc = arg;
1232 }
1233
1234 static INLINE struct nv_value *
1235 bld_dot(struct bld_context *bld, const struct tgsi_full_instruction *insn,
1236 int n)
1237 {
1238 struct nv_value *dotp, *src0, *src1;
1239 int c;
1240
1241 src0 = emit_fetch(bld, insn, 0, 0);
1242 src1 = emit_fetch(bld, insn, 1, 0);
1243 dotp = bld_insn_2(bld, NV_OP_MUL, src0, src1);
1244
1245 for (c = 1; c < n; ++c) {
1246 src0 = emit_fetch(bld, insn, 0, c);
1247 src1 = emit_fetch(bld, insn, 1, c);
1248 dotp = bld_insn_3(bld, NV_OP_MAD, src0, src1, dotp);
1249 }
1250 return dotp;
1251 }
1252
1253 #define FOR_EACH_DST0_ENABLED_CHANNEL(chan, inst) \
1254 for (chan = 0; chan < 4; ++chan) \
1255 if ((inst)->Dst[0].Register.WriteMask & (1 << chan))
1256
1257 static void
1258 bld_instruction(struct bld_context *bld,
1259 const struct tgsi_full_instruction *insn)
1260 {
1261 struct nv_value *src0;
1262 struct nv_value *src1;
1263 struct nv_value *src2;
1264 struct nv_value *dst0[4];
1265 struct nv_value *temp;
1266 int c;
1267 uint opcode = translate_opcode(insn->Instruction.Opcode);
1268
1269 #ifdef NV50_TGSI2NC_DEBUG
1270 debug_printf("bld_instruction:"); tgsi_dump_instruction(insn, 1);
1271 #endif
1272
1273 switch (insn->Instruction.Opcode) {
1274 case TGSI_OPCODE_ADD:
1275 case TGSI_OPCODE_MAX:
1276 case TGSI_OPCODE_MIN:
1277 case TGSI_OPCODE_MUL:
1278 FOR_EACH_DST0_ENABLED_CHANNEL(c, insn) {
1279 src0 = emit_fetch(bld, insn, 0, c);
1280 src1 = emit_fetch(bld, insn, 1, c);
1281 dst0[c] = bld_insn_2(bld, opcode, src0, src1);
1282 }
1283 break;
1284 case TGSI_OPCODE_ARL:
1285 src1 = bld_imm_u32(bld, 4);
1286 FOR_EACH_DST0_ENABLED_CHANNEL(c, insn) {
1287 src0 = emit_fetch(bld, insn, 0, c);
1288 (temp = bld_insn_1(bld, NV_OP_FLOOR, src0))->reg.type = NV_TYPE_S32;
1289 dst0[c] = bld_insn_2(bld, NV_OP_SHL, temp, src1);
1290 }
1291 break;
1292 case TGSI_OPCODE_CMP:
1293 FOR_EACH_DST0_ENABLED_CHANNEL(c, insn) {
1294 src0 = emit_fetch(bld, insn, 0, c);
1295 src1 = emit_fetch(bld, insn, 1, c);
1296 src2 = emit_fetch(bld, insn, 2, c);
1297 src0 = bld_predicate(bld, src0, FALSE);
1298
1299 src1 = bld_insn_1(bld, NV_OP_MOV, src1);
1300 src1->insn->flags_src = new_ref(bld->pc, src0);
1301 src1->insn->cc = NV_CC_LT;
1302
1303 src2 = bld_insn_1(bld, NV_OP_MOV, src2);
1304 src2->insn->flags_src = new_ref(bld->pc, src0);
1305 src2->insn->cc = NV_CC_GE;
1306
1307 dst0[c] = bld_insn_2(bld, NV_OP_SELECT, src1, src2);
1308 }
1309 break;
1310 case TGSI_OPCODE_COS:
1311 case TGSI_OPCODE_SIN:
1312 src0 = emit_fetch(bld, insn, 0, 0);
1313 temp = bld_insn_1(bld, NV_OP_PRESIN, src0);
1314 if (insn->Dst[0].Register.WriteMask & 7)
1315 temp = bld_insn_1(bld, opcode, temp);
1316 for (c = 0; c < 3; ++c)
1317 if (insn->Dst[0].Register.WriteMask & (1 << c))
1318 dst0[c] = temp;
1319 if (!(insn->Dst[0].Register.WriteMask & (1 << 3)))
1320 break;
1321 src0 = emit_fetch(bld, insn, 0, 3);
1322 temp = bld_insn_1(bld, NV_OP_PRESIN, src0);
1323 dst0[3] = bld_insn_1(bld, opcode, temp);
1324 break;
1325 case TGSI_OPCODE_DP2:
1326 temp = bld_dot(bld, insn, 2);
1327 FOR_EACH_DST0_ENABLED_CHANNEL(c, insn)
1328 dst0[c] = temp;
1329 break;
1330 case TGSI_OPCODE_DP3:
1331 temp = bld_dot(bld, insn, 3);
1332 FOR_EACH_DST0_ENABLED_CHANNEL(c, insn)
1333 dst0[c] = temp;
1334 break;
1335 case TGSI_OPCODE_DP4:
1336 temp = bld_dot(bld, insn, 4);
1337 FOR_EACH_DST0_ENABLED_CHANNEL(c, insn)
1338 dst0[c] = temp;
1339 break;
1340 case TGSI_OPCODE_DPH:
1341 src0 = bld_dot(bld, insn, 3);
1342 src1 = emit_fetch(bld, insn, 1, 3);
1343 temp = bld_insn_2(bld, NV_OP_ADD, src0, src1);
1344 FOR_EACH_DST0_ENABLED_CHANNEL(c, insn)
1345 dst0[c] = temp;
1346 break;
1347 case TGSI_OPCODE_DST:
1348 if (insn->Dst[0].Register.WriteMask & 1)
1349 dst0[0] = bld_imm_f32(bld, 1.0f);
1350 if (insn->Dst[0].Register.WriteMask & 2) {
1351 src0 = emit_fetch(bld, insn, 0, 1);
1352 src1 = emit_fetch(bld, insn, 1, 1);
1353 dst0[1] = bld_insn_2(bld, NV_OP_MUL, src0, src1);
1354 }
1355 if (insn->Dst[0].Register.WriteMask & 4)
1356 dst0[2] = emit_fetch(bld, insn, 0, 2);
1357 if (insn->Dst[0].Register.WriteMask & 8)
1358 dst0[3] = emit_fetch(bld, insn, 1, 3);
1359 break;
1360 case TGSI_OPCODE_EX2:
1361 src0 = emit_fetch(bld, insn, 0, 0);
1362 temp = bld_insn_1(bld, NV_OP_PREEX2, src0);
1363 temp = bld_insn_1(bld, NV_OP_EX2, temp);
1364 FOR_EACH_DST0_ENABLED_CHANNEL(c, insn)
1365 dst0[c] = temp;
1366 break;
1367 case TGSI_OPCODE_FRC:
1368 FOR_EACH_DST0_ENABLED_CHANNEL(c, insn) {
1369 src0 = emit_fetch(bld, insn, 0, c);
1370 dst0[c] = bld_insn_1(bld, NV_OP_FLOOR, src0);
1371 dst0[c] = bld_insn_2(bld, NV_OP_SUB, src0, dst0[c]);
1372 }
1373 break;
1374 case TGSI_OPCODE_KIL:
1375 for (c = 0; c < 4; ++c) {
1376 src0 = emit_fetch(bld, insn, 0, c);
1377 bld_kil(bld, src0);
1378 }
1379 break;
1380 case TGSI_OPCODE_KILP:
1381 (new_instruction(bld->pc, NV_OP_KIL))->fixed = 1;
1382 break;
1383 case TGSI_OPCODE_IF:
1384 {
1385 struct nv_basic_block *b = new_basic_block(bld->pc);
1386
1387 nvbb_attach_block(bld->pc->current_block, b, CFG_EDGE_FORWARD);
1388
1389 bld->join_bb[bld->cond_lvl] = bld->pc->current_block;
1390 bld->cond_bb[bld->cond_lvl] = bld->pc->current_block;
1391
1392 src1 = bld_predicate(bld, emit_fetch(bld, insn, 0, 0), TRUE);
1393
1394 bld_flow(bld, NV_OP_BRA, NV_CC_EQ, src1, NULL, (bld->cond_lvl == 0));
1395
1396 ++bld->cond_lvl;
1397 bld_new_block(bld, b);
1398 }
1399 break;
1400 case TGSI_OPCODE_ELSE:
1401 {
1402 struct nv_basic_block *b = new_basic_block(bld->pc);
1403
1404 --bld->cond_lvl;
1405 nvbb_attach_block(bld->join_bb[bld->cond_lvl], b, CFG_EDGE_FORWARD);
1406
1407 bld->cond_bb[bld->cond_lvl]->exit->target = b;
1408 bld->cond_bb[bld->cond_lvl] = bld->pc->current_block;
1409
1410 new_instruction(bld->pc, NV_OP_BRA)->is_terminator = 1;
1411
1412 ++bld->cond_lvl;
1413 bld_new_block(bld, b);
1414 }
1415 break;
1416 case TGSI_OPCODE_ENDIF:
1417 {
1418 struct nv_basic_block *b = new_basic_block(bld->pc);
1419
1420 --bld->cond_lvl;
1421 nvbb_attach_block(bld->pc->current_block, b, bld->out_kind);
1422 nvbb_attach_block(bld->cond_bb[bld->cond_lvl], b, CFG_EDGE_FORWARD);
1423
1424 bld->cond_bb[bld->cond_lvl]->exit->target = b;
1425
1426 bld_new_block(bld, b);
1427
1428 if (!bld->cond_lvl && bld->join_bb[bld->cond_lvl]) {
1429 bld->join_bb[bld->cond_lvl]->exit->prev->target = b;
1430 new_instruction(bld->pc, NV_OP_JOIN)->is_join = TRUE;
1431 }
1432 }
1433 break;
1434 case TGSI_OPCODE_BGNLOOP:
1435 {
1436 struct nv_basic_block *bl = new_basic_block(bld->pc);
1437 struct nv_basic_block *bb = new_basic_block(bld->pc);
1438
1439 bld->loop_bb[bld->loop_lvl] = bl;
1440 bld->brkt_bb[bld->loop_lvl] = bb;
1441
1442 bld_flow(bld, NV_OP_BREAKADDR, NV_CC_TR, NULL, bb, FALSE);
1443
1444 nvbb_attach_block(bld->pc->current_block, bl, CFG_EDGE_LOOP_ENTER);
1445
1446 bld_new_block(bld, bld->loop_bb[bld->loop_lvl++]);
1447
1448 if (bld->loop_lvl == bld->pc->loop_nesting_bound)
1449 bld->pc->loop_nesting_bound++;
1450
1451 bld_clear_def_use(&bld->tvs[0][0], BLD_MAX_TEMPS, bld->loop_lvl);
1452 bld_clear_def_use(&bld->avs[0][0], BLD_MAX_ADDRS, bld->loop_lvl);
1453 bld_clear_def_use(&bld->pvs[0][0], BLD_MAX_PREDS, bld->loop_lvl);
1454 }
1455 break;
1456 case TGSI_OPCODE_BRK:
1457 {
1458 struct nv_basic_block *bb = bld->brkt_bb[bld->loop_lvl - 1];
1459
1460 bld_flow(bld, NV_OP_BREAK, NV_CC_TR, NULL, bb, FALSE);
1461
1462 if (bld->out_kind == CFG_EDGE_FORWARD) /* else we already had BRK/CONT */
1463 nvbb_attach_block(bld->pc->current_block, bb, CFG_EDGE_LOOP_LEAVE);
1464
1465 bld->out_kind = CFG_EDGE_FAKE;
1466 }
1467 break;
1468 case TGSI_OPCODE_CONT:
1469 {
1470 struct nv_basic_block *bb = bld->loop_bb[bld->loop_lvl - 1];
1471
1472 bld_flow(bld, NV_OP_BRA, NV_CC_TR, NULL, bb, FALSE);
1473
1474 nvbb_attach_block(bld->pc->current_block, bb, CFG_EDGE_BACK);
1475
1476 if ((bb = bld->join_bb[bld->cond_lvl - 1])) {
1477 bld->join_bb[bld->cond_lvl - 1] = NULL;
1478 nv_nvi_delete(bb->exit->prev);
1479 }
1480 bld->out_kind = CFG_EDGE_FAKE;
1481 }
1482 break;
1483 case TGSI_OPCODE_ENDLOOP:
1484 {
1485 struct nv_basic_block *bb = bld->loop_bb[bld->loop_lvl - 1];
1486
1487 bld_flow(bld, NV_OP_BRA, NV_CC_TR, NULL, bb, FALSE);
1488
1489 nvbb_attach_block(bld->pc->current_block, bb, CFG_EDGE_BACK);
1490
1491 bld_loop_end(bld, bb); /* replace loop-side operand of the phis */
1492
1493 bld_new_block(bld, bld->brkt_bb[--bld->loop_lvl]);
1494 }
1495 break;
1496 case TGSI_OPCODE_ABS:
1497 case TGSI_OPCODE_CEIL:
1498 case TGSI_OPCODE_FLR:
1499 case TGSI_OPCODE_TRUNC:
1500 case TGSI_OPCODE_DDX:
1501 case TGSI_OPCODE_DDY:
1502 FOR_EACH_DST0_ENABLED_CHANNEL(c, insn) {
1503 src0 = emit_fetch(bld, insn, 0, c);
1504 dst0[c] = bld_insn_1(bld, opcode, src0);
1505 }
1506 break;
1507 case TGSI_OPCODE_LIT:
1508 bld_lit(bld, dst0, insn);
1509 break;
1510 case TGSI_OPCODE_LRP:
1511 FOR_EACH_DST0_ENABLED_CHANNEL(c, insn) {
1512 src0 = emit_fetch(bld, insn, 0, c);
1513 src1 = emit_fetch(bld, insn, 1, c);
1514 src2 = emit_fetch(bld, insn, 2, c);
1515 dst0[c] = bld_insn_2(bld, NV_OP_SUB, src1, src2);
1516 dst0[c] = bld_insn_3(bld, NV_OP_MAD, dst0[c], src0, src2);
1517 }
1518 break;
1519 case TGSI_OPCODE_MOV:
1520 FOR_EACH_DST0_ENABLED_CHANNEL(c, insn)
1521 dst0[c] = emit_fetch(bld, insn, 0, c);
1522 break;
1523 case TGSI_OPCODE_MAD:
1524 FOR_EACH_DST0_ENABLED_CHANNEL(c, insn) {
1525 src0 = emit_fetch(bld, insn, 0, c);
1526 src1 = emit_fetch(bld, insn, 1, c);
1527 src2 = emit_fetch(bld, insn, 2, c);
1528 dst0[c] = bld_insn_3(bld, opcode, src0, src1, src2);
1529 }
1530 break;
1531 case TGSI_OPCODE_POW:
1532 src0 = emit_fetch(bld, insn, 0, 0);
1533 src1 = emit_fetch(bld, insn, 1, 0);
1534 temp = bld_pow(bld, src0, src1);
1535 FOR_EACH_DST0_ENABLED_CHANNEL(c, insn)
1536 dst0[c] = temp;
1537 break;
1538 case TGSI_OPCODE_RCP:
1539 case TGSI_OPCODE_LG2:
1540 src0 = emit_fetch(bld, insn, 0, 0);
1541 temp = bld_insn_1(bld, opcode, src0);
1542 FOR_EACH_DST0_ENABLED_CHANNEL(c, insn)
1543 dst0[c] = temp;
1544 break;
1545 case TGSI_OPCODE_RSQ:
1546 src0 = emit_fetch(bld, insn, 0, 0);
1547 temp = bld_insn_1(bld, NV_OP_ABS, src0);
1548 temp = bld_insn_1(bld, NV_OP_RSQ, temp);
1549 FOR_EACH_DST0_ENABLED_CHANNEL(c, insn)
1550 dst0[c] = temp;
1551 break;
1552 case TGSI_OPCODE_SLT:
1553 case TGSI_OPCODE_SGE:
1554 case TGSI_OPCODE_SEQ:
1555 case TGSI_OPCODE_SGT:
1556 case TGSI_OPCODE_SLE:
1557 case TGSI_OPCODE_SNE:
1558 case TGSI_OPCODE_ISLT:
1559 case TGSI_OPCODE_ISGE:
1560 case TGSI_OPCODE_USEQ:
1561 case TGSI_OPCODE_USGE:
1562 case TGSI_OPCODE_USLT:
1563 case TGSI_OPCODE_USNE:
1564 FOR_EACH_DST0_ENABLED_CHANNEL(c, insn) {
1565 src0 = emit_fetch(bld, insn, 0, c);
1566 src1 = emit_fetch(bld, insn, 1, c);
1567 dst0[c] = bld_insn_2(bld, NV_OP_SET, src0, src1);
1568 dst0[c]->insn->set_cond = translate_setcc(insn->Instruction.Opcode);
1569 dst0[c]->reg.type = infer_dst_type(insn->Instruction.Opcode);
1570
1571 dst0[c]->insn->src[0]->typecast =
1572 dst0[c]->insn->src[1]->typecast =
1573 infer_src_type(insn->Instruction.Opcode);
1574
1575 if (dst0[c]->reg.type != NV_TYPE_F32)
1576 break;
1577 dst0[c] = bld_insn_1(bld, NV_OP_ABS, dst0[c]);
1578 dst0[c]->insn->src[0]->typecast = NV_TYPE_S32;
1579 dst0[c]->reg.type = NV_TYPE_S32;
1580 dst0[c] = bld_insn_1(bld, NV_OP_CVT, dst0[c]);
1581 dst0[c]->reg.type = NV_TYPE_F32;
1582 }
1583 break;
1584 case TGSI_OPCODE_SCS:
1585 if (insn->Dst[0].Register.WriteMask & 0x3) {
1586 src0 = emit_fetch(bld, insn, 0, 0);
1587 temp = bld_insn_1(bld, NV_OP_PRESIN, src0);
1588 if (insn->Dst[0].Register.WriteMask & 0x1)
1589 dst0[0] = bld_insn_1(bld, NV_OP_COS, temp);
1590 if (insn->Dst[0].Register.WriteMask & 0x2)
1591 dst0[1] = bld_insn_1(bld, NV_OP_SIN, temp);
1592 }
1593 if (insn->Dst[0].Register.WriteMask & 0x4)
1594 dst0[2] = bld_imm_f32(bld, 0.0f);
1595 if (insn->Dst[0].Register.WriteMask & 0x8)
1596 dst0[3] = bld_imm_f32(bld, 1.0f);
1597 break;
1598 case TGSI_OPCODE_SSG:
1599 FOR_EACH_DST0_ENABLED_CHANNEL(c, insn) {
1600 src0 = emit_fetch(bld, insn, 0, c);
1601 src1 = bld_predicate(bld, src0, FALSE);
1602 temp = bld_insn_2(bld, NV_OP_AND, src0, bld_imm_u32(bld, 0x80000000));
1603 temp = bld_insn_2(bld, NV_OP_OR, temp, bld_imm_f32(bld, 1.0f));
1604 dst0[c] = bld_insn_2(bld, NV_OP_XOR, temp, temp);
1605 dst0[c]->insn->cc = NV_CC_EQ;
1606 nv_reference(bld->pc, &dst0[c]->insn->flags_src, src1);
1607 }
1608 break;
1609 case TGSI_OPCODE_SUB:
1610 FOR_EACH_DST0_ENABLED_CHANNEL(c, insn) {
1611 src0 = emit_fetch(bld, insn, 0, c);
1612 src1 = emit_fetch(bld, insn, 1, c);
1613 dst0[c] = bld_insn_2(bld, NV_OP_ADD, src0, src1);
1614 dst0[c]->insn->src[1]->mod ^= NV_MOD_NEG;
1615 }
1616 break;
1617 case TGSI_OPCODE_TEX:
1618 case TGSI_OPCODE_TXB:
1619 case TGSI_OPCODE_TXL:
1620 case TGSI_OPCODE_TXP:
1621 bld_tex(bld, dst0, insn);
1622 break;
1623 case TGSI_OPCODE_XPD:
1624 FOR_EACH_DST0_ENABLED_CHANNEL(c, insn) {
1625 if (c == 3) {
1626 dst0[3] = bld_imm_f32(bld, 1.0f);
1627 break;
1628 }
1629 src0 = emit_fetch(bld, insn, 0, (c + 1) % 3);
1630 src1 = emit_fetch(bld, insn, 1, (c + 2) % 3);
1631 dst0[c] = bld_insn_2(bld, NV_OP_MUL, src0, src1);
1632
1633 src0 = emit_fetch(bld, insn, 0, (c + 2) % 3);
1634 src1 = emit_fetch(bld, insn, 1, (c + 1) % 3);
1635 dst0[c] = bld_insn_3(bld, NV_OP_MAD, src0, src1, dst0[c]);
1636
1637 dst0[c]->insn->src[2]->mod ^= NV_MOD_NEG;
1638 }
1639 break;
1640 case TGSI_OPCODE_RET:
1641 (new_instruction(bld->pc, NV_OP_RET))->fixed = 1;
1642 break;
1643 case TGSI_OPCODE_END:
1644 if (bld->ti->p->type == PIPE_SHADER_FRAGMENT)
1645 bld_export_outputs(bld);
1646 break;
1647 default:
1648 NOUVEAU_ERR("unhandled opcode %u\n", insn->Instruction.Opcode);
1649 abort();
1650 break;
1651 }
1652
1653 FOR_EACH_DST0_ENABLED_CHANNEL(c, insn)
1654 emit_store(bld, insn, c, dst0[c]);
1655 }
1656
1657 static INLINE void
1658 bld_free_value_trackers(struct bld_value_stack *base, int n)
1659 {
1660 int i, c;
1661
1662 for (i = 0; i < n; ++i)
1663 for (c = 0; c < 4; ++c)
1664 if (base[i * 4 + c].body)
1665 FREE(base[i * 4 + c].body);
1666 }
1667
1668 int
1669 nv50_tgsi_to_nc(struct nv_pc *pc, struct nv50_translation_info *ti)
1670 {
1671 struct bld_context *bld = CALLOC_STRUCT(bld_context);
1672 int c;
1673
1674 pc->root = pc->current_block = new_basic_block(pc);
1675
1676 bld->pc = pc;
1677 bld->ti = ti;
1678
1679 pc->loop_nesting_bound = 1;
1680
1681 c = util_bitcount(bld->ti->p->fp.interp >> 24);
1682 if (c && ti->p->type == PIPE_SHADER_FRAGMENT) {
1683 bld->frgcrd[3] = new_value(pc, NV_FILE_MEM_V, NV_TYPE_F32);
1684 bld->frgcrd[3]->reg.id = c - 1;
1685 bld->frgcrd[3] = bld_insn_1(bld, NV_OP_LINTERP, bld->frgcrd[3]);
1686 bld->frgcrd[3] = bld_insn_1(bld, NV_OP_RCP, bld->frgcrd[3]);
1687 }
1688
1689 tgsi_parse_init(&bld->parse[0], ti->p->pipe.tokens);
1690
1691 while (!tgsi_parse_end_of_tokens(&bld->parse[bld->call_lvl])) {
1692 const union tgsi_full_token *tok = &bld->parse[bld->call_lvl].FullToken;
1693
1694 tgsi_parse_token(&bld->parse[bld->call_lvl]);
1695
1696 switch (tok->Token.Type) {
1697 case TGSI_TOKEN_TYPE_INSTRUCTION:
1698 bld_instruction(bld, &tok->FullInstruction);
1699 break;
1700 default:
1701 break;
1702 }
1703 }
1704
1705 bld_free_value_trackers(&bld->tvs[0][0], BLD_MAX_TEMPS);
1706 bld_free_value_trackers(&bld->avs[0][0], BLD_MAX_ADDRS);
1707 bld_free_value_trackers(&bld->pvs[0][0], BLD_MAX_PREDS);
1708
1709 bld_free_value_trackers(&bld->ovs[0][0], PIPE_MAX_SHADER_OUTPUTS);
1710
1711 FREE(bld);
1712 return 0;
1713 }
1714
1715 /* If a variable is assigned in a loop, replace all references to the value
1716 * from outside the loop with a phi value.
1717 */
1718 static void
1719 bld_replace_value(struct nv_pc *pc, struct nv_basic_block *b,
1720 struct nv_value *old_val,
1721 struct nv_value *new_val)
1722 {
1723 struct nv_instruction *nvi;
1724
1725 for (nvi = b->phi ? b->phi : b->entry; nvi; nvi = nvi->next) {
1726 int s;
1727 for (s = 0; s < 5; ++s) {
1728 if (!nvi->src[s])
1729 continue;
1730 if (nvi->src[s]->value == old_val)
1731 nv_reference(pc, &nvi->src[s], new_val);
1732 }
1733 if (nvi->flags_src && nvi->flags_src->value == old_val)
1734 nv_reference(pc, &nvi->flags_src, new_val);
1735 }
1736
1737 b->pass_seq = pc->pass_seq;
1738
1739 if (b->out[0] && b->out[0]->pass_seq < pc->pass_seq)
1740 bld_replace_value(pc, b->out[0], old_val, new_val);
1741
1742 if (b->out[1] && b->out[1]->pass_seq < pc->pass_seq)
1743 bld_replace_value(pc, b->out[1], old_val, new_val);
1744 }