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[mesa.git] / src / gallium / drivers / nv50 / nv50_vbo.c
1 /*
2 * Copyright 2008 Ben Skeggs
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 * SOFTWARE.
21 */
22
23 #include "pipe/p_context.h"
24 #include "pipe/p_state.h"
25 #include "pipe/p_inlines.h"
26
27 #include "util/u_format.h"
28
29 #include "nv50_context.h"
30
31 static boolean
32 nv50_push_elements_u08(struct nv50_context *, uint8_t *, unsigned);
33
34 static boolean
35 nv50_push_elements_u16(struct nv50_context *, uint16_t *, unsigned);
36
37 static boolean
38 nv50_push_elements_u32(struct nv50_context *, uint32_t *, unsigned);
39
40 static boolean
41 nv50_push_arrays(struct nv50_context *, unsigned, unsigned);
42
43 static INLINE unsigned
44 nv50_prim(unsigned mode)
45 {
46 switch (mode) {
47 case PIPE_PRIM_POINTS: return NV50TCL_VERTEX_BEGIN_POINTS;
48 case PIPE_PRIM_LINES: return NV50TCL_VERTEX_BEGIN_LINES;
49 case PIPE_PRIM_LINE_LOOP: return NV50TCL_VERTEX_BEGIN_LINE_LOOP;
50 case PIPE_PRIM_LINE_STRIP: return NV50TCL_VERTEX_BEGIN_LINE_STRIP;
51 case PIPE_PRIM_TRIANGLES: return NV50TCL_VERTEX_BEGIN_TRIANGLES;
52 case PIPE_PRIM_TRIANGLE_STRIP:
53 return NV50TCL_VERTEX_BEGIN_TRIANGLE_STRIP;
54 case PIPE_PRIM_TRIANGLE_FAN: return NV50TCL_VERTEX_BEGIN_TRIANGLE_FAN;
55 case PIPE_PRIM_QUADS: return NV50TCL_VERTEX_BEGIN_QUADS;
56 case PIPE_PRIM_QUAD_STRIP: return NV50TCL_VERTEX_BEGIN_QUAD_STRIP;
57 case PIPE_PRIM_POLYGON: return NV50TCL_VERTEX_BEGIN_POLYGON;
58 default:
59 break;
60 }
61
62 NOUVEAU_ERR("invalid primitive type %d\n", mode);
63 return NV50TCL_VERTEX_BEGIN_POINTS;
64 }
65
66 static INLINE uint32_t
67 nv50_vbo_type_to_hw(enum pipe_format format)
68 {
69 const struct util_format_description *desc;
70
71 desc = util_format_description(format);
72 assert(desc);
73
74 switch (desc->channel[0].type) {
75 case UTIL_FORMAT_TYPE_FLOAT:
76 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_FLOAT;
77 case UTIL_FORMAT_TYPE_UNSIGNED:
78 if (desc->channel[0].normalized) {
79 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_UNORM;
80 }
81 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_USCALED;
82 case UTIL_FORMAT_TYPE_SIGNED:
83 if (desc->channel[0].normalized) {
84 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SNORM;
85 }
86 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SSCALED;
87 /*
88 case PIPE_FORMAT_TYPE_UINT:
89 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_UINT;
90 case PIPE_FORMAT_TYPE_SINT:
91 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SINT; */
92 default:
93 return 0;
94 }
95 }
96
97 static INLINE uint32_t
98 nv50_vbo_size_to_hw(unsigned size, unsigned nr_c)
99 {
100 static const uint32_t hw_values[] = {
101 0, 0, 0, 0,
102 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_8,
103 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_8_8,
104 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_8_8_8,
105 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_8_8_8_8,
106 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_16,
107 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_16_16,
108 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_16_16_16,
109 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_16_16_16_16,
110 0, 0, 0, 0,
111 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_32,
112 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_32_32,
113 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_32_32_32,
114 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_32_32_32_32 };
115
116 /* we'd also have R11G11B10 and R10G10B10A2 */
117
118 assert(nr_c > 0 && nr_c <= 4);
119
120 if (size > 32)
121 return 0;
122 size >>= (3 - 2);
123
124 return hw_values[size + (nr_c - 1)];
125 }
126
127 static INLINE uint32_t
128 nv50_vbo_vtxelt_to_hw(struct pipe_vertex_element *ve)
129 {
130 uint32_t hw_type, hw_size;
131 enum pipe_format pf = ve->src_format;
132 const struct util_format_description *desc;
133 unsigned size;
134
135 desc = util_format_description(pf);
136 assert(desc);
137
138 size = util_format_get_component_bits(pf, UTIL_FORMAT_COLORSPACE_RGB, 0);
139
140 hw_type = nv50_vbo_type_to_hw(pf);
141 hw_size = nv50_vbo_size_to_hw(size, ve->nr_components);
142
143 if (!hw_type || !hw_size) {
144 NOUVEAU_ERR("unsupported vbo format: %s\n", pf_name(pf));
145 abort();
146 return 0x24e80000;
147 }
148
149 if (desc->swizzle[0] == UTIL_FORMAT_SWIZZLE_Z) /* BGRA */
150 hw_size |= (1 << 31); /* no real swizzle bits :-( */
151
152 return (hw_type | hw_size);
153 }
154
155 void
156 nv50_draw_arrays(struct pipe_context *pipe, unsigned mode, unsigned start,
157 unsigned count)
158 {
159 struct nv50_context *nv50 = nv50_context(pipe);
160 struct nouveau_channel *chan = nv50->screen->tesla->channel;
161 struct nouveau_grobj *tesla = nv50->screen->tesla;
162 boolean ret;
163
164 nv50_state_validate(nv50);
165
166 BEGIN_RING(chan, tesla, 0x142c, 1);
167 OUT_RING (chan, 0);
168 BEGIN_RING(chan, tesla, 0x142c, 1);
169 OUT_RING (chan, 0);
170
171 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1);
172 OUT_RING (chan, nv50_prim(mode));
173
174 if (nv50->vbo_fifo)
175 ret = nv50_push_arrays(nv50, start, count);
176 else {
177 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BUFFER_FIRST, 2);
178 OUT_RING (chan, start);
179 OUT_RING (chan, count);
180 ret = TRUE;
181 }
182 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_END, 1);
183 OUT_RING (chan, 0);
184
185 /* XXX: not sure what to do if ret != TRUE: flush and retry?
186 */
187 assert(ret);
188 }
189
190 static INLINE boolean
191 nv50_draw_elements_inline_u08(struct nv50_context *nv50, uint8_t *map,
192 unsigned start, unsigned count)
193 {
194 struct nouveau_channel *chan = nv50->screen->tesla->channel;
195 struct nouveau_grobj *tesla = nv50->screen->tesla;
196
197 map += start;
198
199 if (nv50->vbo_fifo)
200 return nv50_push_elements_u08(nv50, map, count);
201
202 if (count & 1) {
203 BEGIN_RING(chan, tesla, NV50TCL_VB_ELEMENT_U32, 1);
204 OUT_RING (chan, map[0]);
205 map++;
206 count--;
207 }
208
209 while (count) {
210 unsigned nr = count > 2046 ? 2046 : count;
211 int i;
212
213 BEGIN_RING(chan, tesla, NV50TCL_VB_ELEMENT_U16 | 0x40000000, nr >> 1);
214 for (i = 0; i < nr; i += 2)
215 OUT_RING (chan, (map[i + 1] << 16) | map[i]);
216
217 count -= nr;
218 map += nr;
219 }
220 return TRUE;
221 }
222
223 static INLINE boolean
224 nv50_draw_elements_inline_u16(struct nv50_context *nv50, uint16_t *map,
225 unsigned start, unsigned count)
226 {
227 struct nouveau_channel *chan = nv50->screen->tesla->channel;
228 struct nouveau_grobj *tesla = nv50->screen->tesla;
229
230 map += start;
231
232 if (nv50->vbo_fifo)
233 return nv50_push_elements_u16(nv50, map, count);
234
235 if (count & 1) {
236 BEGIN_RING(chan, tesla, NV50TCL_VB_ELEMENT_U32, 1);
237 OUT_RING (chan, map[0]);
238 map++;
239 count--;
240 }
241
242 while (count) {
243 unsigned nr = count > 2046 ? 2046 : count;
244 int i;
245
246 BEGIN_RING(chan, tesla, NV50TCL_VB_ELEMENT_U16 | 0x40000000, nr >> 1);
247 for (i = 0; i < nr; i += 2)
248 OUT_RING (chan, (map[i + 1] << 16) | map[i]);
249
250 count -= nr;
251 map += nr;
252 }
253 return TRUE;
254 }
255
256 static INLINE boolean
257 nv50_draw_elements_inline_u32(struct nv50_context *nv50, uint32_t *map,
258 unsigned start, unsigned count)
259 {
260 struct nouveau_channel *chan = nv50->screen->tesla->channel;
261 struct nouveau_grobj *tesla = nv50->screen->tesla;
262
263 map += start;
264
265 if (nv50->vbo_fifo)
266 return nv50_push_elements_u32(nv50, map, count);
267
268 while (count) {
269 unsigned nr = count > 2047 ? 2047 : count;
270
271 BEGIN_RING(chan, tesla, NV50TCL_VB_ELEMENT_U32 | 0x40000000, nr);
272 OUT_RINGp (chan, map, nr);
273
274 count -= nr;
275 map += nr;
276 }
277 return TRUE;
278 }
279
280 void
281 nv50_draw_elements(struct pipe_context *pipe,
282 struct pipe_buffer *indexBuffer, unsigned indexSize,
283 unsigned mode, unsigned start, unsigned count)
284 {
285 struct nv50_context *nv50 = nv50_context(pipe);
286 struct nouveau_channel *chan = nv50->screen->tesla->channel;
287 struct nouveau_grobj *tesla = nv50->screen->tesla;
288 struct pipe_screen *pscreen = pipe->screen;
289 void *map;
290 boolean ret;
291
292 map = pipe_buffer_map(pscreen, indexBuffer, PIPE_BUFFER_USAGE_CPU_READ);
293
294 nv50_state_validate(nv50);
295
296 BEGIN_RING(chan, tesla, 0x142c, 1);
297 OUT_RING (chan, 0);
298 BEGIN_RING(chan, tesla, 0x142c, 1);
299 OUT_RING (chan, 0);
300
301 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1);
302 OUT_RING (chan, nv50_prim(mode));
303 switch (indexSize) {
304 case 1:
305 ret = nv50_draw_elements_inline_u08(nv50, map, start, count);
306 break;
307 case 2:
308 ret = nv50_draw_elements_inline_u16(nv50, map, start, count);
309 break;
310 case 4:
311 ret = nv50_draw_elements_inline_u32(nv50, map, start, count);
312 break;
313 default:
314 assert(0);
315 ret = FALSE;
316 break;
317 }
318 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_END, 1);
319 OUT_RING (chan, 0);
320
321 pipe_buffer_unmap(pscreen, indexBuffer);
322
323 /* XXX: what to do if ret != TRUE? Flush and retry?
324 */
325 assert(ret);
326 }
327
328 static INLINE boolean
329 nv50_vbo_static_attrib(struct nv50_context *nv50, unsigned attrib,
330 struct nouveau_stateobj **pso,
331 struct pipe_vertex_element *ve,
332 struct pipe_vertex_buffer *vb)
333
334 {
335 struct nouveau_stateobj *so;
336 struct nouveau_grobj *tesla = nv50->screen->tesla;
337 struct nouveau_bo *bo = nouveau_bo(vb->buffer);
338 float *v;
339 int ret;
340 enum pipe_format pf = ve->src_format;
341 const struct util_format_description *desc;
342
343 desc = util_format_description(pf);
344 assert(desc);
345
346 if ((desc->channel[0].type != UTIL_FORMAT_TYPE_FLOAT) ||
347 util_format_get_component_bits(pf, UTIL_FORMAT_COLORSPACE_RGB, 0) != 32)
348 return FALSE;
349
350 ret = nouveau_bo_map(bo, NOUVEAU_BO_RD);
351 if (ret)
352 return FALSE;
353 v = (float *)(bo->map + (vb->buffer_offset + ve->src_offset));
354
355 so = *pso;
356 if (!so)
357 *pso = so = so_new(nv50->vtxelt_nr, nv50->vtxelt_nr * 4, 0);
358
359 switch (ve->nr_components) {
360 case 4:
361 so_method(so, tesla, NV50TCL_VTX_ATTR_4F_X(attrib), 4);
362 so_data (so, fui(v[0]));
363 so_data (so, fui(v[1]));
364 so_data (so, fui(v[2]));
365 so_data (so, fui(v[3]));
366 break;
367 case 3:
368 so_method(so, tesla, NV50TCL_VTX_ATTR_3F_X(attrib), 3);
369 so_data (so, fui(v[0]));
370 so_data (so, fui(v[1]));
371 so_data (so, fui(v[2]));
372 break;
373 case 2:
374 so_method(so, tesla, NV50TCL_VTX_ATTR_2F_X(attrib), 2);
375 so_data (so, fui(v[0]));
376 so_data (so, fui(v[1]));
377 break;
378 case 1:
379 if (attrib == nv50->vertprog->cfg.edgeflag_in) {
380 so_method(so, tesla, NV50TCL_EDGEFLAG_ENABLE, 1);
381 so_data (so, v[0] ? 1 : 0);
382 }
383 so_method(so, tesla, NV50TCL_VTX_ATTR_1F(attrib), 1);
384 so_data (so, fui(v[0]));
385 break;
386 default:
387 nouveau_bo_unmap(bo);
388 return FALSE;
389 }
390
391 nouveau_bo_unmap(bo);
392 return TRUE;
393 }
394
395 void
396 nv50_vbo_validate(struct nv50_context *nv50)
397 {
398 struct nouveau_grobj *tesla = nv50->screen->tesla;
399 struct nouveau_stateobj *vtxbuf, *vtxfmt, *vtxattr;
400 unsigned i, n_ve;
401
402 /* don't validate if Gallium took away our buffers */
403 if (nv50->vtxbuf_nr == 0)
404 return;
405 nv50->vbo_fifo = 0;
406
407 for (i = 0; i < nv50->vtxbuf_nr; ++i)
408 if (nv50->vtxbuf[i].stride &&
409 !(nv50->vtxbuf[i].buffer->usage & PIPE_BUFFER_USAGE_VERTEX))
410 nv50->vbo_fifo = 0xffff;
411
412 if (nv50->vertprog->cfg.edgeflag_in < 16)
413 nv50->vbo_fifo = 0xffff; /* vertprog can't set edgeflag */
414
415 n_ve = MAX2(nv50->vtxelt_nr, nv50->state.vtxelt_nr);
416
417 vtxattr = NULL;
418 vtxbuf = so_new(n_ve * 2, n_ve * 5, nv50->vtxelt_nr * 4);
419 vtxfmt = so_new(1, n_ve, 0);
420 so_method(vtxfmt, tesla, NV50TCL_VERTEX_ARRAY_ATTRIB(0), n_ve);
421
422 for (i = 0; i < nv50->vtxelt_nr; i++) {
423 struct pipe_vertex_element *ve = &nv50->vtxelt[i];
424 struct pipe_vertex_buffer *vb =
425 &nv50->vtxbuf[ve->vertex_buffer_index];
426 struct nouveau_bo *bo = nouveau_bo(vb->buffer);
427 uint32_t hw = nv50_vbo_vtxelt_to_hw(ve);
428
429 if (!vb->stride &&
430 nv50_vbo_static_attrib(nv50, i, &vtxattr, ve, vb)) {
431 so_data(vtxfmt, hw | (1 << 4));
432
433 so_method(vtxbuf, tesla,
434 NV50TCL_VERTEX_ARRAY_FORMAT(i), 1);
435 so_data (vtxbuf, 0);
436
437 nv50->vbo_fifo &= ~(1 << i);
438 continue;
439 }
440 so_data(vtxfmt, hw | i);
441
442 if (nv50->vbo_fifo) {
443 so_method(vtxbuf, tesla,
444 NV50TCL_VERTEX_ARRAY_FORMAT(i), 1);
445 so_data (vtxbuf, 0);
446 continue;
447 }
448
449 so_method(vtxbuf, tesla, NV50TCL_VERTEX_ARRAY_FORMAT(i), 3);
450 so_data (vtxbuf, 0x20000000 | vb->stride);
451 so_reloc (vtxbuf, bo, vb->buffer_offset +
452 ve->src_offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART |
453 NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
454 so_reloc (vtxbuf, bo, vb->buffer_offset +
455 ve->src_offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART |
456 NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
457
458 /* vertex array limits */
459 so_method(vtxbuf, tesla, NV50TCL_VERTEX_ARRAY_LIMIT_HIGH(i), 2);
460 so_reloc (vtxbuf, bo, vb->buffer->size - 1,
461 NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD |
462 NOUVEAU_BO_HIGH, 0, 0);
463 so_reloc (vtxbuf, bo, vb->buffer->size - 1,
464 NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD |
465 NOUVEAU_BO_LOW, 0, 0);
466 }
467 for (; i < n_ve; ++i) {
468 so_data (vtxfmt, 0x7e080010);
469
470 so_method(vtxbuf, tesla, NV50TCL_VERTEX_ARRAY_FORMAT(i), 1);
471 so_data (vtxbuf, 0);
472 }
473 nv50->state.vtxelt_nr = nv50->vtxelt_nr;
474
475 so_ref (vtxfmt, &nv50->state.vtxfmt);
476 so_ref (vtxbuf, &nv50->state.vtxbuf);
477 so_ref (vtxattr, &nv50->state.vtxattr);
478 so_ref (NULL, &vtxbuf);
479 so_ref (NULL, &vtxfmt);
480 so_ref (NULL, &vtxattr);
481 }
482
483 typedef void (*pfn_push)(struct nouveau_channel *, void *);
484
485 struct nv50_vbo_emitctx
486 {
487 pfn_push push[16];
488 void *map[16];
489 unsigned stride[16];
490 unsigned nr_ve;
491 unsigned vtx_dwords;
492 unsigned vtx_max;
493
494 float edgeflag;
495 unsigned ve_edgeflag;
496 };
497
498 static INLINE void
499 emit_vtx_next(struct nouveau_channel *chan, struct nv50_vbo_emitctx *emit)
500 {
501 unsigned i;
502
503 for (i = 0; i < emit->nr_ve; ++i) {
504 emit->push[i](chan, emit->map[i]);
505 emit->map[i] += emit->stride[i];
506 }
507 }
508
509 static INLINE void
510 emit_vtx(struct nouveau_channel *chan, struct nv50_vbo_emitctx *emit,
511 uint32_t vi)
512 {
513 unsigned i;
514
515 for (i = 0; i < emit->nr_ve; ++i)
516 emit->push[i](chan, emit->map[i] + emit->stride[i] * vi);
517 }
518
519 static INLINE boolean
520 nv50_map_vbufs(struct nv50_context *nv50)
521 {
522 int i;
523
524 for (i = 0; i < nv50->vtxbuf_nr; ++i) {
525 struct pipe_vertex_buffer *vb = &nv50->vtxbuf[i];
526 unsigned size, delta;
527
528 if (nouveau_bo(vb->buffer)->map)
529 continue;
530
531 size = vb->stride * (vb->max_index + 1);
532 delta = vb->buffer_offset;
533
534 if (!size)
535 size = vb->buffer->size - vb->buffer_offset;
536
537 if (nouveau_bo_map_range(nouveau_bo(vb->buffer),
538 delta, size, NOUVEAU_BO_RD))
539 break;
540 }
541
542 if (i == nv50->vtxbuf_nr)
543 return TRUE;
544 for (; i >= 0; --i)
545 nouveau_bo_unmap(nouveau_bo(nv50->vtxbuf[i].buffer));
546 return FALSE;
547 }
548
549 static INLINE void
550 nv50_unmap_vbufs(struct nv50_context *nv50)
551 {
552 unsigned i;
553
554 for (i = 0; i < nv50->vtxbuf_nr; ++i)
555 if (nouveau_bo(nv50->vtxbuf[i].buffer)->map)
556 nouveau_bo_unmap(nouveau_bo(nv50->vtxbuf[i].buffer));
557 }
558
559 static void
560 emit_b32_1(struct nouveau_channel *chan, void *data)
561 {
562 uint32_t *v = data;
563
564 OUT_RING(chan, v[0]);
565 }
566
567 static void
568 emit_b32_2(struct nouveau_channel *chan, void *data)
569 {
570 uint32_t *v = data;
571
572 OUT_RING(chan, v[0]);
573 OUT_RING(chan, v[1]);
574 }
575
576 static void
577 emit_b32_3(struct nouveau_channel *chan, void *data)
578 {
579 uint32_t *v = data;
580
581 OUT_RING(chan, v[0]);
582 OUT_RING(chan, v[1]);
583 OUT_RING(chan, v[2]);
584 }
585
586 static void
587 emit_b32_4(struct nouveau_channel *chan, void *data)
588 {
589 uint32_t *v = data;
590
591 OUT_RING(chan, v[0]);
592 OUT_RING(chan, v[1]);
593 OUT_RING(chan, v[2]);
594 OUT_RING(chan, v[3]);
595 }
596
597 static void
598 emit_b16_1(struct nouveau_channel *chan, void *data)
599 {
600 uint16_t *v = data;
601
602 OUT_RING(chan, v[0]);
603 }
604
605 static void
606 emit_b16_3(struct nouveau_channel *chan, void *data)
607 {
608 uint16_t *v = data;
609
610 OUT_RING(chan, (v[1] << 16) | v[0]);
611 OUT_RING(chan, v[2]);
612 }
613
614 static void
615 emit_b08_1(struct nouveau_channel *chan, void *data)
616 {
617 uint8_t *v = data;
618
619 OUT_RING(chan, v[0]);
620 }
621
622 static void
623 emit_b08_3(struct nouveau_channel *chan, void *data)
624 {
625 uint8_t *v = data;
626
627 OUT_RING(chan, (v[2] << 16) | (v[1] << 8) | v[0]);
628 }
629
630 static boolean
631 emit_prepare(struct nv50_context *nv50, struct nv50_vbo_emitctx *emit,
632 unsigned start)
633 {
634 unsigned i;
635
636 if (nv50_map_vbufs(nv50) == FALSE)
637 return FALSE;
638
639 emit->ve_edgeflag = nv50->vertprog->cfg.edgeflag_in;
640
641 emit->edgeflag = 0.5f;
642 emit->nr_ve = 0;
643 emit->vtx_dwords = 0;
644
645 for (i = 0; i < nv50->vtxelt_nr; ++i) {
646 struct pipe_vertex_element *ve;
647 struct pipe_vertex_buffer *vb;
648 unsigned n, size;
649 const struct util_format_description *desc;
650
651 ve = &nv50->vtxelt[i];
652 vb = &nv50->vtxbuf[ve->vertex_buffer_index];
653 if (!(nv50->vbo_fifo & (1 << i)))
654 continue;
655 n = emit->nr_ve++;
656
657 emit->stride[n] = vb->stride;
658 emit->map[n] = nouveau_bo(vb->buffer)->map +
659 (start * vb->stride + ve->src_offset);
660
661 desc = util_format_description(ve->src_format);
662 assert(desc);
663
664 size = util_format_get_component_bits(
665 ve->src_format, UTIL_FORMAT_COLORSPACE_RGB, 0);
666
667 assert(ve->nr_components > 0 && ve->nr_components <= 4);
668
669 /* It shouldn't be necessary to push the implicit 1s
670 * for case 3 and size 8 cases 1, 2, 3.
671 */
672 switch (size) {
673 default:
674 NOUVEAU_ERR("unsupported vtxelt size: %u\n", size);
675 return FALSE;
676 case 32:
677 switch (ve->nr_components) {
678 case 1: emit->push[n] = emit_b32_1; break;
679 case 2: emit->push[n] = emit_b32_2; break;
680 case 3: emit->push[n] = emit_b32_3; break;
681 case 4: emit->push[n] = emit_b32_4; break;
682 }
683 emit->vtx_dwords += ve->nr_components;
684 break;
685 case 16:
686 switch (ve->nr_components) {
687 case 1: emit->push[n] = emit_b16_1; break;
688 case 2: emit->push[n] = emit_b32_1; break;
689 case 3: emit->push[n] = emit_b16_3; break;
690 case 4: emit->push[n] = emit_b32_2; break;
691 }
692 emit->vtx_dwords += (ve->nr_components + 1) >> 1;
693 break;
694 case 8:
695 switch (ve->nr_components) {
696 case 1: emit->push[n] = emit_b08_1; break;
697 case 2: emit->push[n] = emit_b16_1; break;
698 case 3: emit->push[n] = emit_b08_3; break;
699 case 4: emit->push[n] = emit_b32_1; break;
700 }
701 emit->vtx_dwords += 1;
702 break;
703 }
704 }
705
706 emit->vtx_max = 512 / emit->vtx_dwords;
707 if (emit->ve_edgeflag < 16)
708 emit->vtx_max = 1;
709
710 return TRUE;
711 }
712
713 static INLINE void
714 set_edgeflag(struct nouveau_channel *chan,
715 struct nouveau_grobj *tesla,
716 struct nv50_vbo_emitctx *emit, uint32_t index)
717 {
718 unsigned i = emit->ve_edgeflag;
719
720 if (i < 16) {
721 float f = *((float *)(emit->map[i] + index * emit->stride[i]));
722
723 if (emit->edgeflag != f) {
724 emit->edgeflag = f;
725
726 BEGIN_RING(chan, tesla, 0x15e4, 1);
727 OUT_RING (chan, f ? 1 : 0);
728 }
729 }
730 }
731
732 static boolean
733 nv50_push_arrays(struct nv50_context *nv50, unsigned start, unsigned count)
734 {
735 struct nouveau_channel *chan = nv50->screen->base.channel;
736 struct nouveau_grobj *tesla = nv50->screen->tesla;
737 struct nv50_vbo_emitctx emit;
738
739 if (emit_prepare(nv50, &emit, start) == FALSE)
740 return FALSE;
741
742 while (count) {
743 unsigned i, dw, nr = MIN2(count, emit.vtx_max);
744 dw = nr * emit.vtx_dwords;
745
746 set_edgeflag(chan, tesla, &emit, 0); /* nr will be 1 */
747
748 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_DATA | 0x40000000, dw);
749 for (i = 0; i < nr; ++i)
750 emit_vtx_next(chan, &emit);
751
752 count -= nr;
753 }
754 nv50_unmap_vbufs(nv50);
755
756 return TRUE;
757 }
758
759 static boolean
760 nv50_push_elements_u32(struct nv50_context *nv50, uint32_t *map, unsigned count)
761 {
762 struct nouveau_channel *chan = nv50->screen->base.channel;
763 struct nouveau_grobj *tesla = nv50->screen->tesla;
764 struct nv50_vbo_emitctx emit;
765
766 if (emit_prepare(nv50, &emit, 0) == FALSE)
767 return FALSE;
768
769 while (count) {
770 unsigned i, dw, nr = MIN2(count, emit.vtx_max);
771 dw = nr * emit.vtx_dwords;
772
773 set_edgeflag(chan, tesla, &emit, *map);
774
775 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_DATA | 0x40000000, dw);
776 for (i = 0; i < nr; ++i)
777 emit_vtx(chan, &emit, *map++);
778
779 count -= nr;
780 }
781 nv50_unmap_vbufs(nv50);
782
783 return TRUE;
784 }
785
786 static boolean
787 nv50_push_elements_u16(struct nv50_context *nv50, uint16_t *map, unsigned count)
788 {
789 struct nouveau_channel *chan = nv50->screen->base.channel;
790 struct nouveau_grobj *tesla = nv50->screen->tesla;
791 struct nv50_vbo_emitctx emit;
792
793 if (emit_prepare(nv50, &emit, 0) == FALSE)
794 return FALSE;
795
796 while (count) {
797 unsigned i, dw, nr = MIN2(count, emit.vtx_max);
798 dw = nr * emit.vtx_dwords;
799
800 set_edgeflag(chan, tesla, &emit, *map);
801
802 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_DATA | 0x40000000, dw);
803 for (i = 0; i < nr; ++i)
804 emit_vtx(chan, &emit, *map++);
805
806 count -= nr;
807 }
808 nv50_unmap_vbufs(nv50);
809
810 return TRUE;
811 }
812
813 static boolean
814 nv50_push_elements_u08(struct nv50_context *nv50, uint8_t *map, unsigned count)
815 {
816 struct nouveau_channel *chan = nv50->screen->base.channel;
817 struct nouveau_grobj *tesla = nv50->screen->tesla;
818 struct nv50_vbo_emitctx emit;
819
820 if (emit_prepare(nv50, &emit, 0) == FALSE)
821 return FALSE;
822
823 while (count) {
824 unsigned i, dw, nr = MIN2(count, emit.vtx_max);
825 dw = nr * emit.vtx_dwords;
826
827 set_edgeflag(chan, tesla, &emit, *map);
828
829 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_DATA | 0x40000000, dw);
830 for (i = 0; i < nr; ++i)
831 emit_vtx(chan, &emit, *map++);
832
833 count -= nr;
834 }
835 nv50_unmap_vbufs(nv50);
836
837 return TRUE;
838 }