Merge branch 'mesa_7_5_branch'
[mesa.git] / src / gallium / drivers / nv50 / nv50_vbo.c
1 /*
2 * Copyright 2008 Ben Skeggs
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 * SOFTWARE.
21 */
22
23 #include "pipe/p_context.h"
24 #include "pipe/p_state.h"
25 #include "pipe/p_inlines.h"
26
27 #include "nv50_context.h"
28
29 static INLINE unsigned
30 nv50_prim(unsigned mode)
31 {
32 switch (mode) {
33 case PIPE_PRIM_POINTS: return NV50TCL_VERTEX_BEGIN_POINTS;
34 case PIPE_PRIM_LINES: return NV50TCL_VERTEX_BEGIN_LINES;
35 case PIPE_PRIM_LINE_LOOP: return NV50TCL_VERTEX_BEGIN_LINE_LOOP;
36 case PIPE_PRIM_LINE_STRIP: return NV50TCL_VERTEX_BEGIN_LINE_STRIP;
37 case PIPE_PRIM_TRIANGLES: return NV50TCL_VERTEX_BEGIN_TRIANGLES;
38 case PIPE_PRIM_TRIANGLE_STRIP:
39 return NV50TCL_VERTEX_BEGIN_TRIANGLE_STRIP;
40 case PIPE_PRIM_TRIANGLE_FAN: return NV50TCL_VERTEX_BEGIN_TRIANGLE_FAN;
41 case PIPE_PRIM_QUADS: return NV50TCL_VERTEX_BEGIN_QUADS;
42 case PIPE_PRIM_QUAD_STRIP: return NV50TCL_VERTEX_BEGIN_QUAD_STRIP;
43 case PIPE_PRIM_POLYGON: return NV50TCL_VERTEX_BEGIN_POLYGON;
44 default:
45 break;
46 }
47
48 NOUVEAU_ERR("invalid primitive type %d\n", mode);
49 return NV50TCL_VERTEX_BEGIN_POINTS;
50 }
51
52 boolean
53 nv50_draw_arrays(struct pipe_context *pipe, unsigned mode, unsigned start,
54 unsigned count)
55 {
56 struct nv50_context *nv50 = nv50_context(pipe);
57 struct nouveau_channel *chan = nv50->screen->tesla->channel;
58 struct nouveau_grobj *tesla = nv50->screen->tesla;
59
60 nv50_state_validate(nv50);
61
62 BEGIN_RING(chan, tesla, 0x142c, 1);
63 OUT_RING (chan, 0);
64 BEGIN_RING(chan, tesla, 0x142c, 1);
65 OUT_RING (chan, 0);
66 BEGIN_RING(chan, tesla, 0x1440, 1);
67 OUT_RING (chan, 0);
68 BEGIN_RING(chan, tesla, 0x1334, 1);
69 OUT_RING (chan, 0);
70
71 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1);
72 OUT_RING (chan, nv50_prim(mode));
73 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BUFFER_FIRST, 2);
74 OUT_RING (chan, start);
75 OUT_RING (chan, count);
76 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_END, 1);
77 OUT_RING (chan, 0);
78
79 pipe->flush(pipe, 0, NULL);
80 return TRUE;
81 }
82
83 static INLINE void
84 nv50_draw_elements_inline_u08(struct nv50_context *nv50, uint8_t *map,
85 unsigned start, unsigned count)
86 {
87 struct nouveau_channel *chan = nv50->screen->tesla->channel;
88 struct nouveau_grobj *tesla = nv50->screen->tesla;
89
90 map += start;
91
92 if (count & 1) {
93 BEGIN_RING(chan, tesla, 0x15e8, 1);
94 OUT_RING (chan, map[0]);
95 map++;
96 count--;
97 }
98
99 while (count) {
100 unsigned nr = count > 2046 ? 2046 : count;
101 int i;
102
103 BEGIN_RING(chan, tesla, 0x400015f0, nr >> 1);
104 for (i = 0; i < nr; i += 2)
105 OUT_RING (chan, (map[1] << 16) | map[0]);
106
107 count -= nr;
108 map += nr;
109 }
110 }
111
112 static INLINE void
113 nv50_draw_elements_inline_u16(struct nv50_context *nv50, uint16_t *map,
114 unsigned start, unsigned count)
115 {
116 struct nouveau_channel *chan = nv50->screen->tesla->channel;
117 struct nouveau_grobj *tesla = nv50->screen->tesla;
118
119 map += start;
120
121 if (count & 1) {
122 BEGIN_RING(chan, tesla, 0x15e8, 1);
123 OUT_RING (chan, map[0]);
124 map++;
125 count--;
126 }
127
128 while (count) {
129 unsigned nr = count > 2046 ? 2046 : count;
130 int i;
131
132 BEGIN_RING(chan, tesla, 0x400015f0, nr >> 1);
133 for (i = 0; i < nr; i += 2)
134 OUT_RING (chan, (map[1] << 16) | map[0]);
135
136 count -= nr;
137 map += nr;
138 }
139 }
140
141 static INLINE void
142 nv50_draw_elements_inline_u32(struct nv50_context *nv50, uint8_t *map,
143 unsigned start, unsigned count)
144 {
145 struct nouveau_channel *chan = nv50->screen->tesla->channel;
146 struct nouveau_grobj *tesla = nv50->screen->tesla;
147
148 map += start;
149
150 while (count) {
151 unsigned nr = count > 2047 ? 2047 : count;
152
153 BEGIN_RING(chan, tesla, 0x400015e8, nr);
154 OUT_RINGp (chan, map, nr);
155
156 count -= nr;
157 map += nr;
158 }
159 }
160
161 boolean
162 nv50_draw_elements(struct pipe_context *pipe,
163 struct pipe_buffer *indexBuffer, unsigned indexSize,
164 unsigned mode, unsigned start, unsigned count)
165 {
166 struct nv50_context *nv50 = nv50_context(pipe);
167 struct nouveau_channel *chan = nv50->screen->tesla->channel;
168 struct nouveau_grobj *tesla = nv50->screen->tesla;
169 struct pipe_screen *pscreen = pipe->screen;
170 void *map;
171
172 map = pipe_buffer_map(pscreen, indexBuffer, PIPE_BUFFER_USAGE_CPU_READ);
173
174 nv50_state_validate(nv50);
175
176 BEGIN_RING(chan, tesla, 0x142c, 1);
177 OUT_RING (chan, 0);
178 BEGIN_RING(chan, tesla, 0x142c, 1);
179 OUT_RING (chan, 0);
180
181 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1);
182 OUT_RING (chan, nv50_prim(mode));
183 switch (indexSize) {
184 case 1:
185 nv50_draw_elements_inline_u08(nv50, map, start, count);
186 break;
187 case 2:
188 nv50_draw_elements_inline_u16(nv50, map, start, count);
189 break;
190 case 4:
191 nv50_draw_elements_inline_u32(nv50, map, start, count);
192 break;
193 default:
194 assert(0);
195 }
196 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_END, 1);
197 OUT_RING (chan, 0);
198
199 pipe_buffer_unmap(pscreen, indexBuffer);
200 pipe->flush(pipe, 0, NULL);
201 return TRUE;
202 }
203
204 void
205 nv50_vbo_validate(struct nv50_context *nv50)
206 {
207 struct nouveau_grobj *tesla = nv50->screen->tesla;
208 struct nouveau_stateobj *vtxbuf, *vtxfmt;
209 int i;
210
211 vtxbuf = so_new(nv50->vtxelt_nr * 4, nv50->vtxelt_nr * 2);
212 vtxfmt = so_new(nv50->vtxelt_nr + 1, 0);
213 so_method(vtxfmt, tesla, 0x1ac0, nv50->vtxelt_nr);
214
215 for (i = 0; i < nv50->vtxelt_nr; i++) {
216 struct pipe_vertex_element *ve = &nv50->vtxelt[i];
217 struct pipe_vertex_buffer *vb =
218 &nv50->vtxbuf[ve->vertex_buffer_index];
219 struct nouveau_bo *bo = nouveau_bo(vb->buffer);
220
221 switch (ve->src_format) {
222 case PIPE_FORMAT_R32G32B32A32_FLOAT:
223 so_data(vtxfmt, 0x7e080000 | i);
224 break;
225 case PIPE_FORMAT_R32G32B32_FLOAT:
226 so_data(vtxfmt, 0x7e100000 | i);
227 break;
228 case PIPE_FORMAT_R32G32_FLOAT:
229 so_data(vtxfmt, 0x7e200000 | i);
230 break;
231 case PIPE_FORMAT_R32_FLOAT:
232 so_data(vtxfmt, 0x7e900000 | i);
233 break;
234 case PIPE_FORMAT_R8G8B8A8_UNORM:
235 so_data(vtxfmt, 0x24500000 | i);
236 break;
237 default:
238 {
239 NOUVEAU_ERR("invalid vbo format %s\n",
240 pf_name(ve->src_format));
241 assert(0);
242 return;
243 }
244 }
245
246 so_method(vtxbuf, tesla, 0x900 + (i * 16), 3);
247 so_data (vtxbuf, 0x20000000 | vb->stride);
248 so_reloc (vtxbuf, bo, vb->buffer_offset +
249 ve->src_offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART |
250 NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
251 so_reloc (vtxbuf, bo, vb->buffer_offset +
252 ve->src_offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART |
253 NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
254 }
255
256 so_ref (vtxfmt, &nv50->state.vtxfmt);
257 so_ref (vtxbuf, &nv50->state.vtxbuf);
258 so_ref (NULL, &vtxbuf);
259 so_ref (NULL, &vtxfmt);
260 }
261