2 * Copyright 2008 Ben Skeggs
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 #include "pipe/p_context.h"
24 #include "pipe/p_state.h"
25 #include "pipe/p_inlines.h"
27 #include "util/u_format.h"
29 #include "nv50_context.h"
32 nv50_push_elements_u08(struct nv50_context
*, uint8_t *, unsigned);
35 nv50_push_elements_u16(struct nv50_context
*, uint16_t *, unsigned);
38 nv50_push_elements_u32(struct nv50_context
*, uint32_t *, unsigned);
41 nv50_push_arrays(struct nv50_context
*, unsigned, unsigned);
43 static INLINE
unsigned
44 nv50_prim(unsigned mode
)
47 case PIPE_PRIM_POINTS
: return NV50TCL_VERTEX_BEGIN_POINTS
;
48 case PIPE_PRIM_LINES
: return NV50TCL_VERTEX_BEGIN_LINES
;
49 case PIPE_PRIM_LINE_LOOP
: return NV50TCL_VERTEX_BEGIN_LINE_LOOP
;
50 case PIPE_PRIM_LINE_STRIP
: return NV50TCL_VERTEX_BEGIN_LINE_STRIP
;
51 case PIPE_PRIM_TRIANGLES
: return NV50TCL_VERTEX_BEGIN_TRIANGLES
;
52 case PIPE_PRIM_TRIANGLE_STRIP
:
53 return NV50TCL_VERTEX_BEGIN_TRIANGLE_STRIP
;
54 case PIPE_PRIM_TRIANGLE_FAN
: return NV50TCL_VERTEX_BEGIN_TRIANGLE_FAN
;
55 case PIPE_PRIM_QUADS
: return NV50TCL_VERTEX_BEGIN_QUADS
;
56 case PIPE_PRIM_QUAD_STRIP
: return NV50TCL_VERTEX_BEGIN_QUAD_STRIP
;
57 case PIPE_PRIM_POLYGON
: return NV50TCL_VERTEX_BEGIN_POLYGON
;
62 NOUVEAU_ERR("invalid primitive type %d\n", mode
);
63 return NV50TCL_VERTEX_BEGIN_POINTS
;
66 static INLINE
uint32_t
67 nv50_vbo_type_to_hw(enum pipe_format format
)
69 const struct util_format_description
*desc
;
71 desc
= util_format_description(format
);
74 switch (desc
->channel
[0].type
) {
75 case UTIL_FORMAT_TYPE_FLOAT
:
76 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_FLOAT
;
77 case UTIL_FORMAT_TYPE_UNSIGNED
:
78 if (desc
->channel
[0].normalized
) {
79 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_UNORM
;
81 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_USCALED
;
82 case UTIL_FORMAT_TYPE_SIGNED
:
83 if (desc
->channel
[0].normalized
) {
84 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SNORM
;
86 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SSCALED
;
88 case PIPE_FORMAT_TYPE_UINT:
89 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_UINT;
90 case PIPE_FORMAT_TYPE_SINT:
91 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SINT; */
97 static INLINE
uint32_t
98 nv50_vbo_size_to_hw(unsigned size
, unsigned nr_c
)
100 static const uint32_t hw_values
[] = {
102 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_8
,
103 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_8_8
,
104 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_8_8_8
,
105 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_8_8_8_8
,
106 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_16
,
107 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_16_16
,
108 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_16_16_16
,
109 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_16_16_16_16
,
111 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_32
,
112 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_32_32
,
113 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_32_32_32
,
114 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_32_32_32_32
};
116 /* we'd also have R11G11B10 and R10G10B10A2 */
118 assert(nr_c
> 0 && nr_c
<= 4);
124 return hw_values
[size
+ (nr_c
- 1)];
127 static INLINE
uint32_t
128 nv50_vbo_vtxelt_to_hw(struct pipe_vertex_element
*ve
)
130 uint32_t hw_type
, hw_size
;
131 enum pipe_format pf
= ve
->src_format
;
132 const struct util_format_description
*desc
;
135 desc
= util_format_description(pf
);
138 size
= util_format_get_component_bits(pf
, UTIL_FORMAT_COLORSPACE_RGB
, 0);
140 hw_type
= nv50_vbo_type_to_hw(pf
);
141 hw_size
= nv50_vbo_size_to_hw(size
, ve
->nr_components
);
143 if (!hw_type
|| !hw_size
) {
144 NOUVEAU_ERR("unsupported vbo format: %s\n", pf_name(pf
));
149 if (desc
->swizzle
[0] == UTIL_FORMAT_SWIZZLE_Z
) /* BGRA */
150 hw_size
|= (1 << 31); /* no real swizzle bits :-( */
152 return (hw_type
| hw_size
);
156 nv50_draw_arrays(struct pipe_context
*pipe
, unsigned mode
, unsigned start
,
159 struct nv50_context
*nv50
= nv50_context(pipe
);
160 struct nouveau_channel
*chan
= nv50
->screen
->tesla
->channel
;
161 struct nouveau_grobj
*tesla
= nv50
->screen
->tesla
;
164 nv50_state_validate(nv50
);
166 BEGIN_RING(chan
, tesla
, 0x142c, 1);
168 BEGIN_RING(chan
, tesla
, 0x142c, 1);
171 BEGIN_RING(chan
, tesla
, NV50TCL_VERTEX_BEGIN
, 1);
172 OUT_RING (chan
, nv50_prim(mode
));
175 ret
= nv50_push_arrays(nv50
, start
, count
);
177 BEGIN_RING(chan
, tesla
, NV50TCL_VERTEX_BUFFER_FIRST
, 2);
178 OUT_RING (chan
, start
);
179 OUT_RING (chan
, count
);
182 BEGIN_RING(chan
, tesla
, NV50TCL_VERTEX_END
, 1);
185 /* XXX: not sure what to do if ret != TRUE: flush and retry?
190 static INLINE boolean
191 nv50_draw_elements_inline_u08(struct nv50_context
*nv50
, uint8_t *map
,
192 unsigned start
, unsigned count
)
194 struct nouveau_channel
*chan
= nv50
->screen
->tesla
->channel
;
195 struct nouveau_grobj
*tesla
= nv50
->screen
->tesla
;
200 return nv50_push_elements_u08(nv50
, map
, count
);
203 BEGIN_RING(chan
, tesla
, NV50TCL_VB_ELEMENT_U32
, 1);
204 OUT_RING (chan
, map
[0]);
210 unsigned nr
= count
> 2046 ? 2046 : count
;
213 BEGIN_RING(chan
, tesla
, NV50TCL_VB_ELEMENT_U16
| 0x40000000, nr
>> 1);
214 for (i
= 0; i
< nr
; i
+= 2)
215 OUT_RING (chan
, (map
[i
+ 1] << 16) | map
[i
]);
223 static INLINE boolean
224 nv50_draw_elements_inline_u16(struct nv50_context
*nv50
, uint16_t *map
,
225 unsigned start
, unsigned count
)
227 struct nouveau_channel
*chan
= nv50
->screen
->tesla
->channel
;
228 struct nouveau_grobj
*tesla
= nv50
->screen
->tesla
;
233 return nv50_push_elements_u16(nv50
, map
, count
);
236 BEGIN_RING(chan
, tesla
, NV50TCL_VB_ELEMENT_U32
, 1);
237 OUT_RING (chan
, map
[0]);
243 unsigned nr
= count
> 2046 ? 2046 : count
;
246 BEGIN_RING(chan
, tesla
, NV50TCL_VB_ELEMENT_U16
| 0x40000000, nr
>> 1);
247 for (i
= 0; i
< nr
; i
+= 2)
248 OUT_RING (chan
, (map
[i
+ 1] << 16) | map
[i
]);
256 static INLINE boolean
257 nv50_draw_elements_inline_u32(struct nv50_context
*nv50
, uint32_t *map
,
258 unsigned start
, unsigned count
)
260 struct nouveau_channel
*chan
= nv50
->screen
->tesla
->channel
;
261 struct nouveau_grobj
*tesla
= nv50
->screen
->tesla
;
266 return nv50_push_elements_u32(nv50
, map
, count
);
269 unsigned nr
= count
> 2047 ? 2047 : count
;
271 BEGIN_RING(chan
, tesla
, NV50TCL_VB_ELEMENT_U32
| 0x40000000, nr
);
272 OUT_RINGp (chan
, map
, nr
);
281 nv50_draw_elements(struct pipe_context
*pipe
,
282 struct pipe_buffer
*indexBuffer
, unsigned indexSize
,
283 unsigned mode
, unsigned start
, unsigned count
)
285 struct nv50_context
*nv50
= nv50_context(pipe
);
286 struct nouveau_channel
*chan
= nv50
->screen
->tesla
->channel
;
287 struct nouveau_grobj
*tesla
= nv50
->screen
->tesla
;
288 struct pipe_screen
*pscreen
= pipe
->screen
;
292 map
= pipe_buffer_map(pscreen
, indexBuffer
, PIPE_BUFFER_USAGE_CPU_READ
);
294 nv50_state_validate(nv50
);
296 BEGIN_RING(chan
, tesla
, 0x142c, 1);
298 BEGIN_RING(chan
, tesla
, 0x142c, 1);
301 BEGIN_RING(chan
, tesla
, NV50TCL_VERTEX_BEGIN
, 1);
302 OUT_RING (chan
, nv50_prim(mode
));
305 ret
= nv50_draw_elements_inline_u08(nv50
, map
, start
, count
);
308 ret
= nv50_draw_elements_inline_u16(nv50
, map
, start
, count
);
311 ret
= nv50_draw_elements_inline_u32(nv50
, map
, start
, count
);
318 BEGIN_RING(chan
, tesla
, NV50TCL_VERTEX_END
, 1);
321 pipe_buffer_unmap(pscreen
, indexBuffer
);
323 /* XXX: what to do if ret != TRUE? Flush and retry?
328 static INLINE boolean
329 nv50_vbo_static_attrib(struct nv50_context
*nv50
, unsigned attrib
,
330 struct nouveau_stateobj
**pso
,
331 struct pipe_vertex_element
*ve
,
332 struct pipe_vertex_buffer
*vb
)
335 struct nouveau_stateobj
*so
;
336 struct nouveau_grobj
*tesla
= nv50
->screen
->tesla
;
337 struct nouveau_bo
*bo
= nouveau_bo(vb
->buffer
);
340 enum pipe_format pf
= ve
->src_format
;
341 const struct util_format_description
*desc
;
343 desc
= util_format_description(pf
);
346 if ((desc
->channel
[0].type
!= UTIL_FORMAT_TYPE_FLOAT
) ||
347 util_format_get_component_bits(pf
, UTIL_FORMAT_COLORSPACE_RGB
, 0) != 32)
350 ret
= nouveau_bo_map(bo
, NOUVEAU_BO_RD
);
353 v
= (float *)(bo
->map
+ (vb
->buffer_offset
+ ve
->src_offset
));
357 *pso
= so
= so_new(nv50
->vtxelt_nr
, nv50
->vtxelt_nr
* 4, 0);
359 switch (ve
->nr_components
) {
361 so_method(so
, tesla
, NV50TCL_VTX_ATTR_4F_X(attrib
), 4);
362 so_data (so
, fui(v
[0]));
363 so_data (so
, fui(v
[1]));
364 so_data (so
, fui(v
[2]));
365 so_data (so
, fui(v
[3]));
368 so_method(so
, tesla
, NV50TCL_VTX_ATTR_3F_X(attrib
), 3);
369 so_data (so
, fui(v
[0]));
370 so_data (so
, fui(v
[1]));
371 so_data (so
, fui(v
[2]));
374 so_method(so
, tesla
, NV50TCL_VTX_ATTR_2F_X(attrib
), 2);
375 so_data (so
, fui(v
[0]));
376 so_data (so
, fui(v
[1]));
379 if (attrib
== nv50
->vertprog
->cfg
.edgeflag_in
) {
380 so_method(so
, tesla
, NV50TCL_EDGEFLAG_ENABLE
, 1);
381 so_data (so
, v
[0] ? 1 : 0);
383 so_method(so
, tesla
, NV50TCL_VTX_ATTR_1F(attrib
), 1);
384 so_data (so
, fui(v
[0]));
387 nouveau_bo_unmap(bo
);
391 nouveau_bo_unmap(bo
);
396 nv50_vbo_validate(struct nv50_context
*nv50
)
398 struct nouveau_grobj
*tesla
= nv50
->screen
->tesla
;
399 struct nouveau_stateobj
*vtxbuf
, *vtxfmt
, *vtxattr
;
402 /* don't validate if Gallium took away our buffers */
403 if (nv50
->vtxbuf_nr
== 0)
407 for (i
= 0; i
< nv50
->vtxbuf_nr
; ++i
)
408 if (nv50
->vtxbuf
[i
].stride
&&
409 !(nv50
->vtxbuf
[i
].buffer
->usage
& PIPE_BUFFER_USAGE_VERTEX
))
410 nv50
->vbo_fifo
= 0xffff;
412 if (nv50
->vertprog
->cfg
.edgeflag_in
< 16)
413 nv50
->vbo_fifo
= 0xffff; /* vertprog can't set edgeflag */
415 n_ve
= MAX2(nv50
->vtxelt_nr
, nv50
->state
.vtxelt_nr
);
418 vtxbuf
= so_new(n_ve
* 2, n_ve
* 5, nv50
->vtxelt_nr
* 4);
419 vtxfmt
= so_new(1, n_ve
, 0);
420 so_method(vtxfmt
, tesla
, NV50TCL_VERTEX_ARRAY_ATTRIB(0), n_ve
);
422 for (i
= 0; i
< nv50
->vtxelt_nr
; i
++) {
423 struct pipe_vertex_element
*ve
= &nv50
->vtxelt
[i
];
424 struct pipe_vertex_buffer
*vb
=
425 &nv50
->vtxbuf
[ve
->vertex_buffer_index
];
426 struct nouveau_bo
*bo
= nouveau_bo(vb
->buffer
);
427 uint32_t hw
= nv50_vbo_vtxelt_to_hw(ve
);
430 nv50_vbo_static_attrib(nv50
, i
, &vtxattr
, ve
, vb
)) {
431 so_data(vtxfmt
, hw
| (1 << 4));
433 so_method(vtxbuf
, tesla
,
434 NV50TCL_VERTEX_ARRAY_FORMAT(i
), 1);
437 nv50
->vbo_fifo
&= ~(1 << i
);
440 so_data(vtxfmt
, hw
| i
);
442 if (nv50
->vbo_fifo
) {
443 so_method(vtxbuf
, tesla
,
444 NV50TCL_VERTEX_ARRAY_FORMAT(i
), 1);
449 so_method(vtxbuf
, tesla
, NV50TCL_VERTEX_ARRAY_FORMAT(i
), 3);
450 so_data (vtxbuf
, 0x20000000 | vb
->stride
);
451 so_reloc (vtxbuf
, bo
, vb
->buffer_offset
+
452 ve
->src_offset
, NOUVEAU_BO_VRAM
| NOUVEAU_BO_GART
|
453 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
454 so_reloc (vtxbuf
, bo
, vb
->buffer_offset
+
455 ve
->src_offset
, NOUVEAU_BO_VRAM
| NOUVEAU_BO_GART
|
456 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
458 /* vertex array limits */
459 so_method(vtxbuf
, tesla
, NV50TCL_VERTEX_ARRAY_LIMIT_HIGH(i
), 2);
460 so_reloc (vtxbuf
, bo
, vb
->buffer
->size
- 1,
461 NOUVEAU_BO_VRAM
| NOUVEAU_BO_GART
| NOUVEAU_BO_RD
|
462 NOUVEAU_BO_HIGH
, 0, 0);
463 so_reloc (vtxbuf
, bo
, vb
->buffer
->size
- 1,
464 NOUVEAU_BO_VRAM
| NOUVEAU_BO_GART
| NOUVEAU_BO_RD
|
465 NOUVEAU_BO_LOW
, 0, 0);
467 for (; i
< n_ve
; ++i
) {
468 so_data (vtxfmt
, 0x7e080010);
470 so_method(vtxbuf
, tesla
, NV50TCL_VERTEX_ARRAY_FORMAT(i
), 1);
473 nv50
->state
.vtxelt_nr
= nv50
->vtxelt_nr
;
475 so_ref (vtxfmt
, &nv50
->state
.vtxfmt
);
476 so_ref (vtxbuf
, &nv50
->state
.vtxbuf
);
477 so_ref (vtxattr
, &nv50
->state
.vtxattr
);
478 so_ref (NULL
, &vtxbuf
);
479 so_ref (NULL
, &vtxfmt
);
480 so_ref (NULL
, &vtxattr
);
483 typedef void (*pfn_push
)(struct nouveau_channel
*, void *);
485 struct nv50_vbo_emitctx
495 unsigned ve_edgeflag
;
499 emit_vtx_next(struct nouveau_channel
*chan
, struct nv50_vbo_emitctx
*emit
)
503 for (i
= 0; i
< emit
->nr_ve
; ++i
) {
504 emit
->push
[i
](chan
, emit
->map
[i
]);
505 emit
->map
[i
] += emit
->stride
[i
];
510 emit_vtx(struct nouveau_channel
*chan
, struct nv50_vbo_emitctx
*emit
,
515 for (i
= 0; i
< emit
->nr_ve
; ++i
)
516 emit
->push
[i
](chan
, emit
->map
[i
] + emit
->stride
[i
] * vi
);
519 static INLINE boolean
520 nv50_map_vbufs(struct nv50_context
*nv50
)
524 for (i
= 0; i
< nv50
->vtxbuf_nr
; ++i
) {
525 struct pipe_vertex_buffer
*vb
= &nv50
->vtxbuf
[i
];
526 unsigned size
, delta
;
528 if (nouveau_bo(vb
->buffer
)->map
)
531 size
= vb
->stride
* (vb
->max_index
+ 1);
532 delta
= vb
->buffer_offset
;
535 size
= vb
->buffer
->size
- vb
->buffer_offset
;
537 if (nouveau_bo_map_range(nouveau_bo(vb
->buffer
),
538 delta
, size
, NOUVEAU_BO_RD
))
542 if (i
== nv50
->vtxbuf_nr
)
545 nouveau_bo_unmap(nouveau_bo(nv50
->vtxbuf
[i
].buffer
));
550 nv50_unmap_vbufs(struct nv50_context
*nv50
)
554 for (i
= 0; i
< nv50
->vtxbuf_nr
; ++i
)
555 if (nouveau_bo(nv50
->vtxbuf
[i
].buffer
)->map
)
556 nouveau_bo_unmap(nouveau_bo(nv50
->vtxbuf
[i
].buffer
));
560 emit_b32_1(struct nouveau_channel
*chan
, void *data
)
564 OUT_RING(chan
, v
[0]);
568 emit_b32_2(struct nouveau_channel
*chan
, void *data
)
572 OUT_RING(chan
, v
[0]);
573 OUT_RING(chan
, v
[1]);
577 emit_b32_3(struct nouveau_channel
*chan
, void *data
)
581 OUT_RING(chan
, v
[0]);
582 OUT_RING(chan
, v
[1]);
583 OUT_RING(chan
, v
[2]);
587 emit_b32_4(struct nouveau_channel
*chan
, void *data
)
591 OUT_RING(chan
, v
[0]);
592 OUT_RING(chan
, v
[1]);
593 OUT_RING(chan
, v
[2]);
594 OUT_RING(chan
, v
[3]);
598 emit_b16_1(struct nouveau_channel
*chan
, void *data
)
602 OUT_RING(chan
, v
[0]);
606 emit_b16_3(struct nouveau_channel
*chan
, void *data
)
610 OUT_RING(chan
, (v
[1] << 16) | v
[0]);
611 OUT_RING(chan
, v
[2]);
615 emit_b08_1(struct nouveau_channel
*chan
, void *data
)
619 OUT_RING(chan
, v
[0]);
623 emit_b08_3(struct nouveau_channel
*chan
, void *data
)
627 OUT_RING(chan
, (v
[2] << 16) | (v
[1] << 8) | v
[0]);
631 emit_prepare(struct nv50_context
*nv50
, struct nv50_vbo_emitctx
*emit
,
636 if (nv50_map_vbufs(nv50
) == FALSE
)
639 emit
->ve_edgeflag
= nv50
->vertprog
->cfg
.edgeflag_in
;
641 emit
->edgeflag
= 0.5f
;
643 emit
->vtx_dwords
= 0;
645 for (i
= 0; i
< nv50
->vtxelt_nr
; ++i
) {
646 struct pipe_vertex_element
*ve
;
647 struct pipe_vertex_buffer
*vb
;
649 const struct util_format_description
*desc
;
651 ve
= &nv50
->vtxelt
[i
];
652 vb
= &nv50
->vtxbuf
[ve
->vertex_buffer_index
];
653 if (!(nv50
->vbo_fifo
& (1 << i
)))
657 emit
->stride
[n
] = vb
->stride
;
658 emit
->map
[n
] = nouveau_bo(vb
->buffer
)->map
+
659 (start
* vb
->stride
+ ve
->src_offset
);
661 desc
= util_format_description(ve
->src_format
);
664 size
= util_format_get_component_bits(
665 ve
->src_format
, UTIL_FORMAT_COLORSPACE_RGB
, 0);
667 assert(ve
->nr_components
> 0 && ve
->nr_components
<= 4);
669 /* It shouldn't be necessary to push the implicit 1s
670 * for case 3 and size 8 cases 1, 2, 3.
674 NOUVEAU_ERR("unsupported vtxelt size: %u\n", size
);
677 switch (ve
->nr_components
) {
678 case 1: emit
->push
[n
] = emit_b32_1
; break;
679 case 2: emit
->push
[n
] = emit_b32_2
; break;
680 case 3: emit
->push
[n
] = emit_b32_3
; break;
681 case 4: emit
->push
[n
] = emit_b32_4
; break;
683 emit
->vtx_dwords
+= ve
->nr_components
;
686 switch (ve
->nr_components
) {
687 case 1: emit
->push
[n
] = emit_b16_1
; break;
688 case 2: emit
->push
[n
] = emit_b32_1
; break;
689 case 3: emit
->push
[n
] = emit_b16_3
; break;
690 case 4: emit
->push
[n
] = emit_b32_2
; break;
692 emit
->vtx_dwords
+= (ve
->nr_components
+ 1) >> 1;
695 switch (ve
->nr_components
) {
696 case 1: emit
->push
[n
] = emit_b08_1
; break;
697 case 2: emit
->push
[n
] = emit_b16_1
; break;
698 case 3: emit
->push
[n
] = emit_b08_3
; break;
699 case 4: emit
->push
[n
] = emit_b32_1
; break;
701 emit
->vtx_dwords
+= 1;
706 emit
->vtx_max
= 512 / emit
->vtx_dwords
;
707 if (emit
->ve_edgeflag
< 16)
714 set_edgeflag(struct nouveau_channel
*chan
,
715 struct nouveau_grobj
*tesla
,
716 struct nv50_vbo_emitctx
*emit
, uint32_t index
)
718 unsigned i
= emit
->ve_edgeflag
;
721 float f
= *((float *)(emit
->map
[i
] + index
* emit
->stride
[i
]));
723 if (emit
->edgeflag
!= f
) {
726 BEGIN_RING(chan
, tesla
, 0x15e4, 1);
727 OUT_RING (chan
, f
? 1 : 0);
733 nv50_push_arrays(struct nv50_context
*nv50
, unsigned start
, unsigned count
)
735 struct nouveau_channel
*chan
= nv50
->screen
->base
.channel
;
736 struct nouveau_grobj
*tesla
= nv50
->screen
->tesla
;
737 struct nv50_vbo_emitctx emit
;
739 if (emit_prepare(nv50
, &emit
, start
) == FALSE
)
743 unsigned i
, dw
, nr
= MIN2(count
, emit
.vtx_max
);
744 dw
= nr
* emit
.vtx_dwords
;
746 set_edgeflag(chan
, tesla
, &emit
, 0); /* nr will be 1 */
748 BEGIN_RING(chan
, tesla
, NV50TCL_VERTEX_DATA
| 0x40000000, dw
);
749 for (i
= 0; i
< nr
; ++i
)
750 emit_vtx_next(chan
, &emit
);
754 nv50_unmap_vbufs(nv50
);
760 nv50_push_elements_u32(struct nv50_context
*nv50
, uint32_t *map
, unsigned count
)
762 struct nouveau_channel
*chan
= nv50
->screen
->base
.channel
;
763 struct nouveau_grobj
*tesla
= nv50
->screen
->tesla
;
764 struct nv50_vbo_emitctx emit
;
766 if (emit_prepare(nv50
, &emit
, 0) == FALSE
)
770 unsigned i
, dw
, nr
= MIN2(count
, emit
.vtx_max
);
771 dw
= nr
* emit
.vtx_dwords
;
773 set_edgeflag(chan
, tesla
, &emit
, *map
);
775 BEGIN_RING(chan
, tesla
, NV50TCL_VERTEX_DATA
| 0x40000000, dw
);
776 for (i
= 0; i
< nr
; ++i
)
777 emit_vtx(chan
, &emit
, *map
++);
781 nv50_unmap_vbufs(nv50
);
787 nv50_push_elements_u16(struct nv50_context
*nv50
, uint16_t *map
, unsigned count
)
789 struct nouveau_channel
*chan
= nv50
->screen
->base
.channel
;
790 struct nouveau_grobj
*tesla
= nv50
->screen
->tesla
;
791 struct nv50_vbo_emitctx emit
;
793 if (emit_prepare(nv50
, &emit
, 0) == FALSE
)
797 unsigned i
, dw
, nr
= MIN2(count
, emit
.vtx_max
);
798 dw
= nr
* emit
.vtx_dwords
;
800 set_edgeflag(chan
, tesla
, &emit
, *map
);
802 BEGIN_RING(chan
, tesla
, NV50TCL_VERTEX_DATA
| 0x40000000, dw
);
803 for (i
= 0; i
< nr
; ++i
)
804 emit_vtx(chan
, &emit
, *map
++);
808 nv50_unmap_vbufs(nv50
);
814 nv50_push_elements_u08(struct nv50_context
*nv50
, uint8_t *map
, unsigned count
)
816 struct nouveau_channel
*chan
= nv50
->screen
->base
.channel
;
817 struct nouveau_grobj
*tesla
= nv50
->screen
->tesla
;
818 struct nv50_vbo_emitctx emit
;
820 if (emit_prepare(nv50
, &emit
, 0) == FALSE
)
824 unsigned i
, dw
, nr
= MIN2(count
, emit
.vtx_max
);
825 dw
= nr
* emit
.vtx_dwords
;
827 set_edgeflag(chan
, tesla
, &emit
, *map
);
829 BEGIN_RING(chan
, tesla
, NV50TCL_VERTEX_DATA
| 0x40000000, dw
);
830 for (i
= 0; i
< nr
; ++i
)
831 emit_vtx(chan
, &emit
, *map
++);
835 nv50_unmap_vbufs(nv50
);