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Remove pf_swizzle_* internal macros.
[mesa.git] / src / gallium / drivers / nv50 / nv50_vbo.c
1 /*
2 * Copyright 2008 Ben Skeggs
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 * SOFTWARE.
21 */
22
23 #include "pipe/p_context.h"
24 #include "pipe/p_state.h"
25 #include "pipe/p_inlines.h"
26
27 #include "util/u_format.h"
28
29 #include "nv50_context.h"
30
31 static boolean
32 nv50_push_elements_u08(struct nv50_context *, uint8_t *, unsigned);
33
34 static boolean
35 nv50_push_elements_u16(struct nv50_context *, uint16_t *, unsigned);
36
37 static boolean
38 nv50_push_elements_u32(struct nv50_context *, uint32_t *, unsigned);
39
40 static boolean
41 nv50_push_arrays(struct nv50_context *, unsigned, unsigned);
42
43 static INLINE unsigned
44 nv50_prim(unsigned mode)
45 {
46 switch (mode) {
47 case PIPE_PRIM_POINTS: return NV50TCL_VERTEX_BEGIN_POINTS;
48 case PIPE_PRIM_LINES: return NV50TCL_VERTEX_BEGIN_LINES;
49 case PIPE_PRIM_LINE_LOOP: return NV50TCL_VERTEX_BEGIN_LINE_LOOP;
50 case PIPE_PRIM_LINE_STRIP: return NV50TCL_VERTEX_BEGIN_LINE_STRIP;
51 case PIPE_PRIM_TRIANGLES: return NV50TCL_VERTEX_BEGIN_TRIANGLES;
52 case PIPE_PRIM_TRIANGLE_STRIP:
53 return NV50TCL_VERTEX_BEGIN_TRIANGLE_STRIP;
54 case PIPE_PRIM_TRIANGLE_FAN: return NV50TCL_VERTEX_BEGIN_TRIANGLE_FAN;
55 case PIPE_PRIM_QUADS: return NV50TCL_VERTEX_BEGIN_QUADS;
56 case PIPE_PRIM_QUAD_STRIP: return NV50TCL_VERTEX_BEGIN_QUAD_STRIP;
57 case PIPE_PRIM_POLYGON: return NV50TCL_VERTEX_BEGIN_POLYGON;
58 default:
59 break;
60 }
61
62 NOUVEAU_ERR("invalid primitive type %d\n", mode);
63 return NV50TCL_VERTEX_BEGIN_POINTS;
64 }
65
66 static INLINE uint32_t
67 nv50_vbo_type_to_hw(unsigned type)
68 {
69 switch (type) {
70 case PIPE_FORMAT_TYPE_FLOAT:
71 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_FLOAT;
72 case PIPE_FORMAT_TYPE_UNORM:
73 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_UNORM;
74 case PIPE_FORMAT_TYPE_SNORM:
75 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SNORM;
76 case PIPE_FORMAT_TYPE_USCALED:
77 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_USCALED;
78 case PIPE_FORMAT_TYPE_SSCALED:
79 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SSCALED;
80 /*
81 case PIPE_FORMAT_TYPE_UINT:
82 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_UINT;
83 case PIPE_FORMAT_TYPE_SINT:
84 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SINT; */
85 default:
86 return 0;
87 }
88 }
89
90 static INLINE uint32_t
91 nv50_vbo_size_to_hw(unsigned size, unsigned nr_c)
92 {
93 static const uint32_t hw_values[] = {
94 0, 0, 0, 0,
95 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_8,
96 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_8_8,
97 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_8_8_8,
98 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_8_8_8_8,
99 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_16,
100 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_16_16,
101 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_16_16_16,
102 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_16_16_16_16,
103 0, 0, 0, 0,
104 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_32,
105 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_32_32,
106 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_32_32_32,
107 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_32_32_32_32 };
108
109 /* we'd also have R11G11B10 and R10G10B10A2 */
110
111 assert(nr_c > 0 && nr_c <= 4);
112
113 if (size > 32)
114 return 0;
115 size >>= (3 - 2);
116
117 return hw_values[size + (nr_c - 1)];
118 }
119
120 static INLINE uint32_t
121 nv50_vbo_vtxelt_to_hw(struct pipe_vertex_element *ve)
122 {
123 uint32_t hw_type, hw_size;
124 enum pipe_format pf = ve->src_format;
125 unsigned size = pf_size_x(pf) << pf_exp2(pf);
126
127 hw_type = nv50_vbo_type_to_hw(pf_type(pf));
128 hw_size = nv50_vbo_size_to_hw(size, ve->nr_components);
129
130 if (!hw_type || !hw_size) {
131 NOUVEAU_ERR("unsupported vbo format: %s\n", pf_name(pf));
132 abort();
133 return 0x24e80000;
134 }
135
136 if (util_format_description(pf)->swizzle[0] == UTIL_FORMAT_SWIZZLE_Z) /* BGRA */
137 hw_size |= (1 << 31); /* no real swizzle bits :-( */
138
139 return (hw_type | hw_size);
140 }
141
142 boolean
143 nv50_draw_arrays(struct pipe_context *pipe, unsigned mode, unsigned start,
144 unsigned count)
145 {
146 struct nv50_context *nv50 = nv50_context(pipe);
147 struct nouveau_channel *chan = nv50->screen->tesla->channel;
148 struct nouveau_grobj *tesla = nv50->screen->tesla;
149 boolean ret;
150
151 nv50_state_validate(nv50);
152
153 BEGIN_RING(chan, tesla, 0x142c, 1);
154 OUT_RING (chan, 0);
155 BEGIN_RING(chan, tesla, 0x142c, 1);
156 OUT_RING (chan, 0);
157
158 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1);
159 OUT_RING (chan, nv50_prim(mode));
160
161 if (nv50->vbo_fifo)
162 ret = nv50_push_arrays(nv50, start, count);
163 else {
164 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BUFFER_FIRST, 2);
165 OUT_RING (chan, start);
166 OUT_RING (chan, count);
167 ret = TRUE;
168 }
169 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_END, 1);
170 OUT_RING (chan, 0);
171
172 return ret;
173 }
174
175 static INLINE boolean
176 nv50_draw_elements_inline_u08(struct nv50_context *nv50, uint8_t *map,
177 unsigned start, unsigned count)
178 {
179 struct nouveau_channel *chan = nv50->screen->tesla->channel;
180 struct nouveau_grobj *tesla = nv50->screen->tesla;
181
182 map += start;
183
184 if (nv50->vbo_fifo)
185 return nv50_push_elements_u08(nv50, map, count);
186
187 if (count & 1) {
188 BEGIN_RING(chan, tesla, 0x15e8, 1);
189 OUT_RING (chan, map[0]);
190 map++;
191 count--;
192 }
193
194 while (count) {
195 unsigned nr = count > 2046 ? 2046 : count;
196 int i;
197
198 BEGIN_RING(chan, tesla, 0x400015f0, nr >> 1);
199 for (i = 0; i < nr; i += 2)
200 OUT_RING (chan, (map[i + 1] << 16) | map[i]);
201
202 count -= nr;
203 map += nr;
204 }
205 return TRUE;
206 }
207
208 static INLINE boolean
209 nv50_draw_elements_inline_u16(struct nv50_context *nv50, uint16_t *map,
210 unsigned start, unsigned count)
211 {
212 struct nouveau_channel *chan = nv50->screen->tesla->channel;
213 struct nouveau_grobj *tesla = nv50->screen->tesla;
214
215 map += start;
216
217 if (nv50->vbo_fifo)
218 return nv50_push_elements_u16(nv50, map, count);
219
220 if (count & 1) {
221 BEGIN_RING(chan, tesla, 0x15e8, 1);
222 OUT_RING (chan, map[0]);
223 map++;
224 count--;
225 }
226
227 while (count) {
228 unsigned nr = count > 2046 ? 2046 : count;
229 int i;
230
231 BEGIN_RING(chan, tesla, 0x400015f0, nr >> 1);
232 for (i = 0; i < nr; i += 2)
233 OUT_RING (chan, (map[i + 1] << 16) | map[i]);
234
235 count -= nr;
236 map += nr;
237 }
238 return TRUE;
239 }
240
241 static INLINE boolean
242 nv50_draw_elements_inline_u32(struct nv50_context *nv50, uint32_t *map,
243 unsigned start, unsigned count)
244 {
245 struct nouveau_channel *chan = nv50->screen->tesla->channel;
246 struct nouveau_grobj *tesla = nv50->screen->tesla;
247
248 map += start;
249
250 if (nv50->vbo_fifo)
251 return nv50_push_elements_u32(nv50, map, count);
252
253 while (count) {
254 unsigned nr = count > 2047 ? 2047 : count;
255
256 BEGIN_RING(chan, tesla, 0x400015e8, nr);
257 OUT_RINGp (chan, map, nr);
258
259 count -= nr;
260 map += nr;
261 }
262 return TRUE;
263 }
264
265 boolean
266 nv50_draw_elements(struct pipe_context *pipe,
267 struct pipe_buffer *indexBuffer, unsigned indexSize,
268 unsigned mode, unsigned start, unsigned count)
269 {
270 struct nv50_context *nv50 = nv50_context(pipe);
271 struct nouveau_channel *chan = nv50->screen->tesla->channel;
272 struct nouveau_grobj *tesla = nv50->screen->tesla;
273 struct pipe_screen *pscreen = pipe->screen;
274 void *map;
275 boolean ret;
276
277 map = pipe_buffer_map(pscreen, indexBuffer, PIPE_BUFFER_USAGE_CPU_READ);
278
279 nv50_state_validate(nv50);
280
281 BEGIN_RING(chan, tesla, 0x142c, 1);
282 OUT_RING (chan, 0);
283 BEGIN_RING(chan, tesla, 0x142c, 1);
284 OUT_RING (chan, 0);
285
286 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1);
287 OUT_RING (chan, nv50_prim(mode));
288 switch (indexSize) {
289 case 1:
290 ret = nv50_draw_elements_inline_u08(nv50, map, start, count);
291 break;
292 case 2:
293 ret = nv50_draw_elements_inline_u16(nv50, map, start, count);
294 break;
295 case 4:
296 ret = nv50_draw_elements_inline_u32(nv50, map, start, count);
297 break;
298 default:
299 assert(0);
300 ret = FALSE;
301 break;
302 }
303 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_END, 1);
304 OUT_RING (chan, 0);
305
306 pipe_buffer_unmap(pscreen, indexBuffer);
307
308 return ret;
309 }
310
311 static INLINE boolean
312 nv50_vbo_static_attrib(struct nv50_context *nv50, unsigned attrib,
313 struct nouveau_stateobj **pso,
314 struct pipe_vertex_element *ve,
315 struct pipe_vertex_buffer *vb)
316
317 {
318 struct nouveau_stateobj *so;
319 struct nouveau_grobj *tesla = nv50->screen->tesla;
320 struct nouveau_bo *bo = nouveau_bo(vb->buffer);
321 float *v;
322 int ret;
323 enum pipe_format pf = ve->src_format;
324
325 if ((pf_type(pf) != PIPE_FORMAT_TYPE_FLOAT) ||
326 (pf_size_x(pf) << pf_exp2(pf)) != 32)
327 return FALSE;
328
329 ret = nouveau_bo_map(bo, NOUVEAU_BO_RD);
330 if (ret)
331 return FALSE;
332 v = (float *)(bo->map + (vb->buffer_offset + ve->src_offset));
333
334 so = *pso;
335 if (!so)
336 *pso = so = so_new(nv50->vtxelt_nr * 5, 0);
337
338 switch (ve->nr_components) {
339 case 4:
340 so_method(so, tesla, NV50TCL_VTX_ATTR_4F_X(attrib), 4);
341 so_data (so, fui(v[0]));
342 so_data (so, fui(v[1]));
343 so_data (so, fui(v[2]));
344 so_data (so, fui(v[3]));
345 break;
346 case 3:
347 so_method(so, tesla, NV50TCL_VTX_ATTR_3F_X(attrib), 3);
348 so_data (so, fui(v[0]));
349 so_data (so, fui(v[1]));
350 so_data (so, fui(v[2]));
351 break;
352 case 2:
353 so_method(so, tesla, NV50TCL_VTX_ATTR_2F_X(attrib), 2);
354 so_data (so, fui(v[0]));
355 so_data (so, fui(v[1]));
356 break;
357 case 1:
358 so_method(so, tesla, NV50TCL_VTX_ATTR_1F(attrib), 1);
359 so_data (so, fui(v[0]));
360 break;
361 default:
362 nouveau_bo_unmap(bo);
363 return FALSE;
364 }
365
366 nouveau_bo_unmap(bo);
367 return TRUE;
368 }
369
370 void
371 nv50_vbo_validate(struct nv50_context *nv50)
372 {
373 struct nouveau_grobj *tesla = nv50->screen->tesla;
374 struct nouveau_stateobj *vtxbuf, *vtxfmt, *vtxattr;
375 unsigned i, n_ve;
376
377 /* don't validate if Gallium took away our buffers */
378 if (nv50->vtxbuf_nr == 0)
379 return;
380 nv50->vbo_fifo = 0;
381
382 for (i = 0; i < nv50->vtxbuf_nr; ++i)
383 if (nv50->vtxbuf[i].stride &&
384 !(nv50->vtxbuf[i].buffer->usage & PIPE_BUFFER_USAGE_VERTEX))
385 nv50->vbo_fifo = 0xffff;
386
387 n_ve = MAX2(nv50->vtxelt_nr, nv50->state.vtxelt_nr);
388
389 vtxattr = NULL;
390 vtxbuf = so_new(n_ve * 7, nv50->vtxelt_nr * 4);
391 vtxfmt = so_new(n_ve + 1, 0);
392 so_method(vtxfmt, tesla, NV50TCL_VERTEX_ARRAY_ATTRIB(0), n_ve);
393
394 for (i = 0; i < nv50->vtxelt_nr; i++) {
395 struct pipe_vertex_element *ve = &nv50->vtxelt[i];
396 struct pipe_vertex_buffer *vb =
397 &nv50->vtxbuf[ve->vertex_buffer_index];
398 struct nouveau_bo *bo = nouveau_bo(vb->buffer);
399 uint32_t hw = nv50_vbo_vtxelt_to_hw(ve);
400
401 if (!vb->stride &&
402 nv50_vbo_static_attrib(nv50, i, &vtxattr, ve, vb)) {
403 so_data(vtxfmt, hw | (1 << 4));
404
405 so_method(vtxbuf, tesla,
406 NV50TCL_VERTEX_ARRAY_FORMAT(i), 1);
407 so_data (vtxbuf, 0);
408
409 nv50->vbo_fifo &= ~(1 << i);
410 continue;
411 }
412 so_data(vtxfmt, hw | i);
413
414 if (nv50->vbo_fifo) {
415 so_method(vtxbuf, tesla,
416 NV50TCL_VERTEX_ARRAY_FORMAT(i), 1);
417 so_data (vtxbuf, 0);
418 continue;
419 }
420
421 so_method(vtxbuf, tesla, NV50TCL_VERTEX_ARRAY_FORMAT(i), 3);
422 so_data (vtxbuf, 0x20000000 | vb->stride);
423 so_reloc (vtxbuf, bo, vb->buffer_offset +
424 ve->src_offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART |
425 NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
426 so_reloc (vtxbuf, bo, vb->buffer_offset +
427 ve->src_offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART |
428 NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
429
430 /* vertex array limits */
431 so_method(vtxbuf, tesla, 0x1080 + (i * 8), 2);
432 so_reloc (vtxbuf, bo, vb->buffer->size - 1,
433 NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD |
434 NOUVEAU_BO_HIGH, 0, 0);
435 so_reloc (vtxbuf, bo, vb->buffer->size - 1,
436 NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD |
437 NOUVEAU_BO_LOW, 0, 0);
438 }
439 for (; i < n_ve; ++i) {
440 so_data (vtxfmt, 0x7e080010);
441
442 so_method(vtxbuf, tesla, NV50TCL_VERTEX_ARRAY_FORMAT(i), 1);
443 so_data (vtxbuf, 0);
444 }
445 nv50->state.vtxelt_nr = nv50->vtxelt_nr;
446
447 so_ref (vtxfmt, &nv50->state.vtxfmt);
448 so_ref (vtxbuf, &nv50->state.vtxbuf);
449 so_ref (vtxattr, &nv50->state.vtxattr);
450 so_ref (NULL, &vtxbuf);
451 so_ref (NULL, &vtxfmt);
452 so_ref (NULL, &vtxattr);
453 }
454
455 typedef void (*pfn_push)(struct nouveau_channel *, void *);
456
457 struct nv50_vbo_emitctx
458 {
459 pfn_push push[16];
460 void *map[16];
461 unsigned stride[16];
462 unsigned nr_ve;
463 unsigned vtx_dwords;
464 unsigned vtx_max;
465 };
466
467 static INLINE void
468 emit_vtx_next(struct nouveau_channel *chan, struct nv50_vbo_emitctx *emit)
469 {
470 unsigned i;
471
472 for (i = 0; i < emit->nr_ve; ++i) {
473 emit->push[i](chan, emit->map[i]);
474 emit->map[i] += emit->stride[i];
475 }
476 }
477
478 static INLINE void
479 emit_vtx(struct nouveau_channel *chan, struct nv50_vbo_emitctx *emit,
480 uint32_t vi)
481 {
482 unsigned i;
483
484 for (i = 0; i < emit->nr_ve; ++i)
485 emit->push[i](chan, emit->map[i] + emit->stride[i] * vi);
486 }
487
488 static INLINE boolean
489 nv50_map_vbufs(struct nv50_context *nv50)
490 {
491 int i;
492
493 for (i = 0; i < nv50->vtxbuf_nr; ++i) {
494 struct pipe_vertex_buffer *vb = &nv50->vtxbuf[i];
495 unsigned size, delta;
496
497 if (nouveau_bo(vb->buffer)->map)
498 continue;
499
500 size = vb->stride * (vb->max_index + 1);
501 delta = vb->buffer_offset;
502
503 if (!size)
504 size = vb->buffer->size - vb->buffer_offset;
505
506 if (nouveau_bo_map_range(nouveau_bo(vb->buffer),
507 delta, size, NOUVEAU_BO_RD))
508 break;
509 }
510
511 if (i == nv50->vtxbuf_nr)
512 return TRUE;
513 for (; i >= 0; --i)
514 nouveau_bo_unmap(nouveau_bo(nv50->vtxbuf[i].buffer));
515 return FALSE;
516 }
517
518 static INLINE void
519 nv50_unmap_vbufs(struct nv50_context *nv50)
520 {
521 unsigned i;
522
523 for (i = 0; i < nv50->vtxbuf_nr; ++i)
524 if (nouveau_bo(nv50->vtxbuf[i].buffer)->map)
525 nouveau_bo_unmap(nouveau_bo(nv50->vtxbuf[i].buffer));
526 }
527
528 static void
529 emit_b32_1(struct nouveau_channel *chan, void *data)
530 {
531 uint32_t *v = data;
532
533 OUT_RING(chan, v[0]);
534 }
535
536 static void
537 emit_b32_2(struct nouveau_channel *chan, void *data)
538 {
539 uint32_t *v = data;
540
541 OUT_RING(chan, v[0]);
542 OUT_RING(chan, v[1]);
543 }
544
545 static void
546 emit_b32_3(struct nouveau_channel *chan, void *data)
547 {
548 uint32_t *v = data;
549
550 OUT_RING(chan, v[0]);
551 OUT_RING(chan, v[1]);
552 OUT_RING(chan, v[2]);
553 }
554
555 static void
556 emit_b32_4(struct nouveau_channel *chan, void *data)
557 {
558 uint32_t *v = data;
559
560 OUT_RING(chan, v[0]);
561 OUT_RING(chan, v[1]);
562 OUT_RING(chan, v[2]);
563 OUT_RING(chan, v[3]);
564 }
565
566 static void
567 emit_b16_1(struct nouveau_channel *chan, void *data)
568 {
569 uint16_t *v = data;
570
571 OUT_RING(chan, v[0]);
572 }
573
574 static void
575 emit_b16_3(struct nouveau_channel *chan, void *data)
576 {
577 uint16_t *v = data;
578
579 OUT_RING(chan, (v[1] << 16) | v[0]);
580 OUT_RING(chan, v[2]);
581 }
582
583 static void
584 emit_b08_1(struct nouveau_channel *chan, void *data)
585 {
586 uint8_t *v = data;
587
588 OUT_RING(chan, v[0]);
589 }
590
591 static void
592 emit_b08_3(struct nouveau_channel *chan, void *data)
593 {
594 uint8_t *v = data;
595
596 OUT_RING(chan, (v[2] << 16) | (v[1] << 8) | v[0]);
597 }
598
599 static boolean
600 emit_prepare(struct nv50_context *nv50, struct nv50_vbo_emitctx *emit,
601 unsigned start)
602 {
603 unsigned i;
604
605 if (nv50_map_vbufs(nv50) == FALSE)
606 return FALSE;
607
608 emit->nr_ve = 0;
609 emit->vtx_dwords = 0;
610
611 for (i = 0; i < nv50->vtxelt_nr; ++i) {
612 struct pipe_vertex_element *ve;
613 struct pipe_vertex_buffer *vb;
614 unsigned n, type, size;
615
616 ve = &nv50->vtxelt[i];
617 vb = &nv50->vtxbuf[ve->vertex_buffer_index];
618 if (!(nv50->vbo_fifo & (1 << i)))
619 continue;
620 n = emit->nr_ve++;
621
622 emit->stride[n] = vb->stride;
623 emit->map[n] = nouveau_bo(vb->buffer)->map +
624 (start * vb->stride + ve->src_offset);
625
626 type = pf_type(ve->src_format);
627 size = pf_size_x(ve->src_format) << pf_exp2(ve->src_format);
628
629 assert(ve->nr_components > 0 && ve->nr_components <= 4);
630
631 /* It shouldn't be necessary to push the implicit 1s
632 * for case 3 and size 8 cases 1, 2, 3.
633 */
634 switch (size) {
635 default:
636 NOUVEAU_ERR("unsupported vtxelt size: %u\n", size);
637 return FALSE;
638 case 32:
639 switch (ve->nr_components) {
640 case 1: emit->push[n] = emit_b32_1; break;
641 case 2: emit->push[n] = emit_b32_2; break;
642 case 3: emit->push[n] = emit_b32_3; break;
643 case 4: emit->push[n] = emit_b32_4; break;
644 }
645 emit->vtx_dwords += ve->nr_components;
646 break;
647 case 16:
648 switch (ve->nr_components) {
649 case 1: emit->push[n] = emit_b16_1; break;
650 case 2: emit->push[n] = emit_b32_1; break;
651 case 3: emit->push[n] = emit_b16_3; break;
652 case 4: emit->push[n] = emit_b32_2; break;
653 }
654 emit->vtx_dwords += (ve->nr_components + 1) >> 1;
655 break;
656 case 8:
657 switch (ve->nr_components) {
658 case 1: emit->push[n] = emit_b08_1; break;
659 case 2: emit->push[n] = emit_b16_1; break;
660 case 3: emit->push[n] = emit_b08_3; break;
661 case 4: emit->push[n] = emit_b32_1; break;
662 }
663 emit->vtx_dwords += 1;
664 break;
665 }
666 }
667
668 emit->vtx_max = 512 / emit->vtx_dwords;
669
670 return TRUE;
671 }
672
673 static boolean
674 nv50_push_arrays(struct nv50_context *nv50, unsigned start, unsigned count)
675 {
676 struct nouveau_channel *chan = nv50->screen->base.channel;
677 struct nouveau_grobj *tesla = nv50->screen->tesla;
678 struct nv50_vbo_emitctx emit;
679
680 if (emit_prepare(nv50, &emit, start) == FALSE)
681 return FALSE;
682
683 while (count) {
684 unsigned i, dw, nr = MIN2(count, emit.vtx_max);
685 dw = nr * emit.vtx_dwords;
686
687 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_DATA | 0x40000000, dw);
688 for (i = 0; i < nr; ++i)
689 emit_vtx_next(chan, &emit);
690
691 count -= nr;
692 }
693 nv50_unmap_vbufs(nv50);
694
695 return TRUE;
696 }
697
698 static boolean
699 nv50_push_elements_u32(struct nv50_context *nv50, uint32_t *map, unsigned count)
700 {
701 struct nouveau_channel *chan = nv50->screen->base.channel;
702 struct nouveau_grobj *tesla = nv50->screen->tesla;
703 struct nv50_vbo_emitctx emit;
704
705 if (emit_prepare(nv50, &emit, 0) == FALSE)
706 return FALSE;
707
708 while (count) {
709 unsigned i, dw, nr = MIN2(count, emit.vtx_max);
710 dw = nr * emit.vtx_dwords;
711
712 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_DATA | 0x40000000, dw);
713 for (i = 0; i < nr; ++i)
714 emit_vtx(chan, &emit, *map++);
715
716 count -= nr;
717 }
718 nv50_unmap_vbufs(nv50);
719
720 return TRUE;
721 }
722
723 static boolean
724 nv50_push_elements_u16(struct nv50_context *nv50, uint16_t *map, unsigned count)
725 {
726 struct nouveau_channel *chan = nv50->screen->base.channel;
727 struct nouveau_grobj *tesla = nv50->screen->tesla;
728 struct nv50_vbo_emitctx emit;
729
730 if (emit_prepare(nv50, &emit, 0) == FALSE)
731 return FALSE;
732
733 while (count) {
734 unsigned i, dw, nr = MIN2(count, emit.vtx_max);
735 dw = nr * emit.vtx_dwords;
736
737 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_DATA | 0x40000000, dw);
738 for (i = 0; i < nr; ++i)
739 emit_vtx(chan, &emit, *map++);
740
741 count -= nr;
742 }
743 nv50_unmap_vbufs(nv50);
744
745 return TRUE;
746 }
747
748 static boolean
749 nv50_push_elements_u08(struct nv50_context *nv50, uint8_t *map, unsigned count)
750 {
751 struct nouveau_channel *chan = nv50->screen->base.channel;
752 struct nouveau_grobj *tesla = nv50->screen->tesla;
753 struct nv50_vbo_emitctx emit;
754
755 if (emit_prepare(nv50, &emit, 0) == FALSE)
756 return FALSE;
757
758 while (count) {
759 unsigned i, dw, nr = MIN2(count, emit.vtx_max);
760 dw = nr * emit.vtx_dwords;
761
762 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_DATA | 0x40000000, dw);
763 for (i = 0; i < nr; ++i)
764 emit_vtx(chan, &emit, *map++);
765
766 count -= nr;
767 }
768 nv50_unmap_vbufs(nv50);
769
770 return TRUE;
771 }